The ADMV4530 is a highly integrated upconverter with an in-phase/quadrature (I/Q) mixer that is ideally suited for next generation Ka band satellite communications.An integrated low phase noise, fractional-N phase-locked loop (PLL) with a voltage controlled oscillator (VCO) and internal 2? multiplier generate the necessary on-chip local oscillator (LO) signal for the I/Q mixer, eliminating the need for external frequency synthesis. The VCO uses an internal autocalibration routine that allows the PLL to select the necessary settings and locks in approximately 100 ?s.The single-ended reference input to the PLL operates up to 500 MHz and features internal reference dividers and a multiplier for added flexibility. Additionally, the phase frequency detector (PFD) comparison frequency can be up to 250 MHz for integer mode and 160 MHz for fraction-N mode.The upconverter consists of an I/Q mixer that can operate in either I/Q mode with 500 MHz of bandwidth or in IF mode up to 3 GHz of bandwidth, which allows various radio architectures and backward compatibility with legacy systems.Immediately following the I/Q mixer are stages of gain and variable attenuation. The configuration can achieve a minimum 1 dB compression point (P1dB) compression point of 19 dBm, eliminating the need for external stages of gain.A programmable 4-wire serial port interface (SPI) allows adjustment of the quadrature phase for optimum sideband suppression. In addition, the SPI allows nulling of LO feedthrough in IF mode. In I/Q mode, the LO feedthrough can be nulled by applying external dc offset to the differential baseband I/Q inputs.An IF automatic gain control (AGC) adjusts the IF variable gain amplifier (VGA) to compensate for input power variations. During normal operation, this AGC feature can be enabled or disabled via the SPI. When disabled during normal operation, the AGC feature only works on a test tone during power-down mode to track temperature variations.The ADMV4530 upconverter comes in a RoHs compliant, 6 mm ? 6 mm, 40-terminal land grid array (LGA) package. The ADMV4530 operates over the ?40?C to +85?C case temperature range.Applications Satellite communication Point to point microwave communication

The HMC407MS8G & HMC407MS8GE are high?efficiency GaAs InGaP Heterojunction Bipolar?Transistor (HBT) MMIC Power amplifiers which?operate between 5 and 7 GHz. The amplifier requires?no external matching to achieve operation and is?thus truly 50 Ohm matched at input and output. The?amplifier is packaged in a low cost, surface mount?8 leaded package with an exposed base for improved?RF and thermal performance. The amplifier?provides 15 dB of gain, +29 dBm of saturated power?at 28% PAE from a +5V supply voltage. Power down?capability is available to conserve current consumption?when the amplifier is not in use.Applications UNII HiperLAN

The HMC472ALP4E are broadband 6-bit GaAs IC digital attenuators in low cost leadless surface mount packages. This single positive control line per bit digital attenuator incorporates off chip AC ground capacitors for near DC operation, making it suitable for a wide variety of RF and IF applications. Covering DC to 3.8 GHz, the insertion loss is less than 2.0 dB typical. The attenuator bit values are 0.5 (LSB), 1, 2, 4, 8, and 16 dB for a total attenuation of 31.5 dB. Attenuation accuracy is excellent at ? 0.25 dB typical step error with an IIP3 of +54 dBm. Six TTL/CMOS control inputs are used to select each attenuation state. A single Vdd bias of +5V is required.APPLICATIONSThe HMC472ALP4E is ideal for: 3G Infrastructure & access points? Cellular/3G, LTE & UMB WiMAX, WiBN & Fixed Wireless? Test Equipment and Sensors GSM, WCDMA & TD-SCDMA

The HMC374(E) is a general purpose broad band Low Noise Amplifier (LNA) for use in the 0.3 - 3.0 GHz frequency range. The LNA provides 15 dB of gain and a 1.5 dB noise figure from a single positive supply of +2.75 to +5.5V. The low noise figure coupled with a high P1dB (22 dBm) and high OIP3 (37 dBm) make this part ideal for cellular applications. The compact LNA design utilizes on-chip matching for repeatable gain and noise figure performance. To minimize board area the design is offered in a low cost SOT26 package that occupies only 0.118? x 0.118?.Applications Cellular/PCS/3G? WCS, MMDS & ISM? Fixed Wireless & WLAN? Private Land Mobile Radio

HMC750 is a limiting amplifier designed to support data transmission rates up to 12.5 Gbps. The amplifier can operate over a wide range of input voltage levels and provides constant-level differential output swing. HMC750 also features an output level control pin, VC1, which allows for loss compensation or for signal level optimization. Differential output signal swing can be adjustable up to 880 mVp-p. Input signals higher than 3 mVp-p can be amplified to saturated 880 mVp-p differential signal.All single-ended input signals to the HMC750 are terminated with 50 ohms to +5V on-chip, and may be either AC or DC coupled. The outputs of the HMC750 may be operated either differentially or single-ended. Outputs can be connected directly to a 50 ohm terminated system referenced to +5V, while DC blocking capacitors may be used if the terminating system is 50 ??to a non +5V voltage. The HMC750 operates from a single +5V DC supply and is available in a plastic RoHS compliant 4?4 mm SMT package.APPLICATIONS OC-192 Receivers 10 Gbps Ethernet Receivers 10 Gbps Fiber Channel Receivers Broadband Test & Measurement

The HMC748 is a 2:1 Selector designed to support data transmission rates of up to 13 Gbps, and selector port operation of up to 13 GHz. The selector routes one of the two single-ended inputs to the differential output upon assertion of the proper select port. The HMC748 also features an output level control pin, VR, which allows for loss compensation or for signal level optimization.All single-ended input signals to the HMC748 are terminated with 50 ohms to VCC?on-chip, and may be either AC or DC coupled. The outputs of the HMC748 may be operated either differentially or single-ended. Inputs or outputs can be connected directly to a 50 ohm to VCC terminated system, while DC blocking capacitors may be used if the terminating system is 50 ohms to ground. The HMC748 operates from a single +3.3V DC supply and is housed in a ceramic RoHS compliant 3x3 mm SMT package.APPLICATIONS 2:1 Multiplexer up to 13 Gbps RF ATE Applications Broadband Test & Measurement Serial Data Transmission up to 13 Gbps Redundant Path Switching Built-in Test

The HMC959LC3 is a Divide-by-4 with Reset designed to support clock frequencies as high as 26 GHz. During normal operation, with the reset pin not asserted, the output toggles from its prior state on the positive edge of the clock. This results in a divide-by-four function of the clock input. Asserting the reset pin forces the Q output low regardless of the clock edge state (asynchronous reset assertion). Reversing the clock inputs allows for negative-edge triggered applications. The HMC959LC3 also features an output level control pin, VR, which allows for loss compensation or for signal level optimization.All input signals to the HMC959LC3 are terminated with 50 ? to ground on-chip, and may be either AC or DC coupled. Outputs can be connected directly to a 50 ? terminated system, while DC blocking capacitors may be used if the terminating system is 50 ? to a non-ground DC voltage. The HMC959LC3 operates from a single -3.3 V DC supply and is available in a ceramic RoHS-compliant 3?3 mm SMT package.APPLICATIONS High Speed Frequency Divider?(up to 26 GHz) Broadband Test & Measurement Clock Synthesis Phase Locked Loops

The HMC821LP6CE is a fully functioned Fractional-N Phase-Locked-Loop (PLL) Frequency Synthesizer with an Integrated Voltage Controlled Oscillator (VCO). The synthesizer consists of an integrated low noise VCO with a triband output, an autocalibration subsystem for low voltage VCO tuning, a very low noise digital Phase Detector (PD), a precision controlled charge pump, a low noise reference path divider and a fractional divider.The fractional synthesizer features an advanced delta-sigma modulator design that allows both ultra-fine step sizes and low spurious products. The phase detector (PD) features cycle slip prevention (CSP) technology to allow faster frequency hopping times. Ultra low in-close phase noise and low spurious also allows wider loop bandwidths for faster frequency hopping and low micro-phonics.For theory of operation and register map refer to the 'PLLs with Integrated VCO - RF VCOs' Operating Guide.Applications Cellular/4G Infrastructure Repeaters and Femtocells Communications Test Equipment CATV Equipment Phased Array Applications DDS Replacement? Very High Data Rate Radios

The HMC960LP4E is a digitally programmable dual channel variable gain amplifier. It supports discrete gain steps from 0 to 40 dB in precise 0.5 dB steps. It features a glitch free architecture to provide exceptionally smooth gain transitions. The device has matched gain paths which provide excellent quadrature balance over a wide signal bandwidth.The HMC960LP4E provides an SPI programmable input impedance of 100? differential or 400? differential (default).Externally controlled common mode output feature enables the HMC960LP4E to provide a flexible output interface to other parts in the signal path. Gain can be controlled via either a parallel interface (GC[6:0]) or via the read/write serial port (SPI).Housed in a compact 4x4mm (LP4) SMT QFN package, the HMC960LP4E requires minimal external components and provides a low cost alternative to more complicated switched amplifier architectures.Applications Baseband I/Q Transceivers Direct Conversion &?Low IF Transceivers Diversity Receivers ADC Drivers Adaptive Gain Control

The HMC966LP4E is a compact GaAs MMIC I/Q downconverter in a leadless RoHS compliant SM T package. This device provides a small signal conversion gain of 12 dB with a noise figure of 2.5 dB and 40 dBc of image rejection across the frequency band. The HMC966LP4E utilizes an LNA followed by an image reject mixer which is driven by an active x2 multiplier. The image reject mixer eliminates the need for a filter following the LNA, and removes thermal noise at the image frequency. I and Q mixer outputs are provided and an external 90? hybrid is needed to select the required sideband. The HMC966LP4E is a much smaller alternative to hybrid style image reject mixer downconverter assemblies, and is compatible with surface mount manufacturing techniques.Applications Point-to-Point &?Point-to-Multi-Point Radio Military Radar, EW & ELINT Satellite Communications