The ADF4360-8 is an integrated integer-N synthesizer and voltagecontrolled oscillator (VCO). The ADF4360-8 center frequencyis set by external inductors. This allows a frequencyrange of between 65 MHz to 400 MHz. Control of all the on-chip registers is through a simple 3-wire interface. The device operates with a power supply ranging from 3.0 V to 3.6 V and can be powered down when not in use. 

Prescaler InGaP HBT Divide-by-4 Chip, DC - 12 GHz

The ADF4151 allows implementation of fractional-N or integer-N phase-locked loop (PLL) frequency synthesizers if used with an external voltage controlled oscillator (VCO), loop filter, and external reference frequency.The ADF4151 is used with external VCO parts and is footprint and software compatible with the ADF4350. The part consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. There is a Σ-Δ based fractional interpolator to allow programmable fractional-N division. The INT, FRAC, and MOD registers define an overall N divider [N = (INT + (FRAC/MOD))]. The RF output phase is programmable for applications that require a particular phase relationship between the output and the reference. The ADF4151 also features cycle slip reduction circuitry, leading to faster lock times without the need for modifications to the loop filter.Control of all the on-chip registers is through a simple 3-wire interface. The device operates with a power supply ranging from 3.0 V to 3.6 V that can be powered down when not in use.The ADF4151 is available in a 5 mm × 5 mm package.Applications Wireless infrastructure (W-CDMA, TD-SCDMA, WiMax, GSM, PCS, DCS, DECT) Test equipment Wireless LANs, CATV equipment Clock generation

The ADRF6518 is a matched pair of fully differential low noise and low distortion programmable filters and variable gain amplifiers (VGAs). Each channel is capable of rejecting large out-of-band interferers while reliably boosting the wanted signal, thus reducing the bandwidth and resolution requirements on the analog-to-digital converters (ADCs). The excellent matching between channels and their high spurious-free dynamic range over all gain and bandwidth settings make the ADRF6518 ideal for quadrature-based (IQ) communication systems with dense constellations, multiple carriers, and nearby interferers. The various amplifier gains, filter corners and other features are all programmable via a serial port interface (SPI) port.The first VGA that precedes the filters offers 24 dB of continuous gain control with fixed gain options of 9 dB, 12 dB, and 15 dB, and sets a differential input impedance of 400 Ω. The filters provide a six-pole Butterworth response with 0.5 dB corner frequencies from 1 MHz to 63 MHz in 1 MHz steps. For operation beyond 63 MHz, the filter can be disabled and completely bypassed, thereby extending the −3 dB BW up to 1100 MHz. A wideband peak detector is available to monitor the peak signal at the filter inputs. The pair of VGAs that follow the filters each provides 24 dB of continuous gain control with fixed gain options of 12 dB, 15 dB, 18 dB, and 21 dB. The output buffers offer an additional option of 3 dB or 9 dB gain and provide a differential output impedance of less than 10 Ω. They are capable of driving 1.5 V p-p into 400 Ω loads at better than 65 dBc HD3. The output common-mode voltage defaults to VPS/2 and can be adjusted down to 900 mV via the VOCM pin. Independent, built-in dc offset correction loops for each channel can be disabled via the SPI if fully dc-coupled operation is desired. The high-pass corner frequency is determined by external capacitors on the OFS1 and OFS2 pins and the postfilter VGA gain.The ADRF6518 operates from a 3.15 V to 3.45 V supply and consumes a maximum supply current of 400 mA. When fully disabled, it consumes <1 mA. The ADRF6518 is fabricated in an advanced silicon-germanium BiCMOS process and is available in a 32-lead, exposed pad LFCSP. Performance is specified over the −40°C to +85°C temperature range.Applications Point-to-point and point-to-multipoint radios Baseband I/Q receivers Diversity receivers ADC drivers Instrumentation Medical

The AD9361 is a high performance, highly integrated radiofrequency (RF) Agile Transceiver™ designed for use in 3G and4G base station applications. Its programmability and widebandcapability make it ideal for a broad range of transceiver applications.The device combines a RF front end with a flexible mixed-signalbaseband section and integrated frequency synthesizers, simplifyingdesign-in by providing a configurable digital interface to aprocessor. The AD9361 receiver LO operates from 70 MHz to6.0 GHz and the transmitter LO operates from 47 MHz to 6.0 GHzrange, covering most licensed and unlicensed bands. Channelbandwidths from less than 200 kHz to 56 MHz are supported.The two independent direct conversion receivers have state-of-the-artnoise figure and linearity. Each receive (RX) subsystem includesindependent automatic gain control (AGC), dc offset correction,quadrature correction, and digital filtering, thereby eliminatingthe need for these functions in the digital baseband. The AD9361also has flexible manual gain modes that can be externallycontrolled. Two high dynamic range analog-to-digital converters(ADCs) per channel digitize the received I and Q signals and passthem through configurable decimation filters and 128-tap finiteimpulse response (FIR) filters to produce a 12-bit output signal atthe appropriate sample rate.The transmitters use a direct conversion architecture that achieveshigh modulation accuracy with ultralow noise. This transmitterdesign produces a best in class TX error vector magnitude (EVM)of <−40 dB, allowing significant system margin for the externalpower amplifier (PA) selection. The on-board transmit (TX)power monitor can be used as a power detector, enabling highlyaccurate TX power measurements.The fully integrated phase-locked loops (PLLs) provide lowpower fractional-N frequency synthesis for all receive andtransmit channels. Channel isolation, demanded by frequencydivision duplex (FDD) systems, is integrated into the design.All VCO and loop filter components are integrated.The core of the AD9361 can be powered directly from a 1.3 Vregulator. The IC is controlled via a standard 4-wire serial portand four real-time input/output control pins. Comprehensivepower-down modes are included to minimize power consumptionduring normal use. The AD9361 is packaged in a 10 mm × 10 mm,144-ball chip scale package ball grid array (CSP_BGA).Applications Point to point communication systems Femtocell/picocell/microcell base stations General-purpose radio systems

The AD9364 is a 1 x 1 channel high performance, highly integrated RF Agile Transceiver™. Its programmability and wideband capability make it ideal for a broad range of transceiver applications. The device combines an RF front end with a flexible mixed-signal baseband section and integrated frequency synthesizers, simplifying design-in by providing a configurable digital interface to a processor. The AD9364 operates in the 70 MHz to 6.0 GHz range, covering most licensed and unlicensed bands. Channel bandwidths from less than 200 kHz to 56 MHz are supported.The AD9364 is packaged in a 10 mm × 10 mm, 144-ball chip scale package ball grid array (CSP_BGA).Applications Point to point communication systems Femtocell/picocell/microcell base stations General-purpose radio systems

The ADF4355-2 allows implementation of fractional-N or integer-N phase-locked loop (PLL) frequency synthesizers when used with an external loop filter and an external reference frequency. A series of frequency dividers permits operation from 54 MHz to 4400 MHz. The ADF4355-2 has an integrated VCO with a fundamental output frequency ranging from 3400 MHz to 6800 MHz. In addition, the VCO frequency is connected to divide by 1, 2, 4, 8, 16, 32, or 64 circuits that allow the user to generate RF output frequencies as low as 54 MHz. For applications that require isolation, the RF output stage can be muted. The mute function is both pin and software controllable.Control of all on-chip registers is through a simple 3-wire interface. The ADF4355-2 operates with analog and digital power supplies ranging from 3.15 V to 3.45 V, with charge pump and VCO supplies from 4.75 V to 5.25 V. The ADF4355-2 also contains hardware and software power-down modes.Applications Wireless infrastructure (W-CDMA, TD-SCDMA, WiMAX, GSM, PCS, DCS, DECT) Point to point/point to multipoint microwave links Satellites/VSATs Test equipment/instrumentation Clock generation

RF Mixer DBL-BAL mix SMT, 0.7 - 2.0 GHz

The HMC305SLP4E is a broadband 5-bit positivecontrol Silicon IC digital attenuator with CMOS compatibleserial-to-parallel driver package in a leadlessQFN 4x4 mm SMT package. Covering 0.4 to 6GHz, the insertion loss is typically less than 1.6 dB.The attenuator bit values are 0.5 (LSB), 1, 2, 4, and8 dB for a total attenuation of 15.5 dB. Attenuationaccuracy is excellent at ±0.25 dB typical with an IIP3of up to +52 dBm. Five bit serial control words areused to select each attenuation state. A single Vccbias of +3.3V to +5V is required.The HMC305S(E) is a replacement for the HMC305A(E), HMC305B(E) and HMC305(E).Applications Cellular Infrastructure Wireless Infrastructure Microwave Radio & VSAT Test Instrumentation

The HMC1122 is a 6-bit digital attenuator operating from 0.1 GHz to 6 GHz with a 31.5 dB attenuation control range in 0.5 dB steps.The HMC1122 is implemented in a silicon process, offering very fast settling time, low power consumption, and high ESD robustness. The device features safe state transitions and optimized for excellent step accuracy and high linearity over frequency and temperature range. The RF input and output are internally matched to 50 Ω and do not require any external matching components. The design is bidirectional; therefore, the RF input and output are interchangeable.The HMC1122 operates on a single supply ranging from 3.3 V to 5 V with no performance change due to an on-chip regulator.The device incorporates a driver that provides both serial and parallel control of the attenuator. The device also features a user-selectable power-up state and a serial output port for cascading other serial controlled components.The HMC1122 comes in a RoHS compliant, compact, 4 mm × 4 mm LFCSP package, and is pin compatible to the HMC624A.A fully populated evaluation board is available. Applications Cellular infrastructure Microwave radios and very small aperture terminals (VSATs) Test equipment and sensors IF and RF designs