The AD9634 is a 12-bit, analog-to-digital converter (ADC) with sampling speeds of up to 250 MSPS. The AD9634 is designed to support communications applications where low cost, small size, wide bandwidth, and versatility are desired.The ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. The ADC features wide bandwidth inputs that can support a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer (DCS) is provided to compensate for variations in the ADC clock duty cycle, allowing the converter to maintain excellent performance.The ADC output data are routed directly to the external 12-bit LVDS output port.Flexible power-down options allow significant power savings, when desired.Programming for setup and control is accomplished using a 3-wire, SPI-compatible serial interface.The AD9634 is available in a 32-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C. This product is protected by a U.S. patent.PRODUCT HIGHLIGHTS Integrated 12-bit, 170 MSPS/210 MSPS/250 MSPS ADC. Fast overrange and threshold detect. Proprietary differential input maintains excellent SNR performance for input frequencies up to 350 MHz. 3-pin, 1.8V SPI port for register programming and readback. Pin compatibility with the AD9642, allowing a simple migration up to 14 bits, and with the AD6672. APPLICATIONS Communications Diversity radio systems Multimode digital receivers (3G) TD-SCDMA, WiMax, WCDMA, CDMA2000, GSM, EDGE, LTE I/Q demodulation systems Smart antenna systems General-purpose software radios Ultrasound equipment Broadband data applications

The AD9642 is a 14-bit analog-to-digital converter (ADC) with sampling speeds of up to 250 MSPS. The AD9642 is designed to support communications applications, where low cost, small size, wide bandwidth, and versatility are desired.The ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. The ADC features wide bandwidth inputs that can support a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer (DCS) is provided to compensate for variations in the ADC clock duty cycle, allowing the converter to maintain excellent performance.The ADC output data is routed directly to the external 14-bit LVDS output port.Flexible power-down options allow significant power savings, when desired.Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface.The AD9642 is available in a 32-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C. This product is protected by a U.S. patent. APPLICATIONS Communications Diversity radio systems Multimode digital receivers (3G) TD-SCDMA, WiMax, WCDMA, CDMA2000, GSM, EDGE, LTE I/Q demodulation systems Smart antenna systems General-purpose software radios Ultrasound equipment Broadband data applicationsPRODUCT HIGHLIGHTS Integrated 14-bit, 170 MSPS/210 MSPS/250 MSPS ADC. Operation from a single 1.8 V supply and a separate digital output driver supply accommodating LVDS outputs. Proprietary differential input maintains excellent SNR performance for input frequencies of up to 350 MHz. 3-pin, 1.8 V SPI port for register programming and readback. Pin compatibility with the AD9634, allowing a simple migration from 14 bits to 12 bits, and with the AD6672.

The AD9683 is a 14-bit ADC with sampling speeds of up to250 MSPS. The AD9683 supports communications applicationswhere low cost, small size, wide bandwidth, and versatility aredesired.The ADC core features a multistage, differential pipelinedarchitecture with integrated output error correction logic. TheADC core features wide bandwidth inputs supporting a varietyof user-selectable input ranges. An integrated voltage referenceeases design considerations. A duty cycle stabilizer (DCS) isprovided to compensate for variations in the ADC clock duty cycle,allowing the converter to maintain excellent performance. TheJESD204B high speed serial interface reduces board routingrequirements and lowers pin count requirements for thereceiving device.The ADC output data is routed directly to the JESD204B serialoutput lane. These outputs are at CML voltage levels. Data can besent through the lane at the maximum sampling rate of 250 MSPS,which results in a lane rate of 5 Gbps. Synchronization inputs(SYNCINB± and SYSREF±) are provided.Flexible power-down options allow significant power savings,when desired. Programmable overrange level detection issupported via the dedicated fast detect pins.Programming for setup and control is accomplished using a3-wire SPI-compatible serial interface.The AD9683 is available in a 32-lead LFCSP and is specifiedover the industrial temperature range of −40°C to +85°C.Product Highlights Integrated 14-bit, 170 MSPS/250 MSPS ADC. The configurable JESD204B output block supports lane rates up to 5 Gbps. An on-chip, phase-locked loop (PLL) allows users to provide a single ADC sampling clock; the PLL multiplies the ADC sampling clock to produce the corresponding JESD204B data rate clock. Support for an optional radio frequency (RF) clock input to ease system board design. Proprietary differential input maintains excellent SNR performance for input frequencies of up to 400 MHz. Operation from a single 1.8 V power supply. Standard serial port interface (SPI) that supports various product features and functions, such as controlling the clock DCS, power-down, test modes, voltage reference mode, overrange fast detection, and serial output configuration.Applications Communications Diversity radio systems Multimode digital receivers (3G) TD-SCDMA, WiMAX, W-CDMA, CDMA2000, GSM, EDGE, LTE DOCSIS 3.0 CMTS upstream receive paths HFC digital reverse path receivers Smart antenna systems Electronic test and measurement equipment Radar receivers COMSEC radio architectures IED detection/jamming systems General-purpose software radios Broadband data applications Ultrasound equipment

The ADA4807-1 is a low power, low noise, rail-to-rail voltage feedback amplifier with exceptionally high performance. It is designed to have the lowest input noise (3.1 nV/√Hz and 0.7 pA/√Hz) among high speed, rail-to-rail amplifiers in the industry while operating on only 1 mA or less of quiescent supply current, making it ideal for a wide range of applications from battery-powered, portable instrumentation to high speed systems where component density requires lower power dissipation. The ADA4807-1 operates over a wide range of supply voltages from ±1.5 V to ±5 V, as well as from +3 V to +10 V single supplies, and includes a disable feature that allows reduction of the typical quiescent supply current to 2.4 μA when asserted.For systems with high dynamic range signals, the output voltage swings to within 50 mV of each rail, maximizing the output dynamic range, and the full, rail-to-rail input stage permits input operation up to and beyond the supply rails.The ADA4807-1 features high speed performance of 200 MHz small signal −3 dB bandwidth, a 225 V/μs slew rate, and a settling time of 47 ns to 0.1% (4 V step) with a low input offset voltage of 125 μV (maximum) and 0.7 μV/°C drift. For ±5 V supplies, the HD2 is −112 dBc and HD3 is –115 dBc for a 2 V p-p, 100 kHz output signal driving a 1 kΩ load. The low distortion and fast settling time makes this amplifier ideal for driving high speed single-supply precision ADCs with up to 18-bit resolution. The ADA4807-1 delivers this excellent performance while consuming 1 mA or less of quiescent.The ADA4807-1 (single) is available in space-saving 6-lead SC70 and 6-lead SOT-23 packages, and each operates over the −40°C to +125°C industrial temperature range.Applications High speed, battery operated systems High component density systems High resolution analog-to-digital converter (ADC) drivers Portable test instruments Active filters

The ADA4961 is a high performance, BiCMOS RF digital gain amplifier (DGA), optimized for driving heavy loads out to 2.0 GHz and beyond. The device typically achieves −90 dBc IMD3 performance at 500 MHz and −85 dBc at 1.5 GHz. This RF performance allows GHz converters to achieve their optimum performance with minimal limitations of the driver amplifier or constraints on overall power that typically result from GaAs amplifiers. This device can easily drive 10-bit to 16-bit HS converters.For many receiver applications, antialias filter (AAF) designs can be simplified or not required.The ADA4961 has an internal differential input impedance of 100 Ω and a differential dynamic output impedance of 50 Ω, eliminating the need for external termination resistors. The digital adjustability provides for 1 dB resolution, thus optimizing the signal-to-noise ratio (SNR) for input levels spanning 21 dB.The ADA4961 is optimized for wideband, low distortion performance at frequencies up to 2 GHz. These attributes, together with wide gain adjustment and relatively low power, make the ADA4961 the amplifier of choice for many high speed applications, including IF, RF, and broadband applications where dynamic range at very high frequencies is critical.The ADA4961 is ideally suited for driving not only analog-to-digital converters (ADCs), but also mixers, pin diode attenuators, SAW filters, and multielement discrete devices. It is available in a 4 mm × 4 mm, 24-lead LFCSP and operates over a temperature range of −40°C to +85°C. Applications ADC driver for 10-bit to 14-bit GSPS converters RF/IF gain blocks Line drivers Instrumentation Satellite communications Data acquisition Military systems

The ADCMP380 is an ultralow power voltage comparator with internal reference suitable for use in general-purpose applications. The ultralow power consumption of this device makes it suitable for power efficiency sensitive systems, such as battery-powered portable devices and energy meters.The ADCMP380 is available with a 0.5 V and 1 V internal reference with ±2.2% and ±1.6% accuracy, respectively, over the full temperature range; this internal reference enables the device to monitor the node of interest accurately to 0.5 V. The enable input allows the user to hold the output low regardless of thestate of the input.The ADCMP380 is available in a 6-ball, 1.46 mm × 0.96 mm WLCSP and is specified over the temperature range of −40°C to +85°C.APPLICATIONS Portable/battery-operated equipment Battery monitors Energy harvesting

The ADCMP391 / ADCMP392 / ADCMP393 aresingle/dual/quad rail-to-rail input, low power comparators idealfor use in general-purpose applications. These comparatorsoperate from a single supply voltage of 2.3 V to 5.5 V and drawa minimal amount of current. The single ADCMP391consumes only 18.6 µA of supply current. The dual ADCMP392and the quad ADCMP393 consumes 22.1 µA and 26.8 µA ofsupply current, respectively. The low voltage and low currentoperation of these devices makes it ideal for battery-poweredsystems.The comparators features a common-mode input voltage rangeof 200 mV beyond rails, an offset voltage of 1 mV typical acrossthe full common-mode range, and a UVLO monitor. In addition,the design of the comparators allows a defined output stateupon power-up, a logic low output while the supply voltage isless than the UVLO threshold.The ADCMP391 and ADCMP392 are available in 8-lead,narrow body SOIC package while the ADCMP393 is availablein a 14-lead, narrow body SOIC package and a 14-lead TSSOPpackage. The comparators are specified to operate over the−40°C to +125°C extended temperature range.Applications Battery management/monitoring Power supply detection Window comparators Threshold detectors/discriminators Microprocessor systems

The ADF4355-3 allows the implementation of fractional-N orinteger-N phase-locked loop (PLL) frequency synthesizers whenused with an external loop filter and an external referencefrequency. A series of frequency dividers at the output provideoperation from 51.5625 MHz to 6600 MHz.The ADF4355-3 has an integrated VCO with a fundamentaloutput frequency ranging from 3300 MHz to 6600 MHz. Inaddition, the VCO frequency is connected to divide by 1, 2, 4, 8,16, 32, or 64 circuits that allow the user to generate RF outputfrequencies as low as 51.5625 MHz. For applications that requireisolation, the RF output stage can be muted. The mute functionis both pin- and software-controllable.Control of all on-chip registers is through a simple 3-wire interface.The ADF4355-3 operates with analog, digital, charge pump, andVCO power supplies ranging from 3.1515 V to 3.4485 V. TheADF4355-3 also contains hardware and software power-downmodes.Applications Wireless infrastructure (W-CDMA, TD-SCDMA, WiMAX, GSM, PCS, DCS, DECT) Point to point/point to multipoint microwave links Satellites/VSATs Test equipment/instrumentation Clock generation

The ADF5355 allows implementation of fractional-N or integer-N phase-locked loop (PLL) frequency synthesizers when used with an external loop filter and an external reference frequency. The wideband microwave VCO design permits frequency operation from 6.8 GHz to 13.6 GHz at one radio frequency (RF) output. A series of frequency dividers at another frequency output permits operation from 54 MHz to 6800 MHz.The ADF5355 has an integrated VCO with a fundamental output frequency ranging from 3400 MHz to 6800 MHz. In addition, the VCO frequency is connected to divide by 1, 2, 4, 8, 16, 32, or 64 circuits that allow the user to generate RF output frequencies as low as 54 MHz. For applications that require isolation, the RF output stage can be muted. The mute function is both pin and software controllable.Control of all on-chip registers is through a simple 3-wire interface. The ADF5355 operates with analog and digital power supplies ranging from 3.15 V to 3.45 V, with charge pump and VCO supplies from 4.75 V to 5.25 V. The ADF5355 also contains hardware and software power-down modes.Applications Wireless infrastructure (W-CDMA, TD-SCDMA, WiMAX, GSM, PCS, DCS, DECT) Point to point/point to multipoint microwave links Satellites/VSATs Test equipment/instrumentation Clock generation

The ADF5355 allows implementation of fractional-N or integer-N phase-locked loop (PLL) frequency synthesizers when used with an external loop filter and an external reference frequency. The wideband microwave VCO design permits frequency operation from 6.8 GHz to 13.6 GHz at one radio frequency (RF) output. A series of frequency dividers at another frequency output permits operation from 54 MHz to 6800 MHz.The ADF5355 has an integrated VCO with a fundamental output frequency ranging from 3400 MHz to 6800 MHz. In addition, the VCO frequency is connected to divide by 1, 2, 4, 8, 16, 32, or 64 circuits that allow the user to generate RF output frequencies as low as 54 MHz. For applications that require isolation, the RF output stage can be muted. The mute function is both pin and software controllable.Control of all on-chip registers is through a simple 3-wire interface. The ADF5355 operates with analog and digital power supplies ranging from 3.15 V to 3.45 V, with charge pump and VCO supplies from 4.75 V to 5.25 V. The ADF5355 also contains hardware and software power-down modes.Applications Wireless infrastructure (W-CDMA, TD-SCDMA, WiMAX, GSM, PCS, DCS, DECT) Point to point/point to multipoint microwave links Satellites/VSATs Test equipment/instrumentation Clock generation