50 V, 130 kHz, 32.5 A per Channel, Robust, Over-The-Top, Precision Op Amp Features: Ultrawide common-mode input range: −VS − 0.1 V to −VS + 70 V Wide power supply voltage range: +3 V to +50 V (to ±25 V for PSRR) Low power supply current: 32.5 μA (typical) Low input offset voltage: ±60 μV maximum Low input offset voltage drift: ±1 μV/°C maximum (B grade) Low input voltage noise 6 Hz typical 1/f noise corner 1000 nV p-p typical at 0.1 Hz to 10 Hz GBP: 130 kHz typical for fTEST = 250 Hz Slew rate: 0.1 V/μs typical at ΔVOUT = 4 V Low power supply current shutdown: 20 μA maximum Low input offset current: ±300 pA maximum Large signal voltage gain: 120 dB minimum for ΔVOUT = 3.5 V CMRR: 120 dB minimum at VCM = −0.1 V to +70 V PSRR: 123 dB minimum at VSY = +3 V to ±25 V Input overdrive tolerant with no phase reversal ±2 kV HBM and ±1.25 kV FICDM Wide temperature range: −55°C to +150°C (H grade) Shutdown feature available for single 6-lead TSOT and dual 10-lead LFCSP packages

50 V, 1 MHz, 165 A per Channel, Robust, Over-The-Top, Precision Op Amps Features: Ultrawide common-mode input range: −VS − 0.1 V to −VS + 70 V Wide power supply voltage range: +3 V to +50 V (to ±25 V for PSRR) Low power supply current: 165 μA per channel (typical) Low input offset voltage: ±35 μV maximum Low input offset voltage drift: ±0.5 μV/°C maximum (B grade) Low input voltage noise 1/f noise corner: 6 Hz typical 400 nV p-p typical at 0.1 Hz to 10 Hz 17 nV/√Hz typical at 100 Hz High speed GBP: 1.05 MHz typical for fTEST = 2.5 kHz Slew rate: 0.85 V/μs typical at ΔVOUT = 25 V Low power supply current shutdown: 20 μA maximum Low input offset current: ±700 pA maximum Large signal voltage gain: 126 dB minimum for ΔVOUT = 3.5 V CMRR: 120 dB minimum at VCM = −0.1 V to +70 V PSRR: 123 dB minimum at VSY = +3 V to ±25 V Input overdrive tolerant with no phase reversal ±3 kV HBM and ±1.25 kV FICDM Wide temperature range: −55°C to +150°C (H grade)

50 V, 8 MHz, 1.5 mA per Channel, Robust, Over-The-Top, Precision Op Amps Features: Ultrawide common-mode range: −VS − 0.1 V to −VS + 70 V Wide power supply voltage range: (VSY): +3.15 V to +50 V (±25 V for PSRR) Low supply current: 1.5 mA per channel (typical) Low input offset voltage: ±40 μV maximum Low input offset voltage drift: ±0.4 μV/°C maximum Low voltage noise: 1/f noise corner: 6 Hz typical 150 nV p-p typical at 0.1 Hz to 10 Hz 7 nV/√Hz typical at 100 Hz (en) High speed GBP: 8 MHz typical Slew rate: 5.5 V/μs typical at ΔVOUT = 25 V Low power shutdown: 20 μA maximum Low input bias current: ±10 nA maximum Large signal voltage gain: 120 dB minimum CMRR: 118 dB, minimum PSRR: 123 dB, minimum Input overdrive tolerant with no phase reversal ±2 kV HBM and ±1.25 kV FICDM Wide temperature range: −55°C to +150°C (H grade)

OVP and EMI Protected, Precision, Low Noise and Bias Current Single Op Amp Features: Low offset voltage: 60 μV maximum at 25°C (8-lead and 14-lead SOIC) Low offset voltage drift: 1 μV/°C maximum (8-lead and 14-lead SOIC) Low input bias current: 1 nA maximum at 25°C Low voltage noise density: 8 nV/√Hz typical at 1 kHz Large signal voltage gain (AVO): 100 dB minimum over full supply voltage and operating temperature Input overvoltage protection to 32 V above and below the supply voltage rail Integrated EMI filter 70 dB typical rejection at 1000 MHz 90 dB typical rejection at 2400 MHz Rail-to-rail output swing Low supply current: 500 μA typical per amplifier Wide bandwidth Gain bandwidth product (AV = 100): 3.5 MHz typical Unity-gain crossover (AV = 1): 3.5 MHz typical −3 dB bandwidth (AV = 1): 6 MHz typical Dual-supply operation Specified at ±5 V to ±15 V, operates over ±2.5 V to ±18 V Unity-gain stable No phase reversal Long-term offset voltage drift (10,000 hours): 2 μV typical Temperature hysteresis: 2 μV typical

Zero Drift, High Voltage, Low Power, Programmable Gain Instrumentation Amplifier Features: Optimized for ADC synchronization Low power: 22 mW (±12 V supplies) 12 binary gain steps from 1/16 V/V to 128 V/V 3 scaling gains: 1 V/V, 1.25 V/V, and 1.375 V/V ±60 V protected input multiplexer Excellent dc precision Low input offset voltage: ±14 μV maximum Low input offset voltage drift: ±0.08 μV/°C maximum Gain calibration via ROM Low gain drift: ±1 ppm/°C maximum High CMRR: 116 dB minimum, G = 1 V/V Low input bias current: ±1.5 nA maximum High input impedance Integrated input EMI filtering Wide input supply range: ±5 V to ±28 V Dedicated output amplifier supplies 7 GPIO ports with special functions Sequential chip select mode External multiplexer control Excitation current sources SPI port with checksum (CRC) support Internal fault detection Wire break test currents On-chip test multiplexer 28-lead, 5 mm × 5 mm LFCSP, 24-lead TSSOP Specified temperature range: −40°C to +105°C

Zero Drift, High Voltage, Low Power, Programmable Gain Instrumentation Amplifier Features: Optimized for ADC synchronization Low power: 22 mW (±12 V supplies) 12 binary gain steps from 1/16 V/V to 128 V/V 3 scaling gains: 1 V/V, 1.25 V/V, and 1.375 V/V ±60 V protected input multiplexer Excellent dc precision Low input offset voltage: ±14 μV maximum Low input offset voltage drift: ±0.08 μV/°C maximum Gain calibration via ROM Low gain drift: ±1 ppm/°C maximum High CMRR: 116 dB minimum, G = 1 V/V Low input bias current: ±1.5 nA maximum High input impedance Integrated input EMI filtering Wide input supply range: ±5 V to ±28 V Dedicated output amplifier supplies 7 GPIO ports with special functions Sequential chip select mode External multiplexer control Excitation current sources SPI port with checksum (CRC) support Internal fault detection Wire break test currents On-chip test multiplexer 28-lead, 5 mm × 5 mm LFCSP, 24-lead TSSOP Specified temperature range: −40°C to +105°C

Bridge Sensor Signal Conditioner IC with LIN Interface, Nonlinearity Correction, Temperature Compensation Features:LIN 2.1 compliant interface (bridge sensor signal, temperature)Digitally programmable gain and offset voltage adjustmentGain range from 2.94 V/V to 971.10 V/VSensor temperature compensation (first- or second-order)Sensor nonlinearity correction (first- or second-order)Internal or external temperature sensor compensationEEPROM nonvolatile memory for calibration dataHigh system accuracy: 0.1% FSR over temperatureEMC and EMI protectionFault protection for open circuits and short circuits4 mm 4 mm, 20-lead LFCSP6 V to 18 V supply operation40C to +150C operating temperature rangeAEC-Q100 qualified for automotive applications

16-Bit, 15 MSPS, Module Data Acquisition Solution Features: Integrated fully differential ADC driver with signal scaling Wide input common range High common-mode rejection Single-ended to differential conversion 2.048 V input range with 4.096 V REFBUF Critical passive components 0.005% precision matched resistor array for FDA 9 mm × 9 mm, 0.8 mm pitch, 100-ball BGA package 4× footprint reduction versus discrete solution Low power, dynamic power scaling, power-down mode 143 mW typical at 15 MSPS Throughput: 15 MSPS, no pipeline delay INL: 0.4 LSB typical, 1 LSB maximum SINAD: 89 dB typical at 1 kHz THD: 115 dB at 1 kHz, 106 dB at 400 kHz Gain error: 0.005% FS typical Gain error drift: 1 ppm/C maximum On-board reference buffer with VCMO generation Serial LVDS interface Wide operating temperature range: 40C to +85C

10 GHz to 40 GHz, 1:4 Channel, 4 Frequency Multiplier/Filter Features: 4 input frequency multiplier with programmable harmonic filter Quad Differential Output PAs with independent Enable Control Input Frequency Range: 2.5 GHz to 10 GHz Output Frequency Range: 10 GHz to 40 GHz Input power: 20 dBm (50 ) Output power: 5 dBm differential (100 ) Harmonic rejection: 20 dBc to 40 dBc at all frequencies 3-Wire or 4-Wire SPI Control of all functions On-Chip Programmable State Machines for fast multiplier/filter and transmitter switching and control On-chip temperature sensor, output power detectors, and ADC DC power: 450 mW (2.5 V supply) 6 mm 6 mm, 40-terminal LGA package

SigmaDSP Digital Audio Processor Features: Qualified for automotive applications Fully programmable audio DSP for enhanced sound processing Features SigmaStudio, a proprietary graphical programming tool for the development of custom signal flows Clock oscillator for generating master clock from crystal Up to 294.912 MHz, 32-bit SigmaDSP core at 1.2 V Up to 6144 SIMD instructions per sample at 48 kHz Up to 40 kWords of parameter/data RAM Up to 800 ms digital audio delay pool at 48 kHz Audio input/output and routing 4 serial input ports, 4 serial output ports 48-channel, 32-bit digital input/output up to a sample rate of 192 kHz Flexible configuration for TDM, I2S, left and right justified formats, and PCM Up to 8 stereo ASRCs from 1:8 up to 7.75:1 ratio and 139 dB DNR Stereo S/PDIF input and output Four PDM microphone input channels Multichannel, byte addressable, TDM serial ports Integer PLL and flexible clock generators Integrated die temperature sensor