The ADR3412 / ADR3420 / ADR3425 / ADR3430 / ADR3433 / ADR3440 / ADR3450 are low-cost, low-power, high precision voltage references, featuring ± 0.1% initial accuracy, low operating current and low output noise in a small SOT23 package. For high accuracy, output voltage and temperature coefficient are trimmed digitally during final assembly using Analog Devices’ proprietary DigiTrim® technology. Stability and reliability are further improved by the devices’ low output voltage hysteresis and low long-term output voltage drift. Furthermore, the low operating current of the device (100 μA max) facilitates usage in low-power devices, while its low output noise helps maintain signal integrity in critical signal processing systems.These CMOS are available in a wide range of output voltages, all of which are specified over the industrial temperature range of −40°C to +125 °C.APPLICATIONS Precision data acquisition systems Industrial instrumentation Medical devices Battery-powered devices

The ADRF6702 provides a quadrature modulator and synthesizer solution within a small 6 mm × 6 mm footprint while requiring minimal external components.The ADRF6702 is designed for RF outputs from 1200 MHz to 2400 MHz. The low phase noise VCO and high performance quadrature modulator make the ADRF6702 suitable for next generation communication systems requiring high signal dynamic range and linearity. The integration of the IQ modulator, PLL, and VCO provides for significant board savings and reduces the BOM and design complexity.The integrated fractional-N PLL/synthesizer generates a 2× fLO input to the IQ modulator. The phase detector together with an external loop filter is used to control the VCO output. The VCO output is applied to a quadrature divider. To reduce spurious components, a sigma-delta (Σ-Δ) modulator controls the programmable PLL divider.The IQ modulator has wideband differential I and Q inputs, which support baseband as well as complex IF architectures. The single-ended modulator output is designed to drive a 50 Ω load impedance and can be disabled.The ADRF6702 is fabricated using an advanced silicon-germanium BiCMOS process. It is available in a 40-lead, exposed-paddle, Pb-free, 6 mm × 6 mm LFCSP package. Performance is specified from −40°C to +85°C. A lead-free evaluation board is available.APPLICATIONS Cellular communications systems        GSM/EDGE, CDMA2000, W-CDMA, TD-SCDMA, LTE Broadband wireless access systems Satellite modems

The fourth generation of SHARC® Processors now includes the low power floating point DSP products – the ADSP-21478 and ADSP-21479 and offers increased performance, hardware-based filter accelerators, audio and application-focused peripherals, and new memory configurations capable of supporting a single chip solution. All devices are pin-compatible with each other and completely code-compatible with all prior SHARC Processors. These newest members of the fourth generation SHARC Processor family are based on a single-instruction, multiple-data (SIMD) core, which supports both 32-bit fixed-point and 32-/40-bit floating-point arithmetic formats and their low power make them particularly suitable for battery powered applications or where a higher ambient operating temperature is required.The ADSP-21478 offers a very low power and high performance – 266 MHz/1596 MFLOPs – in a BGA and LQFP package within the fourth generation SHARC Processor family. This feature of power makes the ADSP-21478 particularly well suited to address the automotive audio and many industrial control segments where low power is a requirement. In addition to its high core performance, the ADSP-21478 includes additional processing blocks such as FIR, IIR, and FFT accelerators to increase the total performance of the system. There is a new feature called Variable Instruction Set Architecture (VISA) that allows the code size to be decreased by 20% to 30% and increase the memory size availability. The fourth generation DSP allows the ability to connect to external memory by providing a glueless interface to 16-bit wide SDR SDRAMs.Fourth-generation SHARC Processors also integrate application-specific peripherals designed to simplify hardware design, minimize design risks, and ultimately reduce time to market. Grouped together, and broadly named the Digital Applications Interface (DAI), these functional blocks may be connected to each other or to external pins via the software-programmable Signal Routing Unit (SRU). The SRU is an innovative architectural feature that enables complete and flexible routing amongst DAI blocks. Peripherals connected through the SRU include but are not limited to serial ports, SPI ports, S/PDIF Tx/Rx, and an 8-Channel asynchronous sample rate converter block. The fourth generation SHARC allows data from the serial ports to be directly transferred to external memory by the DMA controller. Other peripherals such as UART and Two-Wire Interface are routed through a Digital Peripheral Interface (DPI).

The fourth generation of SHARC® Processors now includes the low power floating point DSP products – the ADSP-21478 and ADSP-21479 and offers increased performance, hardware-based filter accelerators, audio and application-focused peripherals, and new memory configurations capable of supporting a single chip solution. All devices are pin-compatible with each other and completely code-compatible with all prior SHARC Processors. These newest members of the fourth generation SHARC Processor family are based on a single-instruction, multiple-data (SIMD) core, which supports both 32-bit fixed-point and 32-/40-bit floating-point arithmetic formats and their low power make them particularly suitable for battery powered applications or where a higher ambient operating temperature is required.The ADSP-21479 offers a very low power and high performance – 266 MHz/1596 MFLOPs – in a BGA and LQFP package within the fourth generation SHARC Processor family. This feature of power makes the ADSP-21479 particularly well suited to address the automotive audio and many industrial control segments where low power is a requirement. In addition to its high core performance, the ADSP-21479 includes additional processing blocks such as FIR, IIR, and FFT accelerators to increase the total performance of the system. There is a new feature called Variable Instruction Set Architecture (VISA) that allows the code size to be decreased by 20% to 30% and increase the memory size availability. The fourth generation DSP allows the ability to connect to external memory by providing a glueless interface to 16-bit wide SDR SDRAMs. Fourth-generation SHARC Processors also integrate application-specific peripherals designed to simplify hardware design, minimize design risks, and ultimately reduce time to market. Grouped together, and broadly named the Digital Applications Interface (DAI), these functional blocks may be connected to each other or to external pins via the software-programmable Signal Routing Unit (SRU). The SRU is an innovative architectural feature that enables complete and flexible routing amongst DAI blocks. Peripherals connected through the SRU include but are not limited to serial ports, SPI ports, S/PDIF Tx/Rx, and an 8-Channel asynchronous sample rate converter block. The fourth generation SHARC allows data from the serial ports to be directly transferred to external memory by the DMA controller. Other peripherals such as UART and Two-Wire Interface are routed through a Digital Peripheral Interface (DPI).

The SHARC ADSP-21489 is one of two new members of the fourth generation of SHARC® Processors that now includes the ADSP-21483, ADSP-21486, ADSP-21487, ADSP-21488, ADSP-21489 and offers increased performance, hardware-based filter accelerators, audio and application-focused peripherals, and new memory configurations capable of supporting the latest surround-sound decoder algorithms. All devices are pin-compatible with each other and completely code-compatible with all prior SHARC Processors. These newest members of the fourth generation SHARC Processor family are based on a single-instruction, multiple-data (SIMD) core, which supports both 32-bit fixed-point and 32-/40-bit floating-point arithmetic formats making them particularly suitable for high-performance audio applications.The ADSP-21489 offers the highest performance–450 MHz/2700 MFLOPs–in an LQFP package within the fourth generation SHARC Processor family. This level of performance makes the ADSP-21489 particularly well suited to address the automotive audio and industrial control segments. In addition to its high core performance, the ADSP-21489 includes additional processing blocks such as FIR, IIR, and FFT accelerators to increase the total performance of the system. There is a new feature called Variable Instruction Set Architecture (VISA) that allows the code size to be decreased by 20% to 30% and increase the memory size availability. The fourth generation DSP allows the ability to connect to external memory by providing a glueless interface to 16-bit wide SDR SDRAMs.Fourth-generation SHARC Processors also integrate application-specific peripherals designed to simplify hardware design, minimize design risks, and ultimately reduce time to market. Grouped together, and broadly named the Digital Applications Interface (DAI), these functional blocks may be connected to each other or to external pins via the software-programmable Signal Routing Unit (SRU). The SRU is an innovative architectural feature that enables complete and flexible routing amongst DAI blocks. Peripherals connected through the SRU include but are not limited to serial ports, IDP, S/PDIF Tx/Rx, and an 8-Channel asynchronous sample rate converter block. The fourth generation SHARC allows data from the serial ports to be directly transferred to external memory by the DMA controller. Other peripherals such as SPI,UART and Two-Wire Interface are routed through a Digital Peripheral Interface (DPI).

The BF504 is a low cost member of the Blackfin portfolio of processors. With a 400 MHz core clock speed and a unique peripheral set including two three-phase PWM units, an ADC Control Module, two SPI’s, two SPORT’s, a CAN controller, a PPI, eight general purpose counters and a Removable Storage Interface, the BF504 is feature and cost optimized for compute intensive industrial and general purpose applications that do not require external memory or executable flash. The BF504 is offered in a low cost 12 × 12mm LFCSP package in commercial and industrial temperature grades.

The BF592 is the low cost entry point into the Blackfin portfolio of processors. With core clock speeds of 200 and 400 MHz and a peripheral set including two SPORT’s, a PPI, two SPI’s, four general purpose counters and a factory-programmed Instruction ROM block containing the VDK RTOS and C-runtime libraries, the BF592 is feature and cost optimized for compute intensive industrial, automotive, and general purpose applications that do not require external memory or executable flash. The BF592 is offered in a low cost 9×9mm LFCSP package in commercial and industrial temperature grades as well as automotive qualified. 

The ADuC7023 is a fully integrated, 1 MSPS, 12-bit data acquisition system, incorporating high performance multichannel ADCs, 16-bit/32-bit MCUs, and Flash/EE memory on a single chip.The ADC consists of up to 12 single-ended inputs. An additional four inputs are available but are multiplexed with the four DAC output pins. The ADC can operate in single-ended or differential input modes. The ADC input voltage is 0 V to VREF. A low drift band gap reference, temperature sensor, and voltage comparator complete the ADC peripheral set.The DAC output range is programmable to one of two voltage ranges. The DAC outputs have an enhanced feature of being able to retain their output voltage during a watchdog or software reset sequence.The devices operate from an on-chip oscillator and a PLL, generating an internal high frequency clock of 41.78 MHz. This clock is routed through a programmable clock divider from which the MCU core clock operating frequency is generated. The microcontroller core is an ARM7TDMI®, 16-bit/32-bit RISC machine that offers up to 41 MIPS peak performance. Eight kilobytes of SRAM and 62 kilobytes of nonvolatile Flash/EE memory are provided on chip. The ARM7TDMI core views all memory and registers as a single linear array.The ADuC7023 contains an advanced interrupt controller. The vectored interrupt controller (VIC) allows every interrupt to be assigned a priority level. It also supports nested interrupts to a maximum level of eight per IRQ and FIQ. When IRQ and FIQ interrupt sources are combined, a total of 16 nested interrupt levels are supported.On-chip factory firmware supports in-circuit download via the I2C serial interface port, and non-intrusive emulation is supported via the JTAG interface. These features are incorporated into a low cost QuickStart™ development system supporting this MicroConverter® family. The part contains a 16-bit PWM with five output signals.For communication purposes, the part contains 2 × I2C channels that can be individually configured for master or slave mode. An SPI interface supporting both master and slave modes is also provided.The parts operate from 2.7 V to 3.6 V and are specified over an industrial temperature range of −40°C to +125°C. The ADuC7023 is available in either a 32-lead or 40-lead LFCSP package. A 36-ball wafer level CSP package (WLCSP) is also available.Applications Optical networking Industrial control and automation systems Smart sensors, precision instrumentation Base station systems

The ADuC7023 is a fully integrated, 1 MSPS, 12-bit data acquisition system, incorporating high performance multichannel ADCs, 16-bit/32-bit MCUs, and Flash/EE memory on a single chip.The ADC consists of up to 12 single-ended inputs. An additional four inputs are available but are multiplexed with the four DAC output pins. The ADC can operate in single-ended or differential input modes. The ADC input voltage is 0 V to VREF. A low drift band gap reference, temperature sensor, and voltage comparator complete the ADC peripheral set.The DAC output range is programmable to one of two voltage ranges. The DAC outputs have an enhanced feature of being able to retain their output voltage during a watchdog or software reset sequence.The devices operate from an on-chip oscillator and a PLL, generating an internal high frequency clock of 41.78 MHz. This clock is routed through a programmable clock divider from which the MCU core clock operating frequency is generated. The microcontroller core is an ARM7TDMI®, 16-bit/32-bit RISC machine that offers up to 41 MIPS peak performance. Eight kilobytes of SRAM and 62 kilobytes of nonvolatile Flash/EE memory are provided on chip. The ARM7TDMI core views all memory and registers as a single linear array.The ADuC7023 contains an advanced interrupt controller. The vectored interrupt controller (VIC) allows every interrupt to be assigned a priority level. It also supports nested interrupts to a maximum level of eight per IRQ and FIQ. When IRQ and FIQ interrupt sources are combined, a total of 16 nested interrupt levels are supported.On-chip factory firmware supports in-circuit download via the I2C serial interface port, and non-intrusive emulation is supported via the JTAG interface. These features are incorporated into a low cost QuickStart™ development system supporting this MicroConverter® family. The part contains a 16-bit PWM with five output signals.For communication purposes, the part contains 2 × I2C channels that can be individually configured for master or slave mode. An SPI interface supporting both master and slave modes is also provided.The parts operate from 2.7 V to 3.6 V and are specified over an industrial temperature range of −40°C to +125°C. The ADuC7023 is available in either a 32-lead or 40-lead LFCSP package. A 36-ball wafer level CSP package (WLCSP) is also available.Applications Optical networking Industrial control and automation systems Smart sensors, precision instrumentation Base station systems

The ADuC7122 is a fully integrated, 1 MSPS, 12-bit data acquisition system, incorporating high performance multichannel ADCs, 12 voltage output DACs, 16-bit/32-bit MCUs, and Flash/EE memory on a single chip. The ADC consists of up to 13 inputs. Four of these inputs can be configured as differential pairs with a Programmable Gain Amplifier on their front end providing a gain between 1 and 5. The ADC can operate in single-ended or differential input modes. The ADC input voltage is 0 V to VREF. A low drift band gap reference, temperature sensor, and supply voltage monitor complete the ADC peripheral set.The DAC output range is programmable to one of two voltage ranges. The DAC outputs have an enhanced feature of being able to retain their output voltage during a watchdog or software reset sequence.The devices operate from an on-chip oscillator and a PLL, generating an internal high frequency clock of 41.78 MHz. This clock is routed through a programmable clock divider from which the MCU core clock operating frequency is generated. The microcontroller core is an ARM7TDMI®, 16-bit/32-bit RISC machine that offers up to 41 MIPS peak performance. Eight kilobytes of SRAM and 126 kilobytes of nonvolatile Flash/EE memory are provided on chip. The ARM7TDMI core views all memory and registers as a single linear array.The ADuC7122 contains an advanced interrupt controller. The vectored interrupt controller (VIC) allows every interrupt to be assigned a priority level. It also supports nested interrupts to a maximum level of eight per IRQ and FIQ. When IRQ and FIQ interrupt sources are combined, a total of 16 nested interrupt levels are supported.On-chip factory firmware supports in-circuit download via the I2C serial interface port, while nonintrusive emulation is also supported via the JTAG interface. These features are incorporated into a low cost QuickStart™ Development System supporting this MicroConverter® family. The part contains a 16-bit PWM with six output signals.For communication purposes, the part contains 2 × I2C channels that can be individually configured for master or slave mode. An SPI¯ interface supporting both master and slave modes is also provided.The parts operate from 3.0 V to 3.6 V and are specified over atemperature range of −10°C to +95°C. The ADuC7122 is available in a 108-Ball BGA package.APPLICATIONS Optical networking, industrial control, and automation systems Smart sensors, precision instrumentation, base station systems