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DLPC3436CZVB
|
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INA351CDSIRUGR
|
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LM63460AASQRYFRQ1
|
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LM74700QDRQ1
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LMK6CE12500CDLER
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LMQ644A2QRXARQ1
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CDCDB803ERSLT
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TLV1821LQDBVRQ1
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TPS631011YBGR
|
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TPS6503300IQRGERQ1
|
| Price |
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| RoHS |
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Not Compliant |
Y |
Y |
Y |
Y |
Not Compliant |
Y |
Y |
Y |
Y |
| Lead Status |
|
Y |
Y |
Y |
Y |
Y |
See ti.com |
Y |
Y |
Y |
Y |
| Input frame rate(Max)(Hz) |
|
60 |
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| Approx. price(US$) |
|
17 | 1ku |
.247 | 1ku |
2.138 | 1ku |
.791 | 1ku |
.72 | 1ku |
2.8 | 1ku |
2.328 | 1ku |
.401 | 1ku |
.45 | 1ku |
1.119 | 1ku |
| Component type |
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Display Controller |
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| Rating |
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Catalog |
Catalog |
Automotive |
Automotive |
Catalog |
Automotive |
Catalog |
Automotive |
Catalog |
Automotive |
| Video ports |
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24-bit RGB, Parallel |
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| Chipset family |
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DLP230NP,DLPC3436,DLPA2000,DLPA2005,DLPA3000 |
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| Display resolution(Max) |
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1080p (1920x1080) |
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| Bandwidth at min gain(typ)(MHz) |
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0.1 |
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| CMRR(min)(dB) |
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86 |
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| Features |
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Cost Optimized,Low power,Shutdown,Small Size |
Enable,Frequency synchronization,Light Load Efficiency,Over Current Protection,Power good,Soft Start Fixed,Spread Spectrum,Synchronous Rectification,Wettable flanks package |
Automotive load dump compatibility,Enable,Linear control,Reverse current blocking,Reverse polarity protection |
Fixed frequency |
Enable,Frequency synchronization,Over Current Protection,Power good,Spread Spectrum,Synchronous Rectification,Wettable flanks package |
1 |
POR |
Enable,Light Load Efficiency,Load Disconnect,Quick output discharge,Synchronous Rectification,UVLO Fixed |
I2C control,Overcurrent protection,Power good,Power sequencing,Power supply and system monitoring,Spread-Spectrum Clock (SSC) Generation,Thermal shutdown,UVLO fixed |
| Gain error ()(max)(%) |
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0.1 |
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| Input common mode headroom (to negative supply)(typ)(V) |
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0 |
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| Input common mode headroom (to positive supply)(typ)(V) |
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0 |
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| Input offset ()(max)(V) |
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1300 |
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| Iq(typ)(mA) |
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0.11 |
0.007 |
0.08 |
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0.04 |
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0.008 |
0.1 |
| Noise at 0.1 Hz to 10 Hz(typ)(VPP) |
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3.2 |
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| Noise at 1 kHz(typ)(nVHz) |
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36 |
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| Number of channels |
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1 |
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1 |
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1 |
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| Operating temperature range(C) |
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-40 |
-40 |
-40 |
-40 |
-40 |
-40 |
-40 |
-40 |
-40 |
| Output swing headroom (to negative supply)(typ)(V) |
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0.015 |
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| Output swing headroom (to positive supply)(typ)(V) |
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0.015 |
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| Package area(mm^2) |
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3 |
14 |
29.4 |
8 |
20 |
36 |
8.12 |
1.752689 |
16 |
| Package size (L x W)(mm) |
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|
1.5 x 2 |
4 x 3.5 |
4.9 x 6 |
3.2 x 2.5 |
5 x 4 |
6 x 6 |
2.9 x 2.8 |
1.783 x 0.983 |
4 x 4 |
| Package type |
|
|
X2QFN |
VQFN-FCRLF |
SOIC |
VSON |
VQFN-FCRLF |
VQFN |
SOT-23 |
DSBGA |
VQFN |
| Pin count |
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|
10 |
22 |
8 |
4 |
24 |
48 |
5 |
8 |
24 |
| TI functional safety category |
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Functional Safety-Capable |
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| TI package name |
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RUG |
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| Voltage gain(max)(V/V) |
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50 |
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| Voltage gain(min)(V/V) |
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10 |
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| Vs(max)(V) |
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5.5 |
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40 |
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| Vs(min)(V) |
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1.8 |
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2 |
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| TI.com inventory |
|
|
14350 |
500 |
11950 |
8740 |
60 |
20750 |
5470 |
94842 |
9474 |
| Control mode |
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|
current mode |
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current mode |
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| Duty cycle(max)(%) |
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87 |
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98 |
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90 |
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| EMI features |
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Low parasitic Hotrod packaging,Spread Spectrum |
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Low parasitic Hotrod packaging,Spread Spectrum |
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| Iout(max)(A) |
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6 |
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12 |
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2 |
1.5 |
| Maximum package height(mm) |
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1.05 |
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1.05 |
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| Regulated outputs(#) |
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1 |
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2 |
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4 |
| Switching frequency(max)(kHz) |
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2200 |
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2.2,2200 |
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2200 |
2420 |
| Switching frequency(min)(kHz) |
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200 |
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400 |
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1800 |
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| Type |
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Converter |
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Converter |
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Converter |
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| Vin(max)(V) |
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36 |
70 |
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36 |
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5.5 |
18.3 |
| Vin(min)(V) |
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3 |
3.2 |
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3 |
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1.6 |
4 |
| Vout(max)(V) |
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34.2 |
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20 |
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5.5 |
4 |
| Vout(min)(V) |
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1 |
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0.8 |
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1.2 |
0.9 |
| Design support |
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EVM,Simulation Model |
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| Device type |
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Ideal diode controller |
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| FET |
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External single FET |
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| IGate pulsed(typ)(A) |
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2.37 |
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| IGate sink(typ)(mA) |
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2370 |
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| IGate source(typ)(A) |
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11000 |
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| Iq(max)(mA) |
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|
0.13 |
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| Product type |
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Ideal diode controller |
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Camera sensor |
| Shutdown current (ISD) (mA)(A) |
|
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|
0.001 |
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| VSense reverse(typ)(mV) |
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-11 |
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| Jitter(ps) |
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0.2 |
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| Output frequency(MHz) |
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|
125 |
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| Output type |
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LVCMOS |
|
LP-HCSL |
Open-collector,Open-drain |
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| Stability(ppm) |
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+/-25 |
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| Supply voltage(V) |
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2.5,3.3 |
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| Additive RMS jitter(typ)(fs) |
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38 |
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| Core supply voltage(V) |
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3.3 |
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| Function |
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Clock buffer,Differential |
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| Input type |
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LP-HCSL |
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| Number of outputs |
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8 |
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| Output frequency(max)(MHz) |
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|
250 |
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| Output skew(ps) |
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50 |
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| Output supply voltage(V) |
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3.3 |
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| Input bias current ()(max)(nA) |
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1.2 |
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| Iq per channel(typ)(mA) |
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|
0.005 |
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| Propagation delay time(s) |
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0.42 |
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| Rail-to-rail |
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In |
|
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| VICR(max)(V) |
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|
40.2 |
|
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| VICR(min)(V) |
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-0.2 |
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| Vos (offset voltage at 25C)(max)(mV) |
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4 |
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| Switch current limit(typ)(A) |
|
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3 |
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| Topology |
|
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Buck-Boost |
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| Configurability |
|
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Factory programmable,Software configurable,User programmable |
| LDO |
|
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|
1 |
| Pitch(mm) |
|
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|
0.5 |
| Step-down DC/DC converter |
|
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3 |
| Step-up DC/DC controller |
|
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0 |
| Switching frequency(typ)(kHz) |
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|
2300 |
