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|
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SNJ54LS367AJ
|
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SN74HC32D
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SN65LVDS2DBVT
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UCC2895PWTR
|
| Price |
|
|
|
|
|
|
|
$0.20 |
$0.61 |
|
$4.96 |
| RoHS |
|
No |
Yes |
Compliant |
Yes |
Yes |
Yes |
Yes |
Yes |
Compliant |
Yes |
| Lead Status |
|
No |
Yes |
Y |
Yes |
Yes |
Yes |
Yes |
Yes |
No |
Yes |
| Output Type |
|
TTL |
CMOS |
|
|
TTL |
Open Collector |
|
CMOS |
|
|
| Technology Family |
|
LS |
LVC |
LS |
ALS |
F |
|
HC |
AHC |
|
|
| Rating |
|
Military |
Catalog |
Catalog |
Catalog |
Catalog |
Catalog |
Catalog |
Catalog |
Catalog |
Catalog |
| Package Size |
|
mm2 |
mm2 |
mm2 |
mm2 |
mm2 |
mm2 |
mm2 |
mm2 |
mm2 |
|
| Schmitt Trigger |
|
No |
No |
No |
No |
No |
|
No |
No |
|
|
| Package Group |
|
CDIP,CFP,LCCC |
DSBGA,SM8,VSSOP |
PDIP,SO,SOIC |
PDIP,SO,SOIC |
PDIP,SO,SOIC,SSOP |
PDIP,SO,SOIC,TSSOP |
PDIP,TSSOP,SO,SOIC,SSOP |
SC70,SOT,SOT-23 |
SOIC,SOT-23 |
PDIP,PLCC,SOIC,TSSOP,WAFERSALE |
| Voltage(Nom)(V) |
|
5 |
1.8,2.5,3.3,5 |
5 |
5 |
5 |
|
5 |
3.3,5 |
|
|
| Operating Temperature Range(C) |
|
-55 to 125 |
-40 to 125,-40 to 85 |
0 to 70 |
0 to 70 |
0 to 70 |
-40 to 85,-55 to 125,0 to 70 |
-40 to 85 |
-40 to 125 |
-40 to 85 |
-40 to 85 |
| Input Type |
|
TTL |
CMOS/TTL |
|
|
TTL |
|
|
CMOS |
|
|
| VCC(Max)(V) |
|
5.5 |
5.5 |
5.25 |
5.5 |
5.5 |
|
6 |
5.5 |
|
|
| Bits(#) |
|
6 |
1 |
8 |
8 |
8 |
|
4 |
1 |
|
|
| VCC(Min)(V) |
|
4.5 |
1.65 |
4.75 |
4.5 |
4.5 |
|
2 |
2 |
|
|
| 3-State Output |
|
|
No |
No |
Yes |
Yes |
|
|
No |
|
|
| Special Features |
|
|
Ioff,down translation to Vcc,low power |
|
|
|
N/A |
|
Down translation to Vcc,low power |
|
Error Amplifier,Multi-topology,Soft Start,Soft Switching,Synchronization Pin |
| Output Drive (IOL/IOH)(Max)(mA) |
|
|
32/-32 |
8/-0.4 |
24/-2.6 |
24/-3 |
|
5.2/-5.2 |
8/-8 |
|
|
| Logic |
|
|
True |
|
|
True |
|
|
Inverting |
|
|
| tpd @ Nom Voltage(Max)(ns) |
|
|
13.4,7.1,5.9,4.1 |
27 |
16 |
8 |
|
25 |
10.6,7.5 |
|
|
| ICC @ Nom Voltage(Max)(mA) |
|
|
0.01 |
27 |
31 |
55 |
|
0.02 |
0.01 |
|
|
| F @ Nom Voltage(Max)(Mhz) |
|
|
150 |
35 |
75 |
70 |
|
70 |
75 |
|
|
| Sub-Family |
|
|
D-Type Flip-Flop |
|
|
|
|
|
Inverting Buffer/Driver |
|
|
| Gate Type |
|
|
FLIP-FLOP |
|
|
|
|
|
INVERTER BUFFER |
|
|
| Approx. Price (US$) |
|
|
0.14 | 1ku |
0.30 | 1ku |
0.36 | 1ku |
0.28 | 1ku |
0.46 | 1ku |
0.07 | 1ku |
0.05 | 1ku |
0.53 | 1ku |
3.10 | 1ku |
| Vs(Min)(V) |
|
|
|
|
|
|
3 |
|
|
|
|
| tRESP Low - to - High(us) |
|
|
|
|
|
|
0.2 |
|
|
|
|
| Input Bias Current (+/-)(Max)(nA) |
|
|
|
|
|
|
0.03 |
|
|
|
|
| Vs(Max)(V) |
|
|
|
|
|
|
16 |
|
|
|
|
| Iq per channel(Max)(mA) |
|
|
|
|
|
|
0.15 |
|
|
|
|
| Number of Channels(#) |
|
|
|
|
|
|
4 |
|
|
|
|
| Vos (Offset Voltage @ 25C)(Max)(mV) |
|
|
|
|
|
|
5 |
|
|
|
|
| Rail-to-Rail |
|
|
|
|
|
|
Out |
|
|
|
|
| VICR(Max)(V) |
|
|
|
|
|
|
15 |
|
|
|
|
| VICR(Min)(V) |
|
|
|
|
|
|
0 |
|
|
|
|
| ESD HBM(kV) |
|
|
|
|
|
|
|
|
|
9 |
|
| Input Signal |
|
|
|
|
|
|
|
|
|
LVDS |
|
| No. of Rx |
|
|
|
|
|
|
|
|
|
1 |
|
| ICC(Max)(mA) |
|
|
|
|
|
|
|
|
|
8 |
|
| Signaling Rate(Mbps) |
|
|
|
|
|
|
|
|
|
400 |
|
| Function |
|
|
|
|
|
|
|
|
|
Receiver |
|
| Output Signal |
|
|
|
|
|
|
|
|
|
LVTTL |
|
| Duty Cycle(Max)(%) |
|
|
|
|
|
|
|
|
|
|
100 |
| Vin(Min)(V) |
|
|
|
|
|
|
|
|
|
|
9 |
| Topology |
|
|
|
|
|
|
|
|
|
|
Full-Bridge |
| Gate Drive(Typ)(A) |
|
|
|
|
|
|
|
|
|
|
0.1 |
| UVLO Thresholds On/Off(V) |
|
|
|
|
|
|
|
|
|
|
11/9 |
| Frequency(Max)(kHz) |
|
|
|
|
|
|
|
|
|
|
1000 |
| Control Method |
|
|
|
|
|
|
|
|
|
|
Current,Feedforward,Voltage |
| Vin(Max)(V) |
|
|
|
|
|
|
|
|
|
|
17 |
