The AD4001/AD4005 are high accuracy, high speed, low power, 16-bit, Easy Drive, precision successive approximation register (SAR) analog-to-digital converters (ADCs) that operate from a single power supply, VDD. The reference voltage, VREF, is applied externally and can be set independent of the supply voltage. The AD4001/AD4005 power scales linearly with throughput. Easy Drive features reduce both signal chain complexity and power consumption while enabling higher channel density. The reduced input current, particularly in high-Z mode, coupled with a long signal acquisition phase, eliminates the need for a dedicated ADC driver. Easy Drive broadens the range of companion circuitry that is capable of driving these ADCs (see Figure 2 in the data sheet).Input span compression eliminates the need to provide a negative supply to the ADC driver amplifier while preserving access to the full ADC code range. The input overvoltage clamp protects the ADC inputs against overvoltage events, minimizing disturbances on the reference pin and eliminating the need for external protection diodes. Fast device throughput up to 2 MSPS allows users to accurately capture high frequency signals and to implement oversampling techniques to alleviate the challenges associated with antialias filter designs. Decreased serial peripheral interface (SPI) clock rate requirements reduce digital input and output power consumption, broadens digital host options, and simplifies the task of sending data across digital isolation. The SPI-compatible serial user interface is compatible with 1.8 V, 2.5 V, 3 V, and 5 V logic by using the separate VIO logic supply.APPLICATIONS Automated test equipment Machine automation Medical equipment Battery-powered equipment Precision data acquisition systems Instrumentation and control systems

The AD4001/AD4005 are high accuracy, high speed, low power, 16-bit, Easy Drive, precision successive approximation register (SAR) analog-to-digital converters (ADCs) that operate from a single power supply, VDD. The reference voltage, VREF, is applied externally and can be set independent of the supply voltage. The AD4001/AD4005 power scales linearly with throughput. Easy Drive features reduce both signal chain complexity and power consumption while enabling higher channel density. The reduced input current, particularly in high-Z mode, coupled with a long signal acquisition phase, eliminates the need for a dedicated ADC driver. Easy Drive broadens the range of companion circuitry that is capable of driving these ADCs (see Figure 2 in the data sheet).Input span compression eliminates the need to provide a negative supply to the ADC driver amplifier while preserving access to the full ADC code range. The input overvoltage clamp protects the ADC inputs against overvoltage events, minimizing disturbances on the reference pin and eliminating the need for external protection diodes. Fast device throughput up to 2 MSPS allows users to accurately capture high frequency signals and to implement oversampling techniques to alleviate the challenges associated with antialias filter designs. Decreased serial peripheral interface (SPI) clock rate requirements reduce digital input and output power consumption, broadens digital host options, and simplifies the task of sending data across digital isolation. The SPI-compatible serial user interface is compatible with 1.8 V, 2.5 V, 3 V, and 5 V logic by using the separate VIO logic supply.APPLICATIONS Automated test equipment Machine automation Medical equipment Battery-powered equipment Precision data acquisition systems Instrumentation and control systems

The AD4003/AD4007/AD4011 are high accuracy, high speed, low power, 18-bit, Easy Drive, precision successive approximation register (SAR) analog-to-digital converters (ADCs) that operate from a single power supply, VDD. The reference voltage, VREF, is applied externally and can be set independent of the supply voltage. The AD4003/AD4007/AD4011 power scales linearly with throughput. Easy Drive features reduce both signal chain complexity and power consumption while enabling higher channel density. The reduced input current, particularly in high-Z mode, coupled with a long signal acquisition phase, eliminates the need for a dedicated ADC driver. Easy Drive broadens the range of companion circuitry that is capable of driving these ADCs (see Figure 2 in the data sheet).Input span compression eliminates the need to provide a negative supply to the ADC driver amplifier while preserving access to the full ADC code range. The input overvoltage clamp protects the ADC inputs against overvoltage events, minimizing disturbances on the reference pin and eliminating the need for external protection diodes. Fast device throughput up to 2 MSPS allows users to accurately capture high frequency signals and to implement oversampling techniques to alleviate the challenges associated with antialias filter designs. Decreased serial peripheral interface (SPI) clock rate requirements reduce digital input and output power consumption, broadens digital host options, and simplifies the task of sending data across digital isolation. The SPI-compatible serial user interface is compatible with 1.8 V, 2.5 V, 3 V, and 5 V logic by using the separate VIO logic supply.APPLICATIONS Automated test equipment Machine automation Medical equipment Battery-powered equipment Precision data acquisition systems Instrumentation and control systems

The AD5592R/AD5592R-1 have eight I/Ox pins (I/O0 to I/O7) that can be independently configured as digital-to-analog converter (DAC) outputs, analog-to-digital converter (ADC) inputs, digital outputs, or digital inputs. When an I/Ox pin is configured as an analog output, it is driven by a 12-bit DAC. The output range of the DAC is 0 V to VREF or 0 V to 2 × VREF. When an I/Ox pin is configured as an analog input, it is connected to a 12-bit ADC via an analog multiplexer. The input range of the ADC is 0 V to VREF or 0 V to 2 × VREF. The ADC has a total throughput rate of 400 kSPS. The I/Ox pins can also be configured as digital, general-purpose input or output (GPIO) pins. The state of the GPIO pins can be set or read back by accessing the GPIO write data register or the GPIO read configuration register, respectively, via a serial peripheral interface (SPI) write or read operation.The AD5592R/AD5592R-1 have an integrated 2.5 V, 20 ppm/°C reference, which is turned off by default, and an integrated temperature indicator, which gives an indication of the die temperature. The temperature value is read back as part of an ADC read sequence.The AD5592R/AD5592R-1 are available in 16-ball, 2 mm × 2 mm WLCSP, 16-lead, 3 mm × 3 mm LFCSP, and 16-lead TSSOP. The AD5592R/AD5592R-1 operate over a temperature range of −40 °C (TA) to +125 °C (TJ).APPLICATIONS Control and monitoring General-purpose analog and digital inputs/outputs

The AD5592R/AD5592R-1 have eight I/Ox pins (I/O0 to I/O7) that can be independently configured as digital-to-analog converter (DAC) outputs, analog-to-digital converter (ADC) inputs, digital outputs, or digital inputs. When an I/Ox pin is configured as an analog output, it is driven by a 12-bit DAC. The output range of the DAC is 0 V to VREF or 0 V to 2 × VREF. When an I/Ox pin is configured as an analog input, it is connected to a 12-bit ADC via an analog multiplexer. The input range of the ADC is 0 V to VREF or 0 V to 2 × VREF. The ADC has a total throughput rate of 400 kSPS. The I/Ox pins can also be configured as digital, general-purpose input or output (GPIO) pins. The state of the GPIO pins can be set or read back by accessing the GPIO write data register or the GPIO read configuration register, respectively, via a serial peripheral interface (SPI) write or read operation.The AD5592R/AD5592R-1 have an integrated 2.5 V, 20 ppm/°C reference, which is turned off by default, and an integrated temperature indicator, which gives an indication of the die temperature. The temperature value is read back as part of an ADC read sequence.The AD5592R/AD5592R-1 are available in 16-ball, 2 mm × 2 mm WLCSP, 16-lead, 3 mm × 3 mm LFCSP, and 16-lead TSSOP. The AD5592R/AD5592R-1 operate over a temperature range of −40 °C (TA) to +125 °C (TJ).APPLICATIONS Control and monitoring General-purpose analog and digital inputs/outputs

The AD5593R has eight input/output (I/O) pins, which can beindependently configured as digital-to-analog converter (DAC)outputs, analog-to-digital converter (ADC) inputs, digital outputs,or digital inputs. When an I/O pin is configured as an analogoutput, it is driven by a 12-bit DAC. The output range of theDAC is 0 V to VREF or 0 V to 2 × VREF. When an I/O pin isconfigured as an analog input, it is connected to a 12-bit ADCvia an analog multiplexer. The input range of the ADC is 0 V toVREF or 0 V to 2 × VREF. The I/O pins can also be configured tobe general-purpose, digital input or output (GPIO) pins. Thestate of the GPIO pins can be set or read back by accessing theGPIO write data register and GPIO read configuration registers,respectively, via an I2C write or read operation.The AD5593R has an integrated 2.5 V, 20 ppm/°C reference thatis turned off by default and an integrated temperature indicatorthat gives an indication of the die temperature. The temperaturevalue is read back as part of an ADC read sequence.The AD5593R is available in 16-lead TSSOP and LFCSP, as wellas a 16-ball WLCSP, and operates over a temperature range of−40°C to +105°C.APPLICATIONS Control and monitoring General-purpose analog and digital I/O

The AD5676 is a low power, octal, 16-bit buffered voltage output digital-to-analog converter (DAC). The device includes a gain select pin, giving a full-scale output of VREF (gain = 1) or 2 × VREF (gain = 2). The AD5676 DAC operates from a single 2.7 V to 5.5 V supply and is guaranteed monotonic by design. The AD5676 is available in 20-lead TSSOP and LFCSP packages.The internal power-on reset circuit and the RSTSEL pin of the AD5676 ensure that the output DACs power up to zero scale or midscale and then remain there until a valid write takes place. The AD5676 contains a per channel power-down mode that typically reduces the current consumption of the device to 1 µA.The AD5676 employs a versatile serial peripheral interface (SPI) that operates at clock rates up to 50 MHz, and contains a VLOGIC pin intended for 1.62 V to 5.5 V logic.Product Highlights High Relative Accuracy (INL) 16-bit: ±3 LSB maximum −40°C to +125°C temperature range 20-lead, TSSOP and LFCSP RoHS-compliant packagesApplications Optical transceivers Base-station power amplifiers Process control (PLC input/output cards) Industrial automation Data acquisition systems

The AD5672R/AD5676R are low power, octal, 12-/16-bit buffered voltage output digital-to-analog converters (DACs). They include a 2.5 V, 2 ppm/°C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5 V (gain = 1) or 5 V (gain = 2). The devices operate from a single 2.7 V to 5.5 V supply and are guaranteed monotonic by design. The AD5672R/AD5676R are available in a 20-lead TSSOP and in a 20-lead LFCSP and incorporate a power-on reset circuit and a RSTSEL pin that ensures that the DAC outputs power up to zero scale or midscale and remains there until a valid write. The AD5672R/AD5676R contain a power-down mode, reducing the current consumption to 1 µA typical while in power-down mode. The AD5676R is also available in a 16-ball WLCSP.PRODUCT HIGHLIGHTS High Relative Accuracy (INL). AD5672R (12-bit): ±1 LSB maximum AD5676R (16-bit): ±3 LSB maximum Low Drift 2.5 V On-Chip Reference. High Channel Density.Eight channels in 2.5 mm × 2.4 mm WLCSP (AD5676R).APPLICATIONS Optical transceivers Base-station power amplifiers Process control (PLC input/output cards) Industrial automation Data acquisition systems

The ADL8105 is a gallium arsenide (GaAs), monolithic microwave integrated circuit (MMIC), pseudomorphic high electron mobility transistor (pHEMT), low noise wideband amplifier that operates from 5 GHz to 20 GHz.The ADL8105 provides a typical gain of 27 dB at 12 GHz to 17 GHz, a 1.8 dB typical noise figure from 12 GHz to 17 GHz, a typical output third-order intercept (OIP3) of 30.5 dBm at 12 GHz to 17 GHz, and a saturated output power (PSAT) of up to 20.5 dBm, requiring only 90 mA from a 5 V supply voltage. The power dissipation can be lowered at the expense of OIP3 and output power (POUT). The ADL8105 also features inputs and outputs that are internally matched to 50 Ω. The RFIN and RFOUT pins are internally ac-coupled, and the bias inductor is also integrated, making it ideal for surface-mounted technology (SMT)-based, high capacity microwave radio applications.The ADL8105 is housed in an RoHS-compliant, 2 mm × 2 mm, 8-lead LFCSP package.APPLICATIONSTelecommunicationsSatellite communicationsMilitary radarWeather radarElectronic warfareInstrumentation

The ADN4622/ADN4624 are quad-channel, signal isolated, low-voltage differential signaling (LVDS) buffers that operate at up to 2.5 Gbps with very low jitter. The devices integrate Analog Devices, Inc., iCoupler® technology, enhanced for high-speed operation to provide drop-in galvanic isolation of LVDS signal chains. AC coupling and/or level shifting to the LVDS receivers and from the LVDS drivers allows isolation of other high-speed signals such as current-mode logic (CML).The ADN4622/ADN4624 include a refresh mechanism to monitor the input and output states and ensure they remain the same in the absence of data transitions. For lower power consumption and high-speed operation with low jitter, the LVDS and isolator circuits rely on 1.8 V supplies. The ADN4622/ADN4624 are fully specified over a wide industrial temperature range and are available in a 28-lead, wide-body, finer pitch SOIC_W_FP package with 8.3 mm creepage and clearance (for 5.7 kV rms or 8 kVPEAK surge and impulse voltages and reinforced insulation at AC mains voltages) or 6 mm × 6 mm LFCSP package with 1.27 mm creepage and clearance (for basic/functional isolation).APPLICATIONS Isolated video and imaging data Analog front-end isolation Data plane isolation Isolated high speed clock and data links Multi-gigabit SERDES Board-to-board optical replacement (for example, short reach fiber)