CMOS, 5 V/+5 V/+3 V, Triple SPDT Switch Features: ±2 V to ±6 V dual-supply operation 2 V to 12 V single-supply operation Temperature range: −40°C to +125°C  <0.2 nA leakage currents  52 Ω on resistance over full signal range  Rail-to-rail switching operation  16-lead LFCSP and TSSOP packages  Typical power consumption: <0.1 μW  TTL-/CMOS-compatible inputs  Package upgrades to 74HC4053 and MAX4053/MAX4583

High Speed, Dual, 2 A MOSFET Driver, inverting A & non-inverting B input pins Features: Industry-standard-compatible pinout High current drive capability Precise threshold shutdown comparator UVLO with hysteresis Overtemperature warning signal Overtemperature shutdown 3.3 V-compatible inputs Rise time and fall time: 10 ns typical at 2.2 nF load Fast propagation delay See Data Sheet for additional features

24-Bit, 312 kSPS, 109 dB Sigma-Delta ADC with On-Chip Buffers and Serial Interface Features: High performance 24-bit Σ-Δ ADC 115 dB dynamic range at 78.125 kHz output data rate 109 dB dynamic range at 312.5 kHz output data rate 312.5 kHz maximum fully filtered output word rate Pin-selectable oversampling rates of 64×, 128×, and 256× Low power mode Flexible serial peripheral interface (SPI) Fully differential modulator input On-chip differential amplifier for signal buffering On-chip reference buffer Full band, low-pass, finite impulse response (FIR) filter Overrange alert pin Digital gain correction registers Power-down mode Synchronization of multiple devices via the SYNC pin Daisy chaining

Quad IF Receiver Features: 11-bit 200MSPS output data rate per channel Integrated Noise Shaping Requantizer (NSR) Performance with NSR enabled: SNR: 75.5 dBFS in 40 MHz band to 70 MHz @ 185 MSPS SNR: 73.7 dBFS in 60 MHz band to 70 MHz @ 185 MSPS Performance with NSR disabled: SNR: 66.5 dBFS to 70 MHz @ 185 MSPS SFDR: 83 dBc to 70 MHz @ 185 MSPS Low power: 1.2 W @ 185 MSPS 1.8 V analog supply operation 1.8 V LVDS (ANSI-644 levels) output 1-to-8 integer clock divider Internal ADC voltage reference 1.75 V p-p analog input range (programmable to 2.0 V p-p) Differential analog inputs with 800 MHz bandwidth See data sheet for additional features

2.1 Maximum On Resistance, 15 V/+12/5 V iCMOS Dual SPST Switches Features: 2.4 maximum on resistance 0.5 maximum on resistance flatness 200 mA continuous current Fully specified at +12 V, ±15 V, ±5 V No VL supply required 3 V logic-compatible inputs Rail-to-rail operation 10-lead MSOP and 10-lead, 3 mm × 3 mm LFCSP packages

ADM6346 - UltraLow Power, Microprocessor RESET Circuit

Ultralow Power, 3-Lead, SOT-23, Microprocessor Reset Circuit, Active-Low Open-Drain Output, 1 A Supply Current Features: Ultralow supply current of 1 μA maximum (ADM6326/ADM6328) Accurate monitoring of 2.5 V, 3 V, 3.3 V, and 5 V rails Reset thresholds available in increments from 2.2 V to 4.63 V Glitch immunity from negative-going VCC transients 2 reset output options Push-pull RESET (ADM6326/ADM6346) Open-drain RESET (ADM6328/ADM6348) Minimum reset timeout of 100 ms Operating temperature range of −40°C to +85°C 3-lead SOT-23 package

Ethernet Clock Generator, 10 Clock Outputs Features: Fully integrated VCO/PLL core 0.17 ps rms jitter from 1.875 MHz to 20 MHz at 156.25 MHz 0.41 ps rms jitter from 12 kHz to 20 MHz at 125 MHz Input crystal or clock frequency of 25 MHz Preset divide ratios for 156.25 MHz, 33.33 MHz,100 MHz, and 125 MHz Choice of LVPECL or LVDS output format See datasheet for additional features

500 kSPS, 2-Channel, Software-Selectable, True Bipolar Input, 12-Bit Plus Sign ADC Features: 12-bit plus sign SAR ADC True bipolar input ranges Software-selectable input ranges: ±10 V, ±5 V, ±2.5 V, 0 V to +10 V 2 analog input channels with channel sequencer Single-ended, true differential, and pseudo differential analog input capability 500 kSPS throughput rate High analog input impedance Low power: 18 mW Full power signal bandwidth: 22 MHz Internal 2.5 V reference High speed serial interface See data sheet for additional features

OP293 - Precision, Micropower Operational Amplifier