3 A, 36 V, Synchronous Step-Down DC-to-DC Regulator Features: Continuous output current: 3 A Input voltage: 4.5 V to 36 V Integrated MOSFETs: 98 mΩ/35 mΩ Reference voltage: 0.6 V ± 1% Fast minimum on time: 50 ns Programmable switching frequency: 200 kHz to 1.8 MHz Synchronizes to external clock: 200 kHz to 1.8 MHz Precision enable and power good Cycle-by-cycle current limit with hiccup protection External compensation Programmable soft start time Startup into a precharged output Supported by ADIsimPower design tool

Power Management IC for Circuit Breaker Applications Features: Boost shunt controller Adjustable output voltage range: 4.5 V to 36 V Integrated boost shunt driver Programmable power detection threshold Buck regulator Input voltage range: 4.5 V to 36 V Continuous output current: 500 mA Adjustable output voltage down to 0.6 V Fixed output options: 3.3 V and 5 V 1.2 MHz fixed switching frequency Voltage monitoring and open-drain reset output 4 programmable gain amplifiers Low power consumption Programmable gain and output dc common voltage Low offset operation amplifier for leakage and grounding fault current detection Analog trip circuit with programmable trip threshold Actuator driver output

600 mA, 2.5 MHz Buck-Boost DC-to-DC Converter Features: 1 mm height profile Compact PCB footprint Seamless transition between modes 38 μA typical quiescent current 2.5 MHz operation enables 1.5 μH inductor Input voltage: 2.3 V to 5.5 V Fixed output voltage: 2.8 V to 5.0 V See data sheet for additional features

Dual Low Power, High Speed JFET Operational Amplifier Features: Low supply current: 250 μA/amp maximum High slew rate: 9 V/μs Bandwidth: 3.5 MHz typical Low offset voltage: 1 mV maximum @ 25°C Low input bias current: 20 pA maximum @ 25°C CMRR: 90 dB typical Fast settling time Unity gain stable

20V High Efficiency Nanopower Step-Down Regulator Features: 720nA Input IQ in Regulation (No Load), VIN = 4V 820nA Input IQ in Regulation (No Load), VIN = 20V 400nA Input IQ in UVLO 2.7V to 20V Input Operating Range Up to 50mA of Output Current Pin Selectable Output Voltages: 1.2V, 1.5V, 1.8V, 2.5V (LTC3388-1) 2.8V, 3.0V, 3.3V, 5.0V (LTC3388-3) High Efficiency Hysteretic Synchronous DC/DC Conversion Standby Mode Disables Buck Switching Available in 10-Lead MSE and 3mm × 3mm DFN Packages

16-Bit, 100 kSPS, Parallel I/O A/D Converter Features: Fast 16-Bit ADC 100 kSPS Throughput Single 5 V Supply Operation Input Range: ±10 V 100 mW Max Power Dissipation Choice of External or Internal 2.5 V Reference High Speed Parallel Interface On-Chip Clock 28-Lead Skinny DIP, SSOP or SOIC Packages

16-Bit, 100 kSPS, Parallel I/O A/D Converter Features: Fast 16-Bit ADC 100 kSPS Throughput Single 5 V Supply Operation Input Range: ±10 V 100 mW Max Power Dissipation Choice of External or Internal 2.5 V Reference High Speed Parallel Interface On-Chip Clock 28-Lead Skinny DIP, SSOP or SOIC Packages

Dual 12-Bit 800 MSPS DAC with Low Power 32-Bit Complex NCO Features: Analog output: adjustable 8.7 mA to 31.7 mA, RL = 25 Ω to 50 Ω Low power, fine complex NCO allows carrier placement anywhere in DAC bandwidth while adding <300 mW power Auxiliary DACs allow I and Q gain matching and offset control Includes programmable I and Q phase compensation Internal digital upconversion capability Multiple chip synchronization interface High performance, low noise PLL clock multiplier Digital inverse sinc filter 100-lead, exposed pad TQFP package

4T2R Direct RF Transmitter and Observation Receiver Features: Flexible reconfigurable radio common platform design Transmit/receive channel bandwidth up to 1.2 GHz/2.4 GHz (4T2R) RFDAC/RFADC RF frequency range up to 7.5 GHz On-chip PLL with multichip synchronization External RFCLK input option Versatile digital features Configurable digital up/down conversion (DDC and DUC) 8 fine complex DUCs and 4 coarse complex DUCs 8 fine complex DDCs and 4 coarse complex DDCs, 2 independent 48-bit NCO per DUC/DDC Programmable 192-tap PFIR filter for receive equalization Supports 4 different profile settings loaded via GPIO Receive AGC support Fast detect with low latency for fast AGC control Signal monitor for slow AGC control Dedicated AGC support pins Transmit DPD support Programmable delay and gain per transmit data path Coarse DDC delay adjust for DPD observation path Auxiliary features Power amplifier downstream protection circuitry On-chip temperature monitoring unit Programmable GPIO pins supporting different user configurations ADC clock driver with selectable divide ratios TDD power savings option and sharing ADCs SERDES JESD204B/JESD204C interface, 16 lanes up to 24.75 Gbps 8 lanes per each DAC and ADC JESD204B compatible with maximum 15.5 Gbps lane rate JESD204C compatible with maximum 24.75 Gbps lane rate Supports real or complex digital data (8-bit, 12-bit, 16-bit, or 24-bit) 15 mm × 15 mm, 324-ball BGA with 0.8 mm pitch

4T4R Direct RF Receiver and Transmitter Features: Flexible, reconfigurable radio common platform design Transmitter/receiver channel bandwidth up to 1.2 GHz (4T4R) RF DAC/RF ADC RF frequency range up to 7.5 GHz On-chip PLL with multichip synchronization External RF clock input option Versatile digital features Selectable interpolation and decimation filters Configurable DDCs and DUCs 8 fine complex DUCs (FDUC) and 4 coarse complex DUCs (CDUC) 8 fine complex DDCs (FDDC) and 4 coarse complex DDCs (CDDC) FDUCs and FDDCs are fully bypassable 2 independent 48-bit NCOs per DUC or DDC Programmable 192-tap PFIR filter for receive equalization Supports 4 different profile settings loaded via GPIO Receive AGC support Fast detect with low latency for fast AGC control Signal monitor for slow AGC control Dedicated AGC support pins Transmit DPD support Programmable delay and gain per transmit data path Coarse DDC delay adjust for DPD observation path Supports real or complex digital data (8-, 12-, or 16-bit) Auxiliary features ADC clock driver with selectable divide ratios Power amplifier downstream protection circuitry On-chip temperature monitoring unit Programmable GPIO pins support toggling between modes TDD power savings option and sharing ADCs SERDES JESD204B or JESD204C interface, 16 lanes up to 24.75 Gbps 8 lanes JESD204B/C transmitter (JTx) and 8 lanes JESD204B/C receiver (JRx) Supports Subclass 1 Supports multidevice synchronization 15 mm × 15 mm, 324-ball BGA with 0.8 mm pitch