The LTC6951 is a high performance, low noise, Phase Locked Loop (PLL) with a fully integrated VCO. The low noise VCO uses no external components and is internally calibrated to the correct output frequency with no external system support.The clock generation section provides five outputs based on the VCO prescaler signal with individual dividers for each output. Four outputs feature very low noise, low skew CML logic. The fifth output is low noise LVDS. All outputs can be synchronized and set to precise phase alignment using the programmable delays.Choose the LTC6951-1 if any desired output frequency falls in the ranges 2.5GHz to 2.7GHz, 1.66GHz to 1.8GHz, or 1.25GHz to 1.35GHz. Choose the LTC6951 for all other frequencies.Applications High Performance Data Converter Clocking Wireless Infrastructure Test and Measurement

The AD9517-4?provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 1.45 GHz to 1.80 GHz. Optionally, an external VCO/VCXO of up to 2.4 GHz can be used.The AD9517-4 emphasizes low jitter and phase noise to maximize data converter performance, and it can benefit other applications with demanding phase noise and jitter requirements.The AD9517-4 features four LVPECL outputs (in two pairs) and four LVDS outputs (in two pairs). Each LVDS output can be reconfigured as two CMOS outputs. The LVPECL outputs operate to 1.6 GHz, the LVDS outputs operate to 800 MHz, and the CMOS outputs operate to 250 MHz.For applications that require additional outputs, a crystal reference input, zero-delay, or EEPROM for automatic configuration at startup, the AD9520 and AD9522 are available. In addition, the AD9516 and AD9518 are similar to the AD9517 but have a different combination of outputs.Each pair of outputs has dividers that allow both the divide ratio and coarse delay (or phase) to be set. The range of division for the LVPECL outputs is 1 to 32. The LVDS/CMOS outputs allow a range of divisions up to a maximum of 1024.The AD9517-4 is available in a 48-lead LFCSP and can be operated from a single 3.3 V supply. An external VCO, which requires an extended voltage range, can be accommodated by connecting the charge pump supply (VCP) to 5 V. A separate LVPECL power supply can be from 2.5 V to 3.3 V (nominal).The AD9517-4 is specified for operation over the industrial range of ?40?C to +85?C.APPLICATIONS Low jitter, low phase noise clock distribution 10/40/100 Gb/sec networking line cards, including SONET, Synchronous Ethernet, OTU2/3/4 Forward error correction (G.710) Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs High performance wireless transceivers ATE and high performance instrumentation

Programmable Hex Voltage Supervisor with EEPROM Features: Supervises 6 Power Supplies I2C Adjustable UV and OV Trip Points Guaranteed Threshold Accuracy: ±1% I2C/SMBus Interface Internal EEPROM 256 Programmable Thresholds per Channel Up to Three Range Settings per Channel Two General Purpose Inputs Three General Purpose Inputs/Outputs Programmable Output Delays Supply Voltage Range, 3.4V to 13.9V Supply Voltage Power Sharing from V1 to V4 16-Lead 5mm × 4mm DFN and SSOP Packages

MxFE Quad, 16-Bit, 12 GSPS RF DAC and Dual, 12-Bit, 6 GSPS RF ADC Features:Flexible reconfigurable common platform design 4 DACs and 2 ADCs (4D2A) and 2D2A options Supports single, dual, and quad band Datapaths and DSP blocks are fully bypassableDAC to ADC sample rate ratios of 1, 2, 3, and 4 On-chip PLL with multichip synchronization External RFCLK input option for off-chip PLL Maximum DAC sample rate up to 12 GSPS Maximum data rate up to 12 GSPS using JESD204C Useable analog bandwidth to 8 GHz Maximum ADC sample rate up to 6 GSPS Maximum data rate up to 6 GSPS using JESD204C Useable analog bandwidth to 8 GHz ADC ac performance at 6 GSPS, input at 2.7 GHz, 1 dBFS Full-scale input voltage: 1.475 V p-p Noise density: 147.5 dBFS/Hz Noise figure: 25.3 dB HD2: 72 dBFS HD3: 68 dBFS Worst other (excluding HD2 and HD3): 78 dBFS DAC ac performance at 12 GSPS, output at 2.6 GHz Full-scale output current range: 6.43 mA to 37.75 mA Two-tone IMD3 (6 dBFS per tone): 72 dBc NSD, single-tone: 160 dBc/Hz SFDR, single-tone: 75 dBc Versatile digital features Selectable interpolation and decimation filters Configurable DDC and DUC 8 fine complex DUCs and 4 coarse complex DUCs 8 fine complex DDCs and 4 coarse complex DDCs 48-bit NCO per DUC or DDC Option to bypass fine and coarse DUC/DDC Programmable 192-tap PFIR filter for receive equalization Supports 4 different profile settings loaded via GPIO Programable delay per data path Receive AGC support Fast detect with low latency for fast AGC control Signal monitor for slow AGC control Dedicated AGC support pins Transmit DPD support Fine DUC channel gain control and delay adjust Coarse DDC delay adjust for DPD observation path Auxiliary features Fast frequency hopping Direct digital synthesis (DDS) Low latency loopback modes (receive datapath data can be routed to the transmit datapaths) ADC clock driver with selectable divide ratios Power amplifier downstream protection circuitry On-chip temperature monitoring unit Flexible GPIO pins TDD power savings option SERDES JESD204B/JESD204C interface, 16 lanes up to 24.75 Gbps 8 lanes JESD204B/C transmitter (JT×) and 8 lanes JESD204B/C receiver (JR×) JESD204B compliance with the maximum 15.5 Gbps JESD204C compliance with the maximum 24.75 Gbps Supports real or complex digital data (8-, 12-, 16-, or 24-bit) 15 mm × 15 mm, 324-ball BGA with 0.8 mm pitch

The ADG1311 / ADG1312 / ADG1313 are monolithic CMOS devices containing four independently selectable switches designed on a CMOS process.The ADG1311 / ADG1312 / ADG1313 contain four independent single-pole/single-throw (SPST) switches. The ADG1311 and ADG1312 differ only in that the digital control logic is inverted. The ADG1311 switches are turned on with Logic 0 on the appropriate control input, while Logic 1 is required for the ADG1312. The ADG1313 has two switches with digital control logic similar to the ADG1311; the logic is inverted on the other two switches. The ADG1313 exhibits break-before-make switching action for use in multiplexer applications.Each switch conducts equally well in both directions when on and has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked.APPLICATIONS Signal Switching Battery-powered Systems Communication Systems

ADM211E - EMI/EMC-Compliant, +/- 15KV ESD-Protected, RS-232 Line Driver/Receiver

8-Channel, 1.5 MSPS, 12-Bit Parallel ADCs with a Sequencer Features: Throughput rate: 1.5 MSPS Specified for VDD of 2.7 V to 5.25 V 8 analog input channels with a sequencer Software-configurable analog inputs 8-channel single-ended inputs 4-channel fully differential inputs 4-channel pseudo differential inputs 7-channel pseudo differential inputs Accurate on-chip 2.5 V reference ±0.2% maximum at 25°C, 25 ppm/°C maximumPower consumption 6 mW maximum at 1.5 MSPS with 3 V supplies 13.5 mW maximum at 1.5 MSPS with 5 V supplies 69 dB SINAD at 50 kHz input frequency No pipeline delays High speed parallel interface—word/byte modes Full shutdown mode: 2 μA maximum 32-lead LFCSP and TQFP packages

The LTM4650A-1 is a dual 25A or single 50A output switching mode step-down DC/DC ?Module? (micromodule) regulator with ?1% total DC output error. Included in the package are the switching controllers, power FETs, inductors and all supporting components. Operating from an input voltage range of 4.5V to 16V, the LTM4650A-1 supports two outputs with an output voltage range of 0.6V to 5.5V, each set by a single external resistor. Its high efficiency design delivers up to 25A continuous current for each output. Only a few input and output capacitors are needed. Adjustable control loop compensation allows for fast transient response to minimize output capacitance when powering FPGAs, ASICs, and processors.Fault protection features include overvoltage and overcurrent protection. The LTM4650A-1 is offered in 16mm ? 16mm ? 5.01mm BGA package. Vin Range Vout Range Comp DC Vout Accy LTM4650 4.5V to 15V 0.6V to 1.8V Internal 1.5% LTM4650-1B 4.5V to 15V 0.6V to 1.8V External 1.5% LTM4650-1A 4.5V to 15V 0.6V to 1.8V External 0.8% LTM4650A 4.5V to 16V 0.6V to 5.5V Internal 1% LTM4650A-1 4.5V to 16V 0.6V to 5.5V External 1% Applications Telecom and Networking Equipment Storage and ATCA Cards Industrial Equipment

GaAs MMIC SP4T Reflective Switch, 23 - 30 GHz Features: Broadband Performance: 23 - 30 GHz High Isolation: 26 dB Insertion Loss: 2.8 dB High Power Handling: >27 dBm 24 Lead 4 × 4mm SMT Package: 16mm2

The ADXRS453 is an angular rate sensor (gyroscope) intended for industrial, instrumentation, and stabilization applications in high vibration environments. An advanced, differential, quad sensor design rejects the influence of linear acceleration, enabling the ADXRS453 to offer high accuracy rate sensing in harsh envi-ronments where shock and vibration are present.The ADXRS453 uses an internal, continuous self-test architec-ture. The integrity of the electromechanical system is checked by applying a high frequency electrostatic force to the sense structure to generate a rate signal that can be differentiated from the base-band rate data and internally analyzed.The ADXRS453 is capable of sensing an angular rate of up to ?300?/sec. Angular rate data is presented as a 16-bit word that is part of a 32-bit SPI message.The ADXRS453 is available in a 16-lead plastic cavity SOIC (SOIC_CAV) and an SMT-compatible vertical mount package (LCC_V), and is capable of operating across a wide voltage range (3.3 V to 5 V). ApplicationsRotation sensing in high vibration environments Rotation sensing for industrial and instrumentation applicationsHigh performance platform stabilization