The ADA4896-2/ADA4897-1 are unity gain stable, low noise, rail-to-rail output, high speed voltage feedback amplifiers that have a quiescent current of 3 mA. With the 1/f noise of 2.4 nV/√Hz at 10 Hz and a spurious-free dynamic range of −80 dBc at 2 MHz, the ADA4896-2/ADA4897-1 are an ideal solution in a variety of applications, including ultrasound, low noise preamplifiers, and drivers of high performance ADCs. The Analog Devices, Inc., proprietary next generation SiGe bipolar process and innovative architecture enable such high performance amplifiers.TheADA4896-2/ADA4897-1 have 230 MHz bandwidth, 120 V/μs slew rate, and settle to 0.1% in 45 ns. With a wide supply voltage range (3 V to 10 V), the ADA4896-2/ADA4897-1 are ideal candidates for systems that require high dynamic range, precision, and high speed.The ADA4896-2 is available in 8-lead LFCSP and 8-lead MSOP packages. The ADA4897-1 is available in 8-lead SOIC and 6-lead SOT-23 packages. Both the ADA4896-2 and ADA4897-1 work over the extended industrial temperature range of −40°C to +125°C.Applications Low noise preamplifier Ultrasound amplifiers PLL loop filters High performance ADC drivers DAC buffers

The ADAU1452 / ADAU1451 / ADAU1450 are automotive qualified audio processors that far exceed the digital signal processing capabilities of earlier SigmaDSP® devices. The restructured hardware architecture is optimized for efficient audio processing. The audio processing algorithms are realized in sample-by-sample and block-by-block paradigms that can both be executed simultaneously in a signal processing flow created using the graphical programming tool, SigmaStudio™. The restructured digital signal processor (DSP) core architecture enables some types of audio processing algorithms to be executed using significantly fewer instructions than were required on previous SigmaDSP generations, leading to vastly improved code efficiency.The 1.2 V, 32-bit DSP core can run at frequencies of up to 294.912 MHz and execute up to 6144 instructions per sample at the standard sample rate of 48 kHz. However, in addition to industry-standard rates, a wide range of sample rates are available. The integer PLL and flexible clock generator hardware can generate up to 15 audio sample rates simultaneously. These clock generators, along with the on-board asynchronous sample rate converters (ASRCs) and a flexible hardware audio routing matrix, make the ADAU1452 / ADAU1451 / ADAU1450 ideal audio hubs that greatly simplify the design of complex multirate audio systems.The ADAU1452 / ADAU1451 / ADAU1450 interface with a wide range of analog-to-digital converters (ADCs), digital-to-analog converters (DACs), digital audio devices, amplifiers, and control circuitry, due to their highly configurable serial ports, S/PDIF interfaces (on the ADAU1452 and ADAU1451), and multipurpose input/output pins. The devices can also directly interface with pulse density modulation (PDM) output microelectromechanical (MEMS) microphones, due to integrated decimation filters specifically designed for that purpose.Independent slave and master I2C/serial peripheral interface (SPI) control ports allow the ADAU1452 / ADAU1451 / ADAU1450 not only to be programmed and configured by an external master device, but also to act as masters that can program and configure external slave devices directly. This flexibility, combined with self boot functionality, enables the design of standalone systems that do not require any external input to operate.The power efficient DSP core executes full programs, consumes only a few hundred milliwatts (mW) of power, and can run at a maximum program load while consuming less than a watt, even in worst case temperatures exceeding 100°C. This relatively low power consumption and small footprint make the ADAU1452 / ADAU1451 / ADAU1450 ideal replacements for large, general-purpose DSPs that consume more power at the same processing load.Differences between the ADAU1452, ADAU1451, and ADAU1450The five variants of this device are differentiated by memory, DSP core frequency, availability of S/PDIF interfaces, ASRC configuration, and temperature range.Because the ADAU1450 does not contain an S/PDIF receiver or transmitter, the SPDIFIN and SPDIFOUT pins are nonfunctional. Additionally, the settings of any registers related to the S/PDIF input or output in the ADAU1450 do not have any effect on the operation of the device.Because the ADAU1450 does not contain ASRCs, the settings of any registers related to the ASRCs in the ADAU1450 do not have any effect on the operation of the device.APPLICATIONS Automotive audio processing Head units Navigation systems Rear seat entertainment systems DSP amplifiers (sound system amplifiers) Commercial and professional audio processing Consumer audio processing

The ADAU1966A is a high performance, single-chip digital-to-analog converter (DAC) that provides 16 DACs with differential or single-ended outputs using the Analog Devices, Inc., patented multibit sigma-delta (Σ-Δ) architecture. A serial peripheral interface (SPI)/I2C port is included, allowing a microcontroller to adjust volume and many other parameters. The ADAU1966A operates from 2.5 V digital and 3.3 V analog supplies. A linear regulator is included to generate the digital supply voltage from the analog supply voltage. The ADAU1966A is available in an 80-lead LQFP.The ADAU1966A is designed for low EMI. This consideration is apparent in both the system and circuit design architectures. By using the on-board PLL to derive the internal master clock from an external left-right frame clock (LRCLK), the ADAU1966A can eliminate the need for a separate high frequency master clock and can be used with or without a bit clock. The DACs are designed using the latest Analog Devices continuous time architectures to further minimize EMI. By using 2.5 V digital supplies, power consumption is minimized, and the digital waveforms are a smaller amplitude, further reducing emissions.Note that throughout this data sheet, multifunction pins, such as SCLK/SCL, are referred to by the entire pin name or by a single function of the pin, for example, SCLK, when only that function is relevant.APPLICATIONS Automotive audio systems Home theater systems Digital audio effects processors

The ADAU1977 incorporates four high performance analog-to-digital converters (ADCs) with direct-coupled inputs capable of 10 V rms. The ADC uses multibit sigma-delta (Σ-Δ) architecturewith continuous time front end for low EMI. The ADCs can be connected to the electret microphone (ECM) directly and provide the bias for powering the microphone. Built-in diagnostic circuitry detects faults on input lines and includes comprehensive diagnostics for faults on microphone inputs. The faults reported are short to battery, short to microphone bias, short to ground, short between positive and negative input pins, and open input terminals. In addition, each diagnostic fault is available as an IRQ flag for ease in system design. An I2C/SPI control port is also included. The ADAU1977 uses only a single 3.3 V supply. The part internally generates the microphone bias voltage. The microphone bias is programmable in a few steps from 5 V to 9 V. The low power architecture reduces the power consumption. An on-chip PLL can derive the master clock from an external clock input or frame clock (sample rate clock). When fed with a frame clock, the PLL eliminates the need for a separate high frequency master clock in the system. The ADAU1977 is available in a 40-lead LFCSP package.APPLICATIONS Automotive audio systems Active Noise Cancellation System

The ADAU1978 incorporates four high performance, analog-to-digital converters (ADCs) with 2 V rms capable ac-coupled inputs. The ADCs use a multibit sigma-delta (Σ-Δ) architecture with continuous time front end for low EMI. An I2C/serial peripheral interface (SPI) control port is included that allows a microcontroller to adjust volume and many other parameters. The ADAU1978 uses only a single 3.3 V supply. The part internally generates the required digital DVDD supply. The low power architecture reduces the power consumption. The ADAU1978 is available in a 40-lead LFCSP package. The on-chip PLL can derive the master clock from an external clock input or frame clock (sample rate clock). When fed with the frame clock, it eliminates the need for a separate high frequency master clock in the system.Note that throughout this data sheet, multifunction pins, such as SCL/CCLK, are referred to either by the entire pin name or by a single function of the pin, for example, CCLK, when only that function is relevant. APPLICATIONS Automotive audio systems Active noise cancellation system

The ADD5207 is a white LED driver for backlight applications based on high efficiency, current mode, step-up converter technology. It is designed with a 0.15 Ω, 1.5 A internal switch and a pin-adjustable operating frequency between 600 kHz and 1 MHz.The ADD5207 contains four regulated current sources for uniform LED brightness. Each current source can drive up to 25 mA and the LED-driving current is pin adjustable by an external resistor. The ADD5207 drives up to four parallel strings of multiple series-connected LEDs with a ±1.5% current matching between strings.The ADD5207 provides phase shift PWM brightness control methods. LED dimming control is achieved through the PWM input. The device includes an 8 kHz LED-dimming oscillator for driving each current source. The ADD5207 operates over an input voltage range of 6 V to 21 V, but the device can function with a voltage as low as 5.6 V.The ADD5207 also has multiple safety protection features to prevent damage during fault conditions. If any LED is open, the device automatically disables the faulty current source. The internal soft start circuit prevents a high inrush current during startup. Thermal shutdown protection prevents thermal damage.The ADD5207 is available in a low profile, thermally enhanced, 4 mm × 3 mm × 0.75 mm, 14-lead, RoHS-compliant lead frame chip scale package (LFCSP) and is specified over the industrial temperature range of −25°C to +85°C.APPLICATIONS Notebook PCs UMPCs, and monitor displays

The ADDI9023 is twelve channel vertical driver for CCD imaging applications. It includes eight 3-level drivers and four 2-level drivers. The input configuration can support up to nine individual vertical timing phases and eight shift gate signals. A separate substrate clock channel (SUBCK) is also included. Typical load drive capability for each channel is 3nF.The ADDI9023 is specified over an operating temperature range of −25°C to +85°C.APPLICATIONS Digital Still Cameras Industrial cameras Surveillance cameras Medical imaging

The ADE7978, the ADE7933/ADE7932, and ADE7923 form achipset dedicated to measuring 3-phase electrical energy usingshunts as current sensors.The ADE7933/ADE7932 are isolated, 3-channel sigma-deltaanalog-to-digital converters (Σ-Δ ADCs) for polyphase energymetering applications that use shunt current sensors.TheADE7923 is a nonisolated, 3-channel Σ-Δ ADC for the neutral linethat uses a shunt current sensor. The ADE7932 features two ADCs,and the ADE7933 and ADE7923 feature three ADCs.One channel is dedicated to measuring the voltage across theshunt when a shunt is used for current sensing. This channelprovides a signal-to-noise ratio (SNR) of 67 dB over a 3.3 kHzsignal bandwidth. Up to two additional channels are dedicatedto measuring voltages, which are usually sensed using resistordividers.The unused voltage channels on the neutral ADE7923 can beused for auxiliary voltage measurements. These channels providean SNR of 75 dB over a 3.3 kHz signal bandwidth. One voltagechannel can be used to measure the temperature of the die viaan internal sensor.The ADE7933 and ADE7923 include three channels: onecurrent channel and two voltage channels. The ADE7932includes one current channel and one voltage channel, but isotherwise identical to the ADE7933.The ADE7933/ADE7932 include isoPower®, an integrated,isolated dc-to-dc converter. Based on the Analog Devices, Inc.,iCoupler® technology, the dc-to-dc converter provides theregulated power required by the first stage of the ADCs at a3.3 V input supply. The ADE7933/ADE7932 eliminate the needfor an external dc-to-dc isolation block. The iCoupler chip scaletransformer technology is used to isolate the logic signalsbetween the first and second stages of the ADC. The result is asmall form factor, total isolation solution. The ADE7923 is thenonisolated version of the ADE7933 that can be used forneutral current measurement when isolation from the neutralline is not required.The ADE7933/ADE7932 and ADE7923 contain a digital interfacethat is specially designed to interface with the ADE7978. Usingthis interface, the ADE7978 accesses the ADC outputs andconfiguration settings of the ADE7933/ADE7932 andADE7923.The ADE7933/ADE7932 are available in a 20-lead, Pb-free, widebodySOIC package with increased creepage. The ADE7923 isavailable in a similar 20-lead, Pb-free, wide-body SOIC packagewithout the increased creepage.The ADE7978 is a high accuracy, 3-phase electrical energymeasurement IC with serial interfaces and three flexible pulseoutputs. The ADE7978 can interface with up to four ADE7933/ADE7932 and ADE7923 devices. The ADE7978 incorporates allthe signal processing required to perform total (fundamental andharmonic) active, reactive, and apparent energy measurementand rms calculations, as well as fundamental-only active andreactive energy measurement and rms calculations. A fixedfunction digital signal processor (DSP) executes this signalprocessing.The ADE7978 measures the active, reactive, and apparent energyin various 3-phase configurations, such as wye or delta services,with both three and four wires. The ADE7978 provides systemcalibration features for each phase, gain calibration, and optionaloffset correction. Phase compensation is also available, but it isnot necessary because the currents are sensed using shunts. TheCF1, CF2, and CF3 logic outputs provide a wide selection ofpower information: total active, reactive, and apparent powers;the sum of the current rms values; and fundamental active andreactive powers. The ADE7978 incorporates power quality measurements, suchas short duration low or high voltage detection, short durationhigh current variations, line voltage period measurement, andangles between phase voltages and currents. Two serial interfaces,SPI and I2C, can be used to communicate with the ADE7978.A dedicated high speed interface—the high speed data capture(HSDC) port—can be used in conjunction with I2C to provideaccess to the ADC outputs and real-time power information.The ADE7978 also has two interrupt request pins, IRQ0 andIRQ1, to indicate that an enabled interrupt event has occurred.The ADE7978 is available in a 28-lead, Pb-free LFCSP package.Applications Shunt-based polyphase meters Power quality monitoring Solar inverters Process monitoring Protective devices Isolated sensor interfaces Industrial PLCs

The ADF4159 is a 13 GHz, fractional-N frequency synthesizer with modulation and both fast and slow waveform generation capability. The part uses a 25-bit fixed modulus, allowing subhertz frequency resolution.The ADF4159 consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. The Σ-Δ-based fractional interpolator allows programmable fractional-N division. The INT and FRAC registers define an overall N divider as N = INT + (FRAC/225).The ADF4159 can be used to implement frequency shift keying (FSK) and phase shift keying (PSK) modulation. Frequency sweep modes are also available to generate various waveforms in the frequency domain, for example, sawtooth and triangular waveforms. Sweeps can be set to run automatically, or each step manually triggered by an external pulse. The ADF4159 features cycle slip reduction circuitry, which enables faster lock times without the need for modifications to the loop filter.Control of all on-chip registers is via a simple 3-wire interface. The ADF4159 operates with an analog power supply in the range of 2.7 V to 3.45 V and a digital power supply in the range of 1.62 V to 1.98 V. The device can be powered down when not in use.ApplicationsCommunications infrastructureCommunications test equipmentInstrumentationFMCW radars

The ADF7024 is an ultralow power, integrated transceiver for use in the license-free ISM bands at 433 MHz, 868 MHz, and 915 MHz. Its ease of use and high performance make it suitable for a wide variety of wireless applications. The ADF7024 is suitable for operation under the European ETSI EN 300-220 regulation, the North American FCC Part 15 regulation, and other similar regulatory standards.The ADF7024 can operate under a number of predefined radio profiles. For each radio profile, optimized register settings are provided for the ADF7024 radio. This ensures that the RF communication layer works seamlessly, allowing the user to concentrate on the protocol and system level design and prototyping. The radio profiles cover common data rate and modulation options. There are six radio profiles in total, as shown in Table 1.The ADF7024 operates with a power supply range of 2.2 V to 3.6 V and has very low power consumption in both Tx and Rx modes, enabling long lifetimes in battery-operated systems while maintaining excellent RF performance.The low IF receiver minimizes power consumption and provides excellent sensitivity. The receiver is exceptionally linear and, therefore, is very resilient to the presence of interferers in spectrally noisy environments. The highly efficient transmitter has programmable output power up to 13.5 dBm and automatic power amplifier (PA) ramping to meet transient spurious specifications. The RF synthesizer comprises a voltage controlled oscillator (VCO), a low noise fractional-N phase-locked loop (PLL) and a loop filter, all of which are fully integrated and automatically calibrated. This agile frequency synthesizer facilitates the implementation of frequency-hopping spread spectrum (FHSS) systems.The smart wake mode (SWM) allows the ADF7024 to wake up autonomously from sleep using the internal wake-up timer without intervention from the host processor. This functionality allows carrier sense, packet sniffing, and packet reception while the host processor is in sleep, thereby reducing overall system current consumption.The ADF7024 eases the processing burden of the host processor by integrating the lower layers of a typical communication protocol stack. The host processor can configure the ADF7024 using a simple command-based protocol over a standard 4-wire SPI interface. A single-byte command transitions the radio between states or performs a radio function.A complete wireless solution can be built using a small number of external discrete components and a host processor (typically a microcontroller).For more information, see the ADF7024 Hardware Reference Manual, UG-698, which is only available as part of the ADF7024 design resource package.APPLICATIONS Wireless sensor networks (WSNs) Home and building automation Asset tracking Process and building control Industrial control Internet of Things (IoT)