The AD9161 is a high performance, 11-bit digital-to-analog converter (DAC) that supports data rates to 6 GSPS. The DAC core is based on a quad-switch architecture coupled with a 2× interpolator filter that enables an effective DAC update rate of up to 12 GSPS in some modes. The high dynamic range and bandwidth makes these DACs ideally suited for the most demanding high speed radio frequency (RF) DAC applications.In baseband mode, wide bandwidth capability combines with high dynamic range to support DOCSIS 3.1 cable infrastructure compliance from the minimum of two carriers to full maximum spectrum of 1.794 GHz. A 2× interpolator filter (FIR85) enables the AD9161/AD9162 to be configured for lower data rates and converter clocking to reduce the overall system power and ease the filtering requirements. In Mix-Mode™ operation, the AD9161/AD9162 can reconstruct RF carriers in the second and third Nyquist zones up to 7.5 GHz while still maintaining exceptional dynamic range. The output current can be programmed from 8 mA to 38.76 mA. The AD9161/AD9162 data interface consists of up to eight JESD204B serializer/deserializer (SERDES) lanes that are programmable in terms of lane speed and number of lanes to enable application flexibility.A serial peripheral interface (SPI) can configure the AD9161/AD9162 and monitor the status of all registers. The AD9161/AD9162 are offered in an 165-ball, 8.0 mm × 8.0 mm, 0.5 mm pitch, CSP_BGA package and in an 169-ball, 11 mm × 11 mm, 0.8 mm pitch, CSP_BGA package, including a leaded ball option for the AD9162.Product Highlights High dynamic range and signal reconstruction bandwidth supports RF signal synthesis of up to 7.5 GHz. Up to eight lanes JESD204B SERDES interface flexible in terms of number of lanes and lane speed. Bandwidth and dynamic range to meet DOCSIS 3.1 compliance with margin.Applications Broadband communications systems DOCSIS 3.1 cable modem termination system (CMTS)/video on demand (VOD)/edge quadrature amplitude modulation (EQAM) Wireless communications infrastructure W-CDMA, LTE, LTE-A, point to point Instrumentation, automatic test equipment (ATE) Radars and jammers

The AD91641 is a high performance, 16-bit digital-to-analog converter (DAC) and direct digital synthesizer (DDS) that supports update rates to 6 GSPS. The DAC core is based on a quad-switch architecture coupled with a 2× interpolator filter that enables an effective DAC update rate of up to 12 GSPS in some modes. The high dynamic range and bandwidth makes these DACs ideally suited for the most demanding high speed radio frequency (RF) DAC applications.The DDS consists of a bank of 32, 32-bit numerically controlled oscillators (NCOs), each with its own phase accumulator.When combined with a 100 MHz serial peripheral interface (SPI) and fast hop modes, phase coherent fast frequency hopping (FFH) is enabled, with several modes to support multiple applications.In baseband mode, wide analog bandwidth capability combines with high dynamic range to support DOCSIS 3.1 cable infrastructure compliance from the minimum of one carrier up to the full maximum spectrum of 1.791 GHz of signal bandwidth. A 2× interpolator filter (FIR85) enables the AD9164 to be configured for lower data rates and converter clocking to reduce the overall system power and ease the filtering requirements. In Mix-Mode™ operation, the AD9164 can reconstruct RF carriers in the second and third Nyquist zones up to 7.5 GHz while still maintaining exceptional dynamic range. The output current can be programmed from 8 mA to 38.76 mA. The AD9164 data interface consists of up to eight JESD204B serializer/deserializer (SERDES) lanes that are programmable in terms of lane speed and number of lanes to enable application flexibility.An SPI interface configures the AD9164 and monitors the status of all registers. The AD9164 is offered in a 165-ball, 8 mm × 8 mm, 0.5 mm pitch CSP_BGA package, and a 169-ball, 11 mm × 11 mm, 0.8 mm pitch, CSP_BGA package, including a leaded ball option.Product Highlights High dynamic range and signal reconstruction bandwidth supports RF signal synthesis of up to 7.5 GHz. Up to eight lanes JESD204B SERDES interface flexible in terms of number of lanes and lane speed. Bandwidth and dynamic range to meet DOCSIS 3.1 compliance and multiband wireless communications standards with margin. Applications Broadband communications systems DOCSIS 3.1 CMTS/ video on demand (VOD)/edge quadrature amplitude modulation (EQAM) Wireless communications infrastructure W-CDMA, LTE, LTE-A, point to point

The AD548 is a low power, precision monolithic operational amplifier. It offers both low bias current (10 pA max, warmed up) and low quiescent current (200 μA max) and is fabricated with ion-implanted FET and laser wafer trimming technologies. Input bias current is guaranteed over the AD548’s entire common-mode voltage range.The economical J grade has a maximum guaranteed input offset voltage of less than 2 mV and an input offset voltage drift of less than 20 μV/°C. This level of dc precision is achieved utilizing Analog’s laser wafer drift trimming process. The combination of low quiescent current and low offset voltage drift minimizes changes in input offset voltage due to self-heating effects.The AD548 is recommended for any dual supply op amp application requiring low power and excellent dc and ac performance. In applications such as battery-powered, precision instrument front ends and CMOS DAC buffers, the AD548’s excellent combination of low input offset voltage and drift, low bias current, and low 1/f noise reduces output errors. High common-mode rejection (82 dB, min on the “B” grade) and high open-loop gain ensures better than 12-bit linearity in high impedance, buffer applications.The AD548 is pinned out in a standard op amp configuration and is available in three performance grades. The AD548J and AD548K are rated over the commercial temperature range of 0°C to 70°C. The AD548B is rated over the industrial temperature range of –40°C to +85°C.The AD548 is available in an 8-lead plastic mini-DIP and surface-mount (SOIC) packages.PRODUCT HIGHLIGHTS A combination of low supply current, excellent dc and ac performance and low drift makes the AD548 the ideal op amp for high performance, low power applications. The AD548 is pin compatible with industry standard op amps such as the LF441, TL061, and AD542, enabling designers to improve performance while achieving a reduction in power dissipation of up to 85%. Guaranteed low input offset voltage (2 mV max) and drift (20 µV/°C max) for the AD548J are achieved utilizing Analog Devices’ laser drift trimming technology, eliminating the need for external trimming. Analog Devices specifies each device in the warmed-up condition, insuring that the device will meet its published specifications in actual use. A dual version, the AD648, is also available. Enhanced replacement for LF441 and TL061.

The AD7716 is a signal processing block for data acquisition systems. It is capable of processing four channels with bandwidths of up to 584 Hz. Resolution is 22 bits and the usable dynamic range varies from 111 dB with an input bandwidth of 36.5 Hz to 99 dB with an input bandwidth of 584 Hz.The device consists of four separate A/D converter channels that are implemented using sigma-delta technology. Sigma-delta ADCs include on-chip digital filtering and, thus, the system filtering requirements are eased.Three address pins program the device address. This allows a data acquisition system with up to 32 channels to be set up in a simple fashion. The output word from the device contains 32 bits of data. One bit is determined by the state of the DIN1 input and may be used, for example, in an ECG system with an external pacemaker detect circuit to indicate that the output word is invalid because of the presence of a pacemaker pulse.

The ADA4940-1 / ADA4940-2 are low noise, low distortion differential amplifiers with very low power consumption. They are an ideal choice for driving low power, high resolution, high performance SAR and sigma-delta (Σ-Δ) analog-to-digital converters (ADCs) with resolutions up to 18 bits from dc to 1 MHz on only 1.25 mA of quiescent current. The adjustable level of the output common-mode voltage allows the ADA4940-1 /  ADA4940-2 to match the input common-mode voltage of multiple ADCs. The internal common-mode feedback loop provides exceptional output balance, as well as suppression of even-order harmonic distortion products.With the ADA4940-1 / ADA4940-2, differential gain configurations are easily realized with a simple external feedback network of four resistors determining the closed-loop gain of the amplifier. The ADA4940-1 / ADA4940-2 are fabricated using Analog Devices, Inc., complementary bipolar process, enabling them to achieve very low levels of distortion with an input voltage noise of only 3.9 nV/√Hz. The low dc offset and excellent dynamic performance of the ADA4940-1 / ADA4940-2 make them well suited for a variety of data acquisition and signal processing applications.The ADA4940-1 is available in a Pb-free, 3 mm × 3 mm, 16-lead LFCSP. The ADA4940-2 is available in a Pb-free, 4 mm × 4 mm, 24-lead LFCSP. The pinout is optimized to facilitate printed circuit board (PCB) layout and minimize distortion. The ADA4940-1 / ADA4940-2 are specified to operate over the −40°C to +125°C temperature range. Applications Low power ADC drivers Single-ended-to-differential converters Differential buffers Line drivers Medical Imaging Industrial Process Control Portable Electronics

The ADAU1961 is a low power, stereo audio codec that supports stereo 48 kHz record and playback at 35 mW from a 3.3 V analog supply. The stereo audio ADCs and DACs support sample rates from 8 kHz to 96 kHz as well as a digital volume control.The record path includes an integrated microphone bias circuit and six inputs. The inputs can be mixed and muxed before the ADC, or they can be configured to bypass the ADC. The ADAU1961 includes a stereo digital microphone input.The ADAU1961 includes five high power output drivers (two differential and three single-ended), supporting stereo head-phones, an earpiece, or other output transducer. AC-coupled or capless configurations are supported. Individual fine level controls are supported on all analog outputs. The output mixer stage allows for flexible routing of audio.The serial control bus supports the I2C and SPI protocols. The serial audio bus is programmable for I2S, left-/right-justified, and TDM modes. A programmable PLL supports flexible clock generation for all standard integer rates and fractional master clocks from 8 MHz to 27 MHzApplicationsAutomotive head unitsAutomotive amplifiersNavigation systemsRear-seat entertainment systems

The ADG1401 / ADG1402 contain a single-pole/single-throw (SPST) switch. Figure 1 shows that with a logic input of 1, the switch of the ADG1401 is closed and that of the ADG1402 is open. Each switch conducts equally well in both directions when on and has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked.The iCMOS® (industrial CMOS) modular manufacturing process combines high voltage, complementary metal-oxide semiconductor (CMOS) and bipolar technologies. It enables the development of a wide range of high performance analog ICs capable of 33 V operation in a footprint that no other generation of high voltage parts has achieved. Unlike analog ICs using conventional CMOS processes, iCMOS components can tolerate high supply voltages while providing increased performance, dramatically lower power consumption, and a reduced package size.The on resistance profile is very flat over the full analog input range ensuring excellent linearity and low distortion when switching audio signals. The iCMOS construction ensures ultralow power dissipation, making the part ideally suited for portable and battery-powered instruments.PRODUCT HIGHLIGHTS 1.3 Ω maximum on resistance at 25°C. Minimum distortion. 3 V logic-compatible digital inputs: VIH = 2.0 V, VIL = 0.8 V. No VL logic power supply required. 8-lead MSOP and 8-lead, 3 mm × 2 mm LFCSP packages.APPLICATIONS Automatic test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Audio signal routing Video signal routing Communication systems Relay replacements

The ADG1414 is a monolithic complementary metal oxide semiconductor (CMOS) device containing eight independently selectable switches designed on an industrial CMOS (iCMOS®) process. iCMOS is a modular manufacturing process combining high voltage CMOS and bipolar technologies. iCMOS components can tolerate high supply voltages while providing increased performance, dramatically lower power consumption, and reduce the package size.The ADG1414 is a set of octal SPST (single-pole, single-throw) switches controlled via a 3-wire serial interface. On resistance is closely matched between switches and is very flat over the full signal range. Each switch conducts equally well in both directions and the input signal range extends to the supplies.Data is written to these devices in the form of eight bits; each bit corresponds to one channel.The ADG1414 utilizes a versatile 3-wire serial interface that operates at clock rates of up to 50 MHz and is compatible with standard SPI®, QSPI™, MICROWIRE™, and DSP interface standards. The output of the shift register, SDO, enables a number of these parts to be daisy chained.On power-up, all switches are in the off condition, and the internal registers contain all zeros.PRODUCT HIGHLIGHTS 50 MHz serial interface. 9.5 Ω on resistance. 1.6 Ω on-resistance flatness. 24-lead TSSOP and 4 mm × 4 mm LFCSP packages.APPLICATIONS Automatic test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Audio signal routing Video signal routing Communication systems

The ADG1606 and ADG1607 are monolithic iCMOS® analogmultiplexers comprising of 16 single channels and eightdifferential channels, respectively. The ADG1606 switches one of16 inputs to a common output, as determined by the 4-bitbinary address lines (A0, A1, A2, and A3). The ADG1607switches one of eight differential inputs to a common differentialoutput, as determined by the 3-bit binary address lines (A0, A1,and A2). An EN input on both devices enables or disables thedevice. When disabled, all channels switch off. When enabled,each channel conducts equally well in both directions and has aninput signal range that extends to the supplies.The ultralow on resistance and on-resistance flatness of theseswitches make them ideal solutions for data acquisition andgain switching applications where low distortion is critical.iCMOS® construction ensures ultralow power dissipation,making the parts ideally suited for portable and battery-poweredinstruments.Product Highlights 7.5 Ω maximum on resistance over temperature. Minimum distortion: THD + N = 0.04% 3 V logic-compatible digital inputs: VINH = 2.0 V, VINL = 0.8 V. No VL logic power supply required.Applications Communication systems Medical systems Audio signal routing Video signal routing Automatic test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Relay replacements

The ADG1636 is a monolithic CMOS device containing twoindependently selectable single-pole/double-throw (SPDT)switches. An EN input is used to enable or disable the device.When disabled, all channels are switched off. Each switch conductsequally well in both directions when on and has an input signalrange that extends to the supplies. In the off condition, signallevels up to the supplies are blocked. Both switches exhibitbreak-before-make switching action for use in multiplexerapplications.The ultralow on resistance of these switches make them idealsolutions for data acquisition and gain switching applications wherelow on resistance and distortion is critical. The on resistance profileis very flat over the full analog input range, ensuring excellentlinearity and low distortion when switching audio signals.The CMOS construction ensures ultralow power dissipation,making the devices ideally suited for portable and battery-poweredinstruments.Product Highlights 1.6 Ω maximum on resistance over temperature. Minimum distortion: THD + N = 0.007%. 3 V logic-compatible digital inputs: VINH = 2.0 V, VINL = 0.8 V. No VL logic power supply required. Ultralow power dissipation: <16 nW. 16-lead TSSOP and 16-lead 4 mm × 4 mm LFCSP.Applications Communication systems Medical systems Audio signal routing Video signal routing Automatic test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Relay replacements