The ADG408 is a monolithic CMOS analog multiplexer comprising 8 single channels. The ADG408 switches one of eight inputs to a common output as determined by the 3-bit binary address lines A0, A1 and A2. An EN input is used to enable or disable the device. When disabled, all channels are switched OFF. The ADG408 is designed on an enhanced LC2MOS process which provides low power dissipation yet gives high switching speed and low on resistance. Each channel conducts equally well in both directions when ON and has an input signal range which extends to the supplies. In the OFF condition, signal levels up to the supplies are blocked. All channels exhibit break before make switching action preventing momentary shorting when switching channels. Inherent in the design is low charge injection for minimum transients when switching the digital inputs.

The ADG419 is a monolithic CMOS SPDT switch. This switch is designed on an enhanced LC2MOS process that provides low power dissipation yet gives high switching speed, low on resistance, and low leakage currents.The on resistance profile of the ADG419 is very flat over the full analog input range, ensuring excellent linearity and low distortion. The part also exhibits high switching speed and high signal bandwidth. CMOS construction ensures ultralow power dissipation, making the parts ideally suited for portable and battery-powered instruments.Each switch of the ADG419 conducts equally well in both directions when on and has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked. The ADG419 exhibits break-before-make switching action.The ADG419-EP supports defense and aerospace applications (AQEC)Applications Precision test equipment Precision instrumentation Battery-powered systems Sample-and-hold systems

The ADG508F and ADG509F are CMOS analog multiplexers, with the ADG508F comprising eight single channels and the ADG509F comprising four differential channels. These multiplexer provides fault protection. Using a series n-channel, p-channel, n-channel MOSFET structure, both device and signal source protection is provided in the event of an overvoltage or power loss. The multiplexer can withstand continuous overvoltage inputs from -40 V to +55 V. During fault conditions with power supplies off, the multiplexer input (or output) appears as an open circuit and only a few nanoamperes of leakage current will flow. This protects not only the multiplexer and the circuitry driven by the multiplexer, but also protects the sensors or signal sources that drive the multiplexer.The ADG508F switches one of eight inputs to a common output as determined by the 3-bit binary address lines A0, A1 and A2. The ADG509F switches one of four differential inputs to a common differential output as determined by the 2-bit binary address lines A0 and A1. An EN input on each device is used to enable or disable the device. When disabled, all channels are switched OFF.PRODUCT HIGHLIGHTS Fault protection. The ADG508F/ADG509F can withstand continuous voltage inputs from −40 V to +55 V. When a fault occurs due to the power supplies being turned off, all the channels are turned off and only a leakage current of a few nanoamperes flows. On channel saturates while fault exists. Low RON. Fast switching times. Break-before-make switching. Switches are guaranteed break-before-make so that input signals are protected against momentary shorting. Trench isolation eliminates latch-up. A dielectric trench separates the p and n-channel MOSFETs thereby preventing latch-up.APPLICATIONS Existing multiplexer applications (both fault-protected and nonfault-protected) New designs requiring multiplexer functions

The ADG604 is a CMOS analog multiplexer, comprising foursingle channels. It operates from a dual supply of ± 2.7 V to±5.5 V, or from a single supply of 2.7 V to 5.5 V.The ADG604 switches one of four inputs to a common output,D, as determined by the 3-bit binary address lines, A0, A1, andEN. A Logic “0” on the EN pin disables the device.The ADG604 offers ultralow charge injection of ±1.5 pC over theentire signal range and leakage currents of 10 pA typical at 25°C.It offers on resistance of 85 Ω typ, which is matched to within 2 Ωbetween channels. The ADG604 also has low power dissipation yetgives high switching speeds. The ADG604 is available in a 14-leadTSSOP package.PRODUCT HIGHLIGHTS Ultralow Charge Injection (QINJ: ±1.5 pC Typ over the Full Signal Range) Leakage Current <0.5 nA max @ 85°C Dual ±2.7 V to ±5.5 V or Single 2.7 V to 5.5 V Supply Fully Specified to 125°C Small 14-Lead TSSOP PackageAPPLICATIONS Automatic Test Equipment Data Acquisition Systems Battery-Powered Instruments Communication Systems Sample and Hold Systems Remote-Powered Equipment Audio and Video Signal Routing Relay Replacement Avionics

The ADG658 and ADG659 are low voltage, CMOS analogmultiplexers comprised of eight single channels and fourdifferential channels, respectively. The ADG658 switches one ofeight inputs (S1–S8) to a common output, D, as determined bythe 3-bit binary address lines A0, A1, and A2. The ADG659switches one of four differential inputs to a common differentialoutput, as determined by the 2-bit binary address lines A0 andA1. An EN input on both devices enables or disables the device.When disabled, all channels are switched off.These devices are designed on an enhanced process that provideslower power dissipation yet gives high switching speeds. Thesedevices can operate equally well as either multiplexers or demultiplexersand have an input range that extends to the supplies. Allchannels exhibit break-before-make switching action, preventingmomentary shorting when switching channels. All digital inputshave 0.8 V to 2.4 V logic thresholds, ensuring TTL/CMOS logiccompatibility when using single +5 V or dual ±5 V supplies. The ADG658 and ADG659 are available in 16-lead TSSOP/QSOP packages and 16-lead 4 mm × 4 mm LFCSP packages.Product Highlights Single- and dual-supply operation. The ADG658 and ADG659 offer high performance and are fully specified and guaranteed with ±5 V, +5 V, and +3 V supply rails. Automotive temperature range −40°C to +125°C. Low power consumption, typically <0.1 μW. 16-lead 4 mm × 4 mm LFCSP packages, 16-lead TSSOP package and 16-lead QSOP package.Applications Automotive applications Automatic test equipment Data acquisition systems Battery-powered systems Communication systems Audio and video signal routing Relay replacement Sample-and-hold systems Industrial control systems

The ADG714 is a complementary metal-oxide semiconductor (CMOS), octal single-pole, single-throw (SPST) switch controlled via a 3-wire serial interface. On resistance is closely matched between the switches and is flat over the full signal range. Each switch conducts equally well in both directions, and the input signal range extends to the supplies. Data is written to these devices in the form of 8 bits, each bit corresponding to one channel.The ADG714 uses a 3-wire serial interface that is compatiblewith serial peripheral interface (SPI), QSPI™, MICROWIRE™ interface standards, and most digital signal processing (DSP) interface standards. The output of the shift register DOUT enables a number of these devices to be daisy-chained. On power-up, all switches are in the OFF condition, and the internal registers contain all zeros.A low power consumption and operating supply range of 2.7 V to 5.5 V makes this part ideal for many applications. The ADG714 may also be supplied from a dual ±2.5 V supply. TheADG714 is available in a 24-lead TSSOP and a 24-lead LFCSP.Product Highlights 3-wire serial interface. Single-/dual-supply operation. The ADG714 and ADG715 are fully specified and guaranteed with 3 V, 5 V, and ±2.5 V supply rails. Low on resistance, typically 2.5 Ω. Low leakage. Power-on reset. A 24-lead TSSOP. A 24-lead LFCSP. Applications Data acquisition systems Communication systems Relay replacement Audio and video switching

The AD8451 is a precision analog front end and controller for testing and monitoring battery cells. A precision fixed gain instrumentation amplifier (IA) measures the battery charge/discharge current, and a fixed gain difference amplifier (DA) measures the battery voltage. Internal laser trimmed resistor networks set the gains for the IA and the DA, optimizing the performance of the AD8451 over the rated temperature range. The IA gain is 26 and the DA gain is 0.8 V/V.Voltages at the ISET and VSET inputs set the desired constant current (CC) and constant voltage (CV) values. CC to CV switching is automatic and transparent to the system.A TTL logic level input, MODE, selects the charge or discharge mode (high for charge, low for discharge). An analog output, VCTRL, interfaces directly with the Analog Devices, Inc., ADP1972 PWM controller.The AD8451 simplifies designs by providing excellent accuracy, performance over temperature, flexibility with functionality, and overall reliability in a space-saving package. The AD8451 is available in an 80-lead, 14 mm × 14 mm × 1 mm LQFP package and is rated for an operating temperature of −40°C to +85°C.APPLICATIONS Battery cell formation and testing Battery module testing

The AD9253 is a quad, 14-bit, 80 MSPS/105 MSPS/125 MSPSanalog-to-digital converter (ADC) with an on-chip sample-and-holdcircuit designed for low cost, low power, small size,and ease of use. The product operates at a conversion rate ofup to 125 MSPS and is optimized for outstanding dynamicperformance and low power in applications where a smallpackage size is critical.The ADC requires a single 1.8 V power supply and LVPECL-/CMOS-/LVDS-compatible sample rate clock for full performanceoperation. No external reference or driver components arerequired for many applications.The ADC automatically multiplies the sample rate clock for theappropriate LVDS serial data rate. A data clock output (DCO) forcapturing data on the output and a frame clock output (FCO)for signaling a new output byte are provided. Individual-channelpower-down is supported and typically consumes less than 2 mWwhen all channels are disabled. The ADC contains several featuresdesigned to maximize flexibility and minimize system cost, such as programmable output clock and data alignment and digitaltest pattern generation. The available digital test patternsinclude built-in deterministic and pseudorandom patterns, alongwith custom user-defined test patterns entered via the serial portinterface (SPI).The AD9253 is available in a RoHS-compliant, 48-lead LFCSP.It is specified over the industrial temperature range of −40°C to+85°C. This product is protected by a U.S. patent.PRODUCT HIGHLIGHTS Small Footprint. Four ADCs are contained in a small, spacesaving package. Low power of 110 mW/channel at 125 MSPS with scalable power options. Pin compatible to the AD9633 12-bit quad ADC. Ease of Use. A data clock output (DCO) operates at frequencies of up to 500 MHz and supports double data rate (DDR) operation. User Flexibility. The SPI control offers a wide range of flexible features to meet specific system requirementsAPPLICATIONS Medical ultrasound High speed imaging Quadrature and diversity radio receivers Test equipment

The AD9361 is a high performance, highly integrated radiofrequency (RF) Agile Transceiver™ designed for use in 3G and4G base station applications. Its programmability and widebandcapability make it ideal for a broad range of transceiver applications.The device combines a RF front end with a flexible mixed-signalbaseband section and integrated frequency synthesizers, simplifyingdesign-in by providing a configurable digital interface to aprocessor. The AD9361 receiver LO operates from 70 MHz to6.0 GHz and the transmitter LO operates from 47 MHz to 6.0 GHzrange, covering most licensed and unlicensed bands. Channelbandwidths from less than 200 kHz to 56 MHz are supported.The two independent direct conversion receivers have state-of-the-artnoise figure and linearity. Each receive (RX) subsystem includesindependent automatic gain control (AGC), dc offset correction,quadrature correction, and digital filtering, thereby eliminatingthe need for these functions in the digital baseband. The AD9361also has flexible manual gain modes that can be externallycontrolled. Two high dynamic range analog-to-digital converters(ADCs) per channel digitize the received I and Q signals and passthem through configurable decimation filters and 128-tap finiteimpulse response (FIR) filters to produce a 12-bit output signal atthe appropriate sample rate.The transmitters use a direct conversion architecture that achieveshigh modulation accuracy with ultralow noise. This transmitterdesign produces a best in class TX error vector magnitude (EVM)of <−40 dB, allowing significant system margin for the externalpower amplifier (PA) selection. The on-board transmit (TX)power monitor can be used as a power detector, enabling highlyaccurate TX power measurements.The fully integrated phase-locked loops (PLLs) provide lowpower fractional-N frequency synthesis for all receive andtransmit channels. Channel isolation, demanded by frequencydivision duplex (FDD) systems, is integrated into the design.All VCO and loop filter components are integrated.The core of the AD9361 can be powered directly from a 1.3 Vregulator. The IC is controlled via a standard 4-wire serial portand four real-time input/output control pins. Comprehensivepower-down modes are included to minimize power consumptionduring normal use. The AD9361 is packaged in a 10 mm × 10 mm,144-ball chip scale package ball grid array (CSP_BGA).Applications Point to point communication systems Femtocell/picocell/microcell base stations General-purpose radio systems

The AD9434 is a 12-bit monolithic sampling analog-to-digital converter (ADC) optimized for high performance, low power, and ease of use. The part operates at up to a 500 MSPS conversion rate and is optimized for outstanding dynamic performance in wideband carrier and broadband systems. All necessary functions, including a sample-and-hold and voltagereference, are included on the chip to provide a complete signal conversion solution. The VREF pin can be used to monitor the internal reference or provide an external voltage reference (external reference mode must be enabled through the SPI port). The ADC requires a 1.8 V analog voltage supply and a differential clock for full performance operation. The digital outputs are LVDS (ANSI-644) compatible and support twos complement, offset binary format, or Gray code. A data clock output is available for proper output data timing.Fabricated on an advanced BiCMOS process, the AD9434 isavailable in a 56-lead LFCSP, specified over the industrial temperature range (−40°C to +85°C). This part is protected under a U.S. patent.APPLICATIONS Wireless and wired broadband communications Cable reverse path Communications test equipment Radar and satellite subsystems Power amplifier linearizationPRODUCT HIGHLIGHTS High Performance. Maintains 65 dBFS SNR at 500 MSPS with a 250 MHz input. Low Power. Consumes only 660 mW at 500 MSPS. Ease of Use. LVDS output data and output clock signal allow interface to current FPGA technology. The on-chip reference and sample and hold provide flexibility in system design. Use of a single 1.8 V supply simplifies system power supply design. Serial Port Control. Standard serial port interface supports various product functions, such as data formatting, power-down, gain adjust, and output test pattern generation. The AD9434 is pin compatible with the AD9230, and can be substituted in many applications with minimal design changes.