The ADF7021 is a low power, highly integrated 2FSK/3FSK/4FSK transceiver. It is designed to operate in the narrowband, license-free ISM bands and licensed bands in the 80 MHz to 650 MHz and 862 MHz to 940 MHz frequency ranges. It has both Gaussian and raised cosine data filtering options to improve spectral efficiency for narrowband applications.It is suitable for circuit applications targeted at European ETSI-EN 300-220, the Japanese ARIB STD-T67, the Chinese Short Range Device regulations, and the North American FCC Part 15, Part 90, and Part 95 regulatory standards. A complete transceiver can be built using a small number of external discrete components, making the ADF7021 very suitable for price-sensitive and area-sensitive applications.The transmit section contains a voltage controlled oscillator (VCO) and a low noise fractional-N PLL with output resolution of <1 ppm. This frequency-agile PLL allows the ADF7021 to be used in frequency hopping spread spectrum (FHSS) systems. The VCO operates at twice the fundamental frequency to reduce spurious emissions and frequency pulling problems. The transmitter output power is programmable in 63 steps from −16 dBm to +13 dBm and has an automatic power ramp control to prevent spectral splatter and help meet regulatory standards. The transceiver RF frequency, channel spacing, and modulation are programmable using a simple 3-wire interface. The device operates with a power supply range of 2.3 V to 3.6 V and can be powered down when not in use.A low IF architecture is used in the receiver (100 kHz), minimizing power consumption and the external component count while avoiding interference problems at low frequencies. The IF filter has programmable bandwidths of 12.5 kHz, 18.75 kHz, and 25 kHz. The ADF7021 supports a wide variety of programmable features including Rx linearity, sensitivity, and IF bandwidth, allowing the user to trade off receiver sensitivity and selectivity against current consumption, depending on the application. The receiver also features a patent-pending automatic frequency control (AFC) loop with programmable pull-in range, allowing the PLL to track out the frequency error in the incoming signal.An on-chip ADC provides readback of an integrated temperature sensor, an external analog input, the battery voltage, and the RSSI signal, which provides savings on an ADC in some applications. The temperature sensor is accurate to ±10°C over the full operating temperature range of −40°C to +85°C. This accuracy can be improved by doing a 1-point calibration at room temperature and storing the result in memory.

The ADF7021 is a low power, highly integrated 2FSK/3FSK/4FSK transceiver. It is designed to operate in the narrowband, license-free ISM bands and licensed bands in the 80 MHz to 650 MHz and 862 MHz to 940 MHz frequency ranges. It has both Gaussian and raised cosine data filtering options to improve spectral efficiency for narrowband applications.It is suitable for circuit applications targeted at European ETSI-EN 300-220, the Japanese ARIB STD-T67, the Chinese Short Range Device regulations, and the North American FCC Part 15, Part 90, and Part 95 regulatory standards. A complete transceiver can be built using a small number of external discrete components, making the ADF7021 very suitable for price-sensitive and area-sensitive applications.The transmit section contains a voltage controlled oscillator (VCO) and a low noise fractional-N PLL with output resolution of <1 ppm. This frequency-agile PLL allows the ADF7021 to be used in frequency hopping spread spectrum (FHSS) systems. The VCO operates at twice the fundamental frequency to reduce spurious emissions and frequency pulling problems. The transmitter output power is programmable in 63 steps from −16 dBm to +13 dBm and has an automatic power ramp control to prevent spectral splatter and help meet regulatory standards. The transceiver RF frequency, channel spacing, and modulation are programmable using a simple 3-wire interface. The device operates with a power supply range of 2.3 V to 3.6 V and can be powered down when not in use.A low IF architecture is used in the receiver (100 kHz), minimizing power consumption and the external component count while avoiding interference problems at low frequencies. The IF filter has programmable bandwidths of 12.5 kHz, 18.75 kHz, and 25 kHz. The ADF7021 supports a wide variety of programmable features including Rx linearity, sensitivity, and IF bandwidth, allowing the user to trade off receiver sensitivity and selectivity against current consumption, depending on the application. The receiver also features a patent-pending automatic frequency control (AFC) loop with programmable pull-in range, allowing the PLL to track out the frequency error in the incoming signal.An on-chip ADC provides readback of an integrated temperature sensor, an external analog input, the battery voltage, and the RSSI signal, which provides savings on an ADC in some applications. The temperature sensor is accurate to ±10°C over the full operating temperature range of −40°C to +85°C. This accuracy can be improved by doing a 1-point calibration at room temperature and storing the result in memory.

The ADM1064 Super Sequencer® is a configurable supervisory/ sequencing device that offers a single-chip solution for supply monitoring and sequencing in multiple supply systems. In addition to these functions, the ADM1064 integrates a 12-bit ADC that can be used to accurately read back up to 12 separate voltages. The device also provides up to 10 programmable inputs for moni-toring undervoltage faults, overvoltage faults, or out-of-window faults on up to 10 supplies. In addition, 10 programmable outputs can be used as logic enables. Six of these programmable outputs can provide up to a 12 V output for driving the gate of an N-FET that can be placed in the path of a supply. ApplicationsCentral office systemsServers/routersMultivoltage system line cardsDSP/FPGA supply sequencingIn-circuit testing of margined supplies

The ADM1186-1 and ADM1186-2 are integrated, four-channel, voltage monitoring and sequencing devices. A 2.7 V to 5.5 V power supply is required on the VCC pin for power.Four precision comparators monitor four voltage rails, with all comparators sharing a 0.6 V reference and a worst-case accuracy of 0.8%. Resistor networks that are external to the VIN1, VIN2, VIN3, and VIN4 pins set the Under Voltage (UV) trip points for the monitored supply rails.The ADM1186-1 and ADM1186-2 have four open drain enable outputs, OUTx, that are used to enable power supplies. An open drain power good output, PWRGD, is provided that indicatesthe four VINx inputs are above their UV thresholds.A state machine monitors the state of the UP and DOWN pins on the ADM1186-1 or the UP/overbar: DOWN pin on the ADM1186-2 to control the supply sequencing direction. In the ‘Wait Start’state, a rising edge transition on the UP or UP/DOWN pin triggers a power-up sequence. A falling edge transition on the DOWN or UP/DOWN pin in the ‘Power Up Done’ statetriggers a power down sequence.During a power up sequence, the state machine enables each power supply in turn. The supply output voltage is monitored to determine if it rises above the UV threshold level within a userdefined duration called the blanking time. If a supply rises above the UV threshold then the next enable output in the sequence is turned on. In addition to the blanking time a user may also define sequencing time delays between each enable output turning on. When all four enable outputs are on, and the four VINx pins are above their UV trip points the power up sequence is complete. The ADM1186-1 provides an open drain pin, SEQ_DONE, that is asserted high to provide an indication that an up sequence is complete. The SEQ_DONE pins is allows multiple cascadedADM1186-1 devices to be perform controlled power up and down sequences. During a power down sequence the enable outputs turn off inreverse order. The sequence time delays between successive supplies the same as during the power up sequence, and no blanking time is used during a power down sequence. At the end of a down sequence the SEQ_DONE pin is brought low. During sequencing and when powered up, the state machine continuously monitors for any fault conditions. Faults include a UV condition on any of the inputs, or an unexpected controlinput. Any fault that occurs causes the state machine to enter a fault handler. This immediately turns off all enable outputs, and ensures that the device is ready to start a new up sequence. The ADM1186-1 has a bi-directional open drain pin, FAULT, that facilitates fault handling when using multiple devices. An ADM1186-1 experiencing a fault condition drives the FAULT pin low, causing other connected ADM1186-1devices to enter their own fault handling state.The ADM1186-1 is available in a 20-lead QSOP package andthe ADM1186-2 is available in a 16-lead QSOP package.

The ADM1192 is an integrated current sense amplifier that offers digital current and voltage monitoring via an on-chip, 12-bit analog-to-digital converter (ADC), communicated through an I2C interface.An internal current sense amplifier senses voltage across the sense resistor in the power path via the VCC pin and the SENSE pin.A 12-bit ADC can measure the current seen in the sense resistor and in the supply voltage on the VCC pin. An industry-standard I2C interface allows a controller to read current and voltage data from the ADC. Measurements can be initiated by an I2C command. Alternatively, the ADC can run continuously, and the user can read the latest conversion data whenever it is required. Up to four unique I2C addresses can be created, depending on the way the ADR pin is connected.A SETV pin is also included. A voltage applied to this pin is internally compared to the output voltage on the current sense amplifier. The output of the SETV comparator asserts when the current sense amplifier output exceeds the SETV voltage. This event is detected at the ALERT block. The ALERT block then charges up the external TIMER capacitor with a fixed current. When this timing cycle is complete, the ALERT output asserts.The ALERT output can be used as a flag to warn a micro-controller or field programmable gate array (FPGA) of an overcurrent condition. ALERT outputs of multiple ADM1192 devices can be tied together and used as a combined alert.A basic P-channel FET hot swap circuit can be implemented with the ALERT output. The value of the TIMER capacitor should be set so that the charging time of this capacitor is much longer than the period where a higher than nominal inrush current may be flowing.The ADM1192 is packaged in a 10-lead MSOP.APPLICATIONS Power monitoring/power budgeting Central office equipment Telecommunication and data communication equipment PCs/servers

The REF01 / REF02 / REF03 series of precision voltage references provide a stable 10.0 V, 5.0 V, or 2.5 V output with minimal change in response to variations in supply voltage, ambient temperature or load conditions. The devices are available in 8-lead SOIC, PDIP, CERDIP, and TO-99 packages, as well as 20-terminal LCC packages (883 only), furthering the usability of the devices in both standard and high stress applications.With an external buffer and a simple resistor network, the TEMP terminal can be used for temperature sensing and approximation. A TRIM terminal is also provided on the device for fine adjustment of the output voltage.The small footprint, wide supply range, and application versatility make the REF0x series of references ideal for general-purpose and space-constrained applications.Newer designs should use the ADR01 / ADR02 / ADR03 / ADR06 series of references, which offer higher accuracy and temperature stability over a wider operating temperature range, while maintaining full pin-for-pin compatibility with the REF01 / REF02 / REF03 series. This data sheet applies to commercial-grade products only. Contact sales or visit analog.com for military-grade (883) data sheets.APPLICATIONS Precision data systems High resolution converters Industrial process control systems Precision instruments Military and aerospace applications

The AD1582/AD1583/AD1584/AD1585 are low cost, low power, low dropout, precision band gap references. These designs are available as 3-terminal (series) devices and are packaged in the compact SOT-23, 3-lead surface-mount package. The versatility of these references makes them ideal for use in battery-powered 3 V or 5 V systems where there can be wide variations in supply voltage and a need to minimize power dissipation.The superior accuracy and temperature stability of the AD1582/AD1583/AD1584/AD1585 result from the precise matching and thermal tracking of on-chip components. Patented temperature drift curvature correction design techniques minimize the nonlinearities in the voltage output temperature characteristic.The AD1582/AD1583/AD1584/AD1585 series mode devices source or sink up to 5 mA of load current and operate efficiently with only 200 mV of required headroom supply. These parts draw a maximum 70 μA of quiescent current with only a 1.0 μA/V variation with supply voltage. The advantage of these designs over conventional shunt devices is extraordinary. Valuable supply current is no longer wasted through an input series resistor, and maximum power efficiency is achieved at all input voltage levels.The AD1582/AD1583/AD1584/AD1585 are available in two grades, A and B, and are provided in a tiny footprint, the SOT-23. All grades are specified over the industrial temperature range of −40°C to +125°C. Applications Portable, battery-powered equipment; for example, notebook computers, cellular phones, pagers, PDAs, GPSs, and DMMs Computer workstations; suitable for use with a wide range of video RAMDACs Smart industrial transmitters PCMCIA cards Automotive Hard disk drives 3 V/5 V, 8-bit/12-bit data converters

The AD22057 is a single-supply difference amplifier for the amplification and low-pass filtering of small differential voltages from sources having a large common-mode voltage.Supply voltages from +3 V to +36 V can be used. The input common-mode range extends from below ground to 24 V using a +5 V supply with excellent rejection of this common-mode voltage.This range is achieved by the use of a special resitive attenuator at the input, laser trimmed to a very high differential balance. Low initial offset voltage and offset voltage drift are specified, and long-term stability of gain and offset voltage is also provided.Provisions are included for optional low-pass filtering and gain adjustment. An accurate midscale offset feature allows bipolar signals to be amplified.

The AD2S83 is a monolithic 10-, 12-, 14-, or 16-bit tracking resolver-to-digital converter.The converter allows users to select their own resolution and dynamic performance with external components. The converter allows users to select the resolution to be 10, 12, 14, or 16 bits and to track resolver signals rotating at up to 1040 revs per second (62,400 rpm) when set to 10-bit resolution.The AD2S83 converts resolver format input signals into a parallel natural binary digital word using a ratiometric tracking conversion method. This ensures high noise immunity and tolerance of long leads allowing the converter to be located remote from the resolver.A precise analog signal proportional to velocity is also available and will replace atachogenerator. The AD2S83 operates over reference frequencies in the range 0 Hz to 20,000 Hz.

The AD2S90 is a complete 12-bit resolution tracking resolver-to- digital converter. No external components are required to operate the device.The converter accepts 2 V rms ± 10% input signals in the range 3 kHz-20 kHz on the SIN, COS and REF inputs. A Type II servo loop is employed to track the inputs and convert the input SIN and COS information into a digital representation of the input angle. The bandwidth of the converter is set internally at 1 kHz. The maximum tracking rate is 375 rps at 12-bit resolution.Angular position output information is available in two forms, absolute serial binary and incremental A quad B.The absolute serial binary output is 12-bit (1 in 4096). The data output pin is high impedance when Chip Select CS is logic HI. This allows the connection of multiple converters onto a common bus. Absolute angular information in serial pure binary form is accessed by CS followed by the application of an external clock (SCLK) with a maximum rate of 2 MHz.The encoder emulation outputs A, B and NM continuously produce signals equivalent to a 1024 line encoder.When decoded this corresponds to 12-bits resolution. Three common north marker pulse widths are selected via a single pin (NMC).An analog velocity output signal provides a representation of velocity from a rotating resolver shaft traveling in either a clockwise or counterclockwise direction.The AD2S90 operates on a ±5 V dc ± 5% power supplies and is fabricated on Analog Devices' Linear Compatible CMOS process (LC2MOS). LC2MOS is a mixed technology process that combines precision bipolar circuits with low power CMOS logic circuits.