The ADM4850 / ADM4851 / ADM4852 / ADM4853 / ADM4854 /ADM4855 / ADM4856 / ADM4857 are differential line transceiverssuitable for high speed, half-duplex and full duplex data communication on multipoint bus transmission lines. Theyare designed for balanced data transmission and comply with EIA Standards RS-485 and RS-422. The ADM4850 / ADM4851 / ADM4852 / ADM4853 are half-duplex transceivers that sharedifferential lines and have separate enable inputs for the driver and receiver. The full duplex ADM4854 / ADM4855 / ADM4856 / ADM4857 transceivers have dedicated differential line driveroutputs and receiver inputs.The devices have a 1/8-unit load receiver input impedance, which allows up to 256 transceivers on one bus. Because only onedriver must be enabled at any time, the output of a disabled or powered down driver is three-stated to avoid overloading the bus.The receiver inputs have a true fail-safe feature, which ensures a logic high output level when the inputs are open or shorted.This guarantees that the receiver outputs are in a known state before communication begins and when communication ends.The driver outputs are slew rate limited to reduce EMI and data errors caused by reflections from improperly terminated buses.Excessive power dissipation caused by bus contention or by output shorting is prevented with a thermal shutdown circuit.The devices are fully specified over the commercial and industrial temperature ranges and are available in 8-lead SOIC (ADM4850through ADM4857), 8-lead LFCSP (ADM4850 / ADM4852 / ADM4853), and 8-lead MSOP (ADM4850 only) packages.Applications Low power RS-485 applications EMI sensitive systems DTE to DCE interfaces Industrial control Packet switching Local area networks Level translators

The ADM485 is a differential line transceiver suitable for high speed bidirectional data communication on multipoint bus transmission lines. It is designed for balanced data transmission and complies with both EIA Standards RS-485 and RS-422. The part contains a differential line driver and a differential line receiver. Both the driver and the receiver may be enabled independently. When disabled, the outputs are tristated.The ADM485 operates from a single +5 V power supply. Excessive power dissipation caused by bus contention or by output shorting is prevented by a thermal shutdown circuit. This feature forces the driver output into a high impedance state if during fault conditions a significant temperature increase is detected in the internal driver circuitry.Up to 32 transceivers may be connected simultaneously on a bus, but only one driver should be enabled at any time. It is important, therefore, that the remaining disabled drivers do not load the bus. To ensure this, the ADM485 driver features high output impedance when disabled and also when powered down. This minimizes the loading effect when the transceiver is not being utilized. The high impedance driver output is maintained over the entire common-mode voltage range form -7V to +12 V.The receiver contains a fail safe feature which results in a logic high output state if the inputs are unconnected (floating).The ADM485 is fabricated on BiCMOS, an advanced mixed technology process combining low power CMOS with fast switching bipolar technology. All inputs and outputs contain protection against EDS; all diver outputs feature high source and sink current capability. An epitaxial layer is used to guard against latch-up.The ADM485 features extremely fast switching speeds. Minimal driver propagation delays permit transmission at data rates up to 5 Mbits/s while low skew minimizes EMI interference. The part is fully specified over the commercial and industrial temperature range and is available in an 8-pin DIL/SOIC packages.

The ADM485 is a differential line transceiver suitable for high speed bidirectional data communication on multipoint bus transmission lines. It is designed for balanced data transmission and complies with both EIA Standards RS-485 and RS-422. The part contains a differential line driver and a differential line receiver. Both the driver and the receiver may be enabled independently. When disabled, the outputs are tristated.The ADM485 operates from a single +5 V power supply. Excessive power dissipation caused by bus contention or by output shorting is prevented by a thermal shutdown circuit. This feature forces the driver output into a high impedance state if during fault conditions a significant temperature increase is detected in the internal driver circuitry.Up to 32 transceivers may be connected simultaneously on a bus, but only one driver should be enabled at any time. It is important, therefore, that the remaining disabled drivers do not load the bus. To ensure this, the ADM485 driver features high output impedance when disabled and also when powered down. This minimizes the loading effect when the transceiver is not being utilized. The high impedance driver output is maintained over the entire common-mode voltage range form -7V to +12 V.The receiver contains a fail safe feature which results in a logic high output state if the inputs are unconnected (floating).The ADM485 is fabricated on BiCMOS, an advanced mixed technology process combining low power CMOS with fast switching bipolar technology. All inputs and outputs contain protection against EDS; all diver outputs feature high source and sink current capability. An epitaxial layer is used to guard against latch-up.The ADM485 features extremely fast switching speeds. Minimal driver propagation delays permit transmission at data rates up to 5 Mbits/s while low skew minimizes EMI interference. The part is fully specified over the commercial and industrial temperature range and is available in an 8-pin DIL/SOIC packages.

The ADN2830 provides closed loop control of the average optical power of a continuous wave (CW) laser diode (LD) after initial factory setup. The control loop adjusts the laser IBIAS to maintain a constant Back Facet Monitor Photo Diode (MPD) current and hence a constant laser optical power. The external PSET resistor is adjusted during factory set up to set the desired optical power. RPSET is set at 1.23/IAV, where IAVis the MPD current corresponding to the desired optical power. Programmable alarms are provided for laser fail (end of life) and laser degrade (impending fail).The ADN2830 operates from a single power +5 V supply. It is available in 5mm × 5mm LFCSP-32 Lead Frame Chip Scale.

The ADN2892 is a 4.25 Gbps limiting amplifier with integratedloss of signal (LOS) detection circuitry and a received signalstrength indicator (RSSI). This part is optimized for FibreChannel (FC) and Gigabit Ethernet (GbE) optoelectronicconversion applications. The ADN2892 has a differential inputsensitivity of 3.5 mV p-p and accepts up to a 2.0 V p-pdifferential input overload voltage. The ADN2892 has currentmode logic (CML) outputs with controlled rise and fall times.The ADN2892 has a selectable low-pass filter with a −3 dBcutoff frequency of 1.5 GHz. By setting BW_SEL to Logic 0, thefilter can limit the relaxation oscillation of a low cost CD laserused in a legacy 1 Gbps FC transmitter. The limited BW alsoreduces the rms noise and in turn improves the receiver opticalsensitivity for a lower data rate application, such as 1× FC andGbE.By monitoring the bias current through a photodiode, the onchipRSSI detector measures the average power received with2% typical linearity over the entire valid input range of thephotodiode. The on-chip RSSI detector facilitates SFF-8472-compliant optical transceivers by eliminating the need forexternal RSSI detector circuitry.Additional features include a programmable loss-of-signal(LOS) detector and output squelch. The ADN2892 is availablein a 3 mm × 3 mm, 16-lead LFCSP.Applications 1×, 2×, and 4× FC transceivers  SFP/SFF/GBIC optical transceivers  GbE transceivers  Backplane receivers

ADP7104 20 V, 500 mA, Low Noise, CMOS LDOThe ADP3334 is a member of the ADP333x family of precision low dropout anyCAP® voltage regulators. The ADP3334 operates with an input voltage range of 2.6 V to 11 V and delivers a continuous load current up to 500 mA. The novel anyCAP® architecture requires only a very small 1 µF output capacitor for stability, and the LDO is insensitive to the capacitor’s equivalent series resistance (ESR). This makes ADP3334 stable with any capacitor, including ceramic (MLCC) types for space restricted applications.

The ADP3338 is a member of the ADP330x family ofprecision low dropout anyCAP® voltage regulators. The ADP3338 operates with an input voltage range of +2.7 V to +8 V and delivers a load current up to 1 A. The ADP3338 stands out from the conventional LDOs with a novel architecture and an enhanced process that enables it to offer performance advantages and higher output currentthan its competition. Its patented design requires only a 1.0 µF output capacitor for stability. This device is insensitive to output capacitor Equivalent Series Resistance (ESR), and is stable with any good quality capacitor, including ceramic (MLCC) types for space-restricted applications.The ADP3338 achieves exceptional accuracy of ±0.9% at room temperature and ±1.8% over temperature, line and load variations. The dropout voltage of the ADP3338 is only 200 mV (typical) at 1 A. This device also includes a safety current limit and thermal overload protection. The ADP3338 has ultralow quiescent current 130 µA (typ) in light load situations.APPLICATIONS  Notebook, palmtop computers SCSI terminators Battery-powered systems Bar code scanners Camcorders, cameras Home entertainment systems Networking systems DSP/ASIC supplies

The ADSP-21062 and ADSP-21060 SHARC DSPs are signal processing microcomputers that offer new capabilities and levels of performance. The ADSP-2106x SHARCs are 32-bit processors optimized for high performance DSP applications. The ADSP-2106x builds on the ADSP-21000 DSP core to form a complete system-on-a-chip, adding a dual-ported on-chip SRAM and integrated I/O peripherals supported by a dedicated I/O bus. Fabricated in a high speed, low power CMOS process, the ADSP-2106x has a 25 ns instruction cycle time and operates at 40 MIPS. With its on-chip instruction cache, the processor can execute every instruction in a single cycle.The ADSP-2106x SHARC DSP represents a new standard of integration for signal computers, combining a high performance floating-point DSP core with integrated, on-chip system features including a 4 Mbit SRAM memory (2 Mbit on the ADSP-21062, 1 Mbit on the ADSP-21061), host processor interface, DMA controller, serial ports, and link port and parallel bus connectivity for glueless DSP multiprocessing.

The ADF7025 is a low power, highly integrated FSK transceiver. It is designed for operation in the license–free ISM bands of 433 MHz, 862 MHz to 870 MHz, and 902 MHz to 928 MHz. The ADF7025 can be used for applications operating under the European ETSI EN300-220 or the North American FCC (Part 15) regulatory standards. The ADF7025 is intended for wideband, high data rate applications with deviation frequencies from 100 kHz to 750 kHz and data rates from 9.6 kbps to 384 kbps. A complete transceiver can be built using a small number of external discrete components, making the ADF7025 very suitable for price-sensitive and area-sensitive applications.The ADF7025 transceiver is suitable for operation under FCC 15.247 Digital Modulation Specification characterized by large deviation frequencies. This allows up to 1Watt transmit power without the need to frequency hop, thereby significantly reducing protocol overhead.APPLICATIONS Wireless audio/video Remote control/security systems Wireless metering Keyless entry Home automation

The OP193/OP293 are single-supply operational amplifiers that feature a combination of high precision, low supply current, and the ability to operate at low voltages. For high performance in single-supply systems, the input and output ranges include ground, and the outputs swing from the negative rail to within 600 mV of the positive supply. For low voltage operation, the OP193/OP293 can operate down to +1.7 V or ±0.85 V.The combination of high accuracy and low power operation make the OP193/OP293 useful for battery-powered equipment. The part’s low current drain and low voltage operation allow it to continue performing long after other amplifiers have ceased functioning either because of battery drain or headroom.The OP193/OP293 are specified for single +2 V through dual ±15 V operation over the extended (−40°C to +125°C) temperature range. They are available in SOIC surface-mount packages.Applications Digital scales Strain gages Portable medical equipment Battery-powered instrumentation Temperature transducer amplifier