The HMC624A is a 6-bit digital attenuator with a 31.5 dB attenuation control range in 0.5 dB steps.The HMC624A offers excellent attenuation accuracy and high input linearity over the specified frequency range from 100 MHz to 6.0 GHz. However, this digital attenuator features external ac grounding capacitors to extend the operation below 100 MHz.The HMC624A is integrated with two dies: a CMOS driver and a gallium arsenide (GaAs) RF attenuator. The CMOS driver provides both serial and parallel control of the RF attenuator. The device also features a user-selectable power-up state and a serial output port for cascading other serial controlled components.The HMC624A operates with a single positive supply voltage from 3 V to 5 V, and provides a CMOS-/TTL-compatible control interface.The HMC624A comes in a RoHS compliant, compact, 4 mm × 4 mm LFCSP package, and is pin compatible to the HMC1122 except for the ACGx pins.Applications Cellular infrastructure Microwave radios and very small aperture terminals (VSATs) Test equipment and sensors Intermediate frequency (IF) and radio frequency (RF) designs 

The HMC626ALP5E is a digitally controlled variable gain amplifier which operates from DC to 1 GHz, and can be programmed to provide anywhere from 8.5 dB, to 40 dB of gain, in 0.5 dB steps. The HMC626ALP5E delivers noise figure of 2.8 dB in its maximum gain state, with output IP3 of up to +36 dBm in any state. This single positive control line per bit digital VGA incorporates off chip AC ground capacitors for near DC operation, making it suitable for a wide variety of RF and IF applications. The HMC626ALP5E is housed in a RoHS compliant 5x5 mm QFN leadless package, and requires no external matching components. A serial control version of this product is available as the HMC681ALP5(E).Applications IF & RF Applications Cellular/3G Infrastructure WiBro / WiMAX / 4G Microwave Radio & VSAT Test Equipment & Sensors 

The HMC739 is a GaAs InGaP Heterojunction Bipolar Transistor (HBT) MMIC VCO. The HMC739 integrates a resonator, negative resistance device, varactor diode and divide-by-16 prescaler. The VCOs phase noise performance is excellent over temperature, shock, and process due to the oscillator's monolithic structure. Power output is +8 dBm typical from a 5V supply voltage. The voltage controlled oscillator is packaged in a low cost leadless QFN 4x4 mm surface mount package.APPLICATIONS Point-to-Point Radios Point-to-Multi-Point Radios/LMDS VSAT

The HMC746LC3C is an AND/NAND/OR/NOR function designed to support data transmission rates of up to 14 Gbps, and clock frequencies as high as 14 GHz. The HMC746LC3C may be easily configured to provide any of the following logic functions: AND, NAND, OR and NOR.All differential inputs to the HMC746LC3C are CML and terminated on-chip with 50 Ohms to the positive supply, Vcc, and may be AC or DC coupled. The differential CML outputs are source terminated to 50 Ohms and may also be AC or DC coupled. Outputs can be connected directly to a 50 Ohm Vcc-terminated system, while DC blocking capacitors may be used if the terminating system is 50 Ohms to ground. The HMC746LC3C also features an output level control pin, VR, which allows for loss compensation or signal-level optimization. the HMC746LC3C operates from a single 3.3 V supply and is available in ROHS-compliant 3x3 mm SMT package.APPLICATIONS RF ATE Applications Broadband Test & Measurement Serial Data Transmission up to 13 Gbps Digital Logic Systems up to 13 GHz NRZ-to-RZ Conversion

The HMC987LP5E 1-to-9 fanout buffer is designed for low noise clock distribution. It is intended to generate relatively square wave outputs with rise/fall times < 100 ps. The low skew and jitter outputs of the HMC987LP5E, combined with its fast rise/fall times, leads to controllable low-noise switching of downstream circuits such as mixers, ADCs/DACs or SERDES devices. The noise floor is particularly important in these applications, when the clocknetwork bandwidth is wide enough to allow squarewave switching. Driven at 2 GHz, outputs of the HMC987LP5E have a noise floor of –166 dBc/Hz, corresponding to a jitter density of 0.6 asec/rtHz - or 50 fs over an 8 GHz bandwidth.The input stage can be driven single-ended or differentially, in a variety of signal formats (CML, LVDS, LVPECL or CMOS), AC or DC coupled. The input stage also features adjustable input impedance. It has 8 LVPECL outputs, and 1 CML output with adjustable swing/power-level in 3 dB steps.Individual output stages may be enabled or disabled for power-savings when not required using either hardware control pins, or under control of a serial-port interface.APPLICATIONS SONET, Fibre Channel, GigE Clock Distribution ADC/DAC Clock Distribution Low Skew and Jitter Clock or Data Fanout Wireless/Wired Communications Level Translation High Performance Instrumentation Medical Imaging Single-Ended to Differential Conversion

The ADF4152HV is a 5.0 GHz, fractional-N or integer N frequency synthesizer with an integrated high voltage charge pump. The synthesizer can drive external wideband voltage controlled oscillators (VCOs) directly, eliminating the need for operational amplifiers to achieve higher tuning voltages. The integrated high voltage charge pump simplifies design and reduces cost while improving phase noise, in contrast to active filter topologies, which tend to degrade phase noise compared to passive filter topologies.The VCO frequency can be divided by 1, 2, 4, 8, or 16 to allow the user to generate RF output frequencies as low as 31.25 MHz. For applications that require isolation, the RF output stage can be muted. The mute function is both pin and software controllable.A simple 3-wire interface controls all on-chip registers. The charge pump operates from a power supply ranging from 6.0 V to 30 V, whereas the rest of the device operates from 3.0 V to 3.6 V. The ADF4152HV can be powered down when not in use.Applications Wireless infrastructure Microwave point to point/point to multipoint radios Very small aperture terminal (VSAT) radios Test equipment Private land mobile radios

The ADF4355-2 allows implementation of fractional-N or integer-N phase-locked loop (PLL) frequency synthesizers when used with an external loop filter and an external reference frequency. A series of frequency dividers permits operation from 54 MHz to 4400 MHz. The ADF4355-2 has an integrated VCO with a fundamental output frequency ranging from 3400 MHz to 6800 MHz. In addition, the VCO frequency is connected to divide by 1, 2, 4, 8, 16, 32, or 64 circuits that allow the user to generate RF output frequencies as low as 54 MHz. For applications that require isolation, the RF output stage can be muted. The mute function is both pin and software controllable.Control of all on-chip registers is through a simple 3-wire interface. The ADF4355-2 operates with analog and digital power supplies ranging from 3.15 V to 3.45 V, with charge pump and VCO supplies from 4.75 V to 5.25 V. The ADF4355-2 also contains hardware and software power-down modes.Applications Wireless infrastructure (W-CDMA, TD-SCDMA, WiMAX, GSM, PCS, DCS, DECT) Point to point/point to multipoint microwave links Satellites/VSATs Test equipment/instrumentation Clock generation

The ADGS5412 contains four independent single-pole/single-throw (SPST) switches. A serial peripheral interface (SPI) controls the switches. The SPI interface has robust error detection features, including cyclic redundancy check (CRC) error detection, invalidread/write address detection, and serial clock (SCLK) counterror detection.It is possible to daisy-chain multiple ADGS5412 devices together,which enables the configuration of multiple devices with aminimal amount of digital lines. The ADGS5412 can also operate in burst mode to decrease the time between SPIcommands. Each switch conducts equally well in both directions when on,and each switch has an input signal range that extends to thesupplies. In the off condition, signal levels up to the supplies are blocked. The on-resistance profile is very flat over the full analog input range, which ensures good linearity and low distortion when switching audio signals. The ADGS5412 exhibits break-before-make switching action, allowing use of the device in multiplexer applications with external wiring.PRODUCT HIGHLIGHTS SPI interface removes the need for parallel conversion and logic traces and reduces general-purpose input/output (GPIO) channel count. Daisy-chain mode removes additional logic traces when multiple devices are used. CRC, invalid read/write address, and SCLK count error detection ensure a robust digital interface. CRC error detection capabilities allow for the use of the ADGS5412 in safety critical systems. Guaranteed break-before-make switching allows the use of the ADGS5412 in multiplexer configurations with external wiring.Trench isolation analog switch section guards against latch-up. A dielectric trench separates the positive (P) and negative (N) channel transistors thereby preventing latch-up even under severe overvoltage conditions.APPLICATIONS Relay replacement Automatic test equipment Data acquisition Instrumentation Avionics Audio and video switching Communication systems

The ADIS16490 is a complete inertial system that includes a triaxis gyroscope and a triaxis accelerometer. Each inertial sensor in the ADIS16490 combines industry leading iMEMS® technology with signal conditioning that optimizes dynamic performance. The factory calibration characterizes each sensor for sensitivity, bias, alignment, and linear acceleration (gyroscope bias). As a result, each sensor has its own dynamic compensation formulas that provide accurate sensor measurements.The ADIS16490 provides a simple, cost effective method for integrating accurate, multiaxis inertial sensing into industrial systems, especially when compared with the complexity and investment associated with discrete designs. All necessary motion testing and calibration are part of the production process at the factory, greatly reducing system integration time. Tight orthogonal alignment simplifies inertial frame alignment in navigation systems. The SPI and register structure provide a simple interface for data collection and configuration control.The ADIS16490 uses the same footprint and connector system as the ADIS16375, ADIS16480, ADIS16485, and ADIS16488A, which greatly simplifies the upgrade process. The ADIS16490 is packaged in a module that is approximately 47 mm × 44 mm × 14 mm and includes a standard connector interface.Applications Precision instrumentation, stabilization Guidance, navigation, control Avionics, unmanned vehicles Precision autonomous machines, robotics

The ADM1260 Super Sequencer® is a configurable supervisory/sequencing device that offers a single-chip solution for supply monitoring and sequencing in multiple supply systems.A high speed interchip bus (ICB) allows multiple devices to be easily linked together. It is possible to create a system capable of sequencing up to 40 supplies and monitoring up to 37 supplies. Using the ADI Power Studio™ software, the operation of the ICB is transparent to the user, making multiple devices appear to operate as a single virtual sequencer.In addition to these functions, the ADM1260 integrates a 12-bit analog-to-digital converter (ADC) and six 8-bit voltage output digital-to-analog converters (DACs). Use the ADC and the DACs to implement a closed-loop margining system that enables supply adjustment by altering either the feedback node or the reference of a dc-to-dc converter using the DAC outputs.Supply margining can be performed with a minimum of external components. The margining loop can be used for in-circuit testing of a board during production (for example, to verify board functionality at −5% of nominal supplies), or it can be used dynamically to accurately control the output voltage of a dc-to-dc converter.The device also provides up to 10 programmable inputs for monitoring undervoltage faults, overvoltage faults, or out of window faults on up to 10 supplies. In addition, 10 programmable outputs can be used as logic enables. Six of these programmable outputs can also provide an output of up to 12 V for driving the gate of an N-FET that can be placed in the path of a supply.The logical core of the device is a sequencing engine (SE). This state machine-based construction provides up to 61 different states. This design enables very flexible sequencing of the outputs, based on the condition of the inputs.A block of nonvolatile EEPROM is available that can be used to store user defined information and can also be used to hold a number of fault records that are written by the sequencing engine, as defined by the user when a particular fault or sequence occurs.The device is controlled via configuration data that can be programmed into an EEPROM. The entire configuration can be programmed using an intuitive graphical user interface (GUI)-based software package provided by Analog Devices, Inc., the ADI Power Studio software.Applications Central office systems Servers/routers Multivoltage system line cards Digital signal processor (DSP)/field programmable gate array (FPGA) supply sequencing In-circuit testing of margined supplies