200 g Range, 3-Axis Digital Accelerometer Features: ±200 g measurement range Low power: 170 μA in measurement mode and 17 μA in standby mode at VS = 2.5 V (typical) User selectable bandwidth up to 3200 Hz ODR Fixed 13-bit output resolution Supply voltage range: 2.0 V to 3.6 V Embedded memory management system with FIFO technology minimizes host processor load Shock event detection Activity/inactivity monitoring SPI (3- or 4-wire) and I2C digital interfaces Wide temperature range: −40 to +125°C 10,000 g shock survival Pb free and RoHS compliant Small and thin: 32-lead, 5 mm × 5 mm × 1.45 mm LFCSP AEC-Q100 qualified for automotive applications

3-Axis, 2 g/4 g/8 g/16 g Ultralow Power Digital Accelerometer Features: Multipurpose accelerometer with 10- to 13-bit resolution for use in a wide variety of applications Digital output accessible via SPI (3- and 4-wire) and I2C Built-in motion detection features make tap, double-tap, activity, inactivity, orientation, and free-fall detection trivial user-adjustable thresholds interrupts independently mappable to two interrupt pins Low power operation down to 23 μA and embedded FIFO for reducing overall system power Wide supply and I/O voltage range: 1.7 V to 2.75 V Wide operating temperature range (−40°C to +85°C) 10,000 g shock survival Small, thin Pb free, RoHS compliant 3 mm × 3 mm × 0.95 mm LGA package

Low Noise, Low Drift, Low Power, 3-Axis MEMS Accelerometers with Digital Output Features: Hermetic package offers optimal long-term stability 0 g offset vs. temperature (all axes): 0.75 mg/°C maximum Ultralow noise spectral density (all axes): 75 μg/√Hz Low power, VSUPPLY (LDO regulator enabled) Measurement mode: 200 μA Standby mode: 21 μA Digital output features Digital SPI and limited I2C interfaces supported 20-bit ADC Data interpolation routine for synchronous sampling Programmable high- and low-pass digital filters Integrated temperature sensor Voltage range options VSUPPLY with internal regulators: 2.25 V to 3.6 V V1P8ANA, V1P8DIG with internal LDO regulator bypassed: 1.8 V typical ± 10% Operating temperature range: −40°C to +125°C 14-terminal, 6 mm × 5.6 mm × 2.2 mm, LCC package

3-Axis, 200 g Digital MEMS Accelerometer Features: Low power: as low as 35 µA in measurement mode and 0.1 µA in standby mode at VS = 2.5 V (typical) Power consumption scales automatically with bandwidth Embedded, 32-level FIFO buffer minimizes processor load Bandwidth of up to 1 kHz Bandwidth selectable via serial command Shock event detection Activity/inactivity monitoring Supply voltage range: 2.0 V to 3.6 V I/O voltage range: 1.7 V to VS SPI (3- or 4-wire) and I2C digital interfaces Wide temperature range: −40°C to +85°C 10,000 g shock survival Pb free/RoHS compliant Small and thin: 3 mm × 5 mm × 1 mm LGA packageADXL375-EP supports defense and aerospace applications (AQEC standard)Download ADXL375-EP Data Sheet (pdf)Extended industrial temperature range: −55°C to +105°CControlled manufacturing baseline1 assembly/test site1 fabrication siteProduct change notificationQualification data available on requestV62/ 18612 DSCC Drawing Number

Quad 2A Supply Current, Low IB, Zero-Drift Operational Amplifiers Features: Low Supply Current: 2μA Maximum (per Amplifier) Offset Voltage: 5μV Maximum Offset Voltage Drift: 0.02μV/°C Maximum Input Bias Current: 3pA Typical 30pA Maximum, –40°C to 85°C 100pA Maximum, –40°C to 125°C Integrated EMI Filter (114dB Rejection at 1.8GHz) Shutdown Current: 170nA Maximum (per Amplifier) Rail-to-Rail Input and Output 1.7V to 5.25V Operating Supply Range AVOL: 140dB Typical Low-Charge Power-Up for Duty Cycled Applications Specified Temperature Ranges: –40°C to 85°C –40°C to 125°C SC70, TSOT23, MS8, DFN10, TSSOP14 and QFN16 Packages

2, 31.76 W, Digital Input, Filterless Stereo Class D Audio Amplifier Features: Digital input stereo, high efficiency Class-D amplifier Operates from a single 4.5 V to 16.5 V supply State-of-the-art, proprietary, filterless - modulation 106.5 dB SNR at PO = 8.1 W, RL = 8 , AV = 19 dB, PVDD = 12 V, A weighted 0.004% THD + N at 5 W into 8 38.5 V rms output voltage noise, f = 20 Hz to 20 kHz, A weighted, PVDD = 16 V, 8 Pop and clickless on and off sequence 2 14.67 W output at 12 V supply to 4 loads at <1% THD + N 2 14.4 W output at 16 V supply to 8 loads at <1% THD + N Mono mode for increased maximum output power 1 49.69 W output at 16 V supply to 2 loads at <1% THD + N Support for low impedance loads As low as 3 Ω/5 μH in stereo mode As low as 2 Ω/5 μH in mono mode High power efficiency 93.8% efficiency into an 8 Ω load 90.6% efficiency into a 4 Ω load 12.34 mA quiescent current with single 12 V PVDD supply Single-supply operation with internal LDOs or option to use an external 5 V and 1.8 V supply for lowest power consumption I2C control and hardware modes with up to 16 pin-selectable slots/addresses Supported sample rates from 8 kHz to 192 kHz with 24-bit resolution Multiple PCM audio serial data formats TDM slave with support for up to 16 devices on a single bus I2S or left justified slave Adjustable full-scale output tailored for many PVDD sources 2- and 3-cell Li-Ion batteries Digital volume control with selectable smooth ramp Automatic power-down function Supply monitoring automatic gain control (AGC) function reduces system brownout Standalone operational mode without I2C Temperature sensor with 1°C step readout via I2C Short-circuit, undervoltage, and thermal protection Thermal early warning Power-on reset PVDD sensing ADC 40-lead, 6 mm × 6 mm LFCSP with thermal pad

Ultra Low Power, Class-D Audio Amplifier Features: Filterless digital input, mono differential output Class-D amplifier with 3-level Σ-Δ modulation optimized for headphone drive Operates from single 1.8 V supply 80 mW output power, 16 Ω load at <0.1% THD + N 2.57 μV rms noise, 113 dB A weighted signal-to-noise ratio and dynamic range 0.003% THD + N at 30 mW, 1 kHz output 32 Ω load I2C control with up to 4 pin selectable addresses or standalone operation Multiple serial data formats TDM, I2S, or left justified slave PDM input operating from 2.8224 MHz to 12.288 MHz Support sample rates from 8 kHz to 768 kHz 3.9 μs latency with 6 MHz PDM input Flexible digital gain adjustment DC blocking high-pass filter with programmable corner frequency 1.55 mW typical idle power in high performance mode Low power modes for reduced power consumption Flexible output gain limiter and clipping Auto power-down feature with zero digital input Short-circuit protection Pop and click suppression User-selectable ultralow EMI emissions mode Power-on reset 1.8 V PVDD supply 1.2 V to 1.8 V IOVDD supply 11-ball, 0.984 mm × 1.444 mm, 0.35 mm pitch WLCSP

RapID Platform Generation 2 (RPG2) Network Interface Features: Configurable industrial protocol support PROFINET RT (Class B) PROFINET IRT (Class C): coming soon EtherNet/IP with DLR EtherCAT All protocols precertified Configurable applications processor interface UART: 115,200 bps to 1,000,000 bps Ethernet at 10 Mbps or 100 Mbps SPI follower: 10 MHz maximum clock I2C, QSPI, and CAN: future option Industrial Ethernet interface-compliant to IEEE 802.3, 10Base or 100Base transmit half and full duplex Single 3.3 V power supply, 840 mW Cycle time down to 1 ms (cycle times vary based on protocol, link type, and application data) 194-ball chip-scale package BGA form factor RoHS 3 compliant –40°C to +85°C industrial temperature range

RapID Platform Generation 2 (RPG2) Network Interface Features: Configurable industrial protocol support PROFINET RT (Class B) PROFINET IRT (Class C): coming soon EtherNet/IP with DLR EtherCAT All protocols precertified Configurable applications processor interface UART: 115,200 bps to 1,000,000 bps Ethernet at 10 Mbps or 100 Mbps SPI follower: 10 MHz maximum clock I2C, QSPI, and CAN: future option Industrial Ethernet interface-compliant to IEEE 802.3, 10Base or 100Base transmit half and full duplex Single 3.3 V power supply, 840 mW Cycle time down to 1 ms (cycle times vary based on protocol, link type, and application data) 194-ball chip-scale package BGA form factor RoHS 3 compliant –40°C to +85°C industrial temperature range

Up to 1 GHz Dual-SHARC+ DSP w/ Integrated Arm Cortex-A5 Features:SHARC+ Core Infrastructure 800 MHz (max) or 1 GHz (max) Core clock frequency 2x 640KB on-chip Level 1 (L1) SRAM memory (with parity) increases low latency performance 32-bit, 40-bit & 64-bit floating point support 32-bit fixed point Byte, short-word, word, long-word addressedArm Core Infrastructure: 1 GHz Arm Cortex-A5 (with Neon/FPU) 32 kByte/32 kByte L1 Instr./Data Cache 256 kByte L2 CacheMemory 2048 KB on-chip Level 2 (L2) SRAM with ECC protection - eliminates need for external memory in many use cases Level 3 (L3) interface optimized for low system power, providing 16-bit interface to DDR3 (supporting 1.35 V capable DDR3L devices)16-bit DDR/DDR3L Memory Controller 1.35V support for DDR3LAdvanced Hardware Accelerators Enhanced FIR/IIR offload engines running at Core clock frequency for added processing power Security Crypto Engines with OTPPowerful DMA SystemInnovative Digital Audio Interface (DAI) includes: 8x Full SPORT interfaces w/TDM & I2S modes 2x S/PDIF Rx/Tx, 8 ASRC pairs 8x Precision Clock Generators 2x 4-channel PDM Mic Inputs 40 BuffersOther Peripheral Connectivity / Interfaces: 2x Quad SPI, 1x Octal SPI MLB 3-pin / 6-pin 6x I2C,3x UARTs 2x Link Ports 16x General Purpose Timer, 1x General Purpose Counter 3x Watchdog Timers ePPI USB 2.0 HS OTG Controller 10/100 EMAC 10/100/1000 EMAC w/AVB and 1588 2x CAN FD 8-ch 12bit Housekeeping ADC 135 GPIO pins, 40 DAI pins Thermal SensorPackage 17mm x 17mm (0.8mm pitch) 400-ball FCBGAAdditional Features Security and Protection Crypto hardware accelerators Fast secure boot with IP protection Enhanced FIR and IIR accelerators running up to 1 GHz AEC-Q100 qualified for automotive applications