The ADG601 / ADG602 are monolithic, CMOS single-pole single-throw (SPST) switches with on resistance typically less than 2.5 Ω. The low on-resistance flatness makes the ADG601 / ADG602 ideally suited to many applications, particularly those requiring low distortion. These switches are ideal replacements for mechanical relays because they are more reliable, have lower power requirements, and are available in much smaller package sizes.The ADG601 is a normally open (NO) switch, and the ADG602 is a normally closed (NC) switch. Each switch conducts equally well in both directions when the device is on, with the input signal range extending to the supply rails.The switches are available in tiny, 6-lead SOT-23; 8-lead MSOP; and 820 μm × 2255 μm die.PRODUCT HIGHLIGHTS Low on resistance (2 Ω typical) Dual ±2.7 V to ±5.5 V or single +2.7 V to +5.5 V supplies Tiny, 6-lead SOT-23; 8-lead MSOP; and 820 μm × 2255 μm die Rail-to-rail input signal rangeAPPLICATIONS Automatic test equipment Power routing Communication systems Data acquisition systems Sample-and-hold systems Avionics Relay replacement Battery-powered systems

The ADG609 is a monolithic CMOS analog multiplexer comprising four differential channels. The ADG609 switches one of four differential inputs to a common differential output as determined by the 2-bit binary address lines A0 and A1. An EN input on both devices is used to enable or disable the device. When disabled, all channels are switched OFF.The ADG609 is designed on an enhanced LC2 MOS process which provides low power dissipation yet gives high switching speed and low on resistance. Each channel conducts equally well in both directions when ON and has an input signal range which extends to the supplies. In the OFF condition, signal levels up to the supplies are blocked. All channels exhibit break before make switching action preventing momentary shorting when switching channels. Inherent in the design is low charge injection for minimum transients when switching the digital inputs.

The ADF4002 frequency synthesizer is used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low-noise digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider and programmable N divider. The 14-bit reference counter (R counter), allows selectable REFIN frequencies at the PFD input.A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). In addition, by programming R and N to 1, the device can be used as a standalone PFD and charge pump.The ADF4002-EP supports defense and aerospace applications (AQEC standard).

The ADF4002 frequency synthesizer is used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low-noise digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider and programmable N divider. The 14-bit reference counter (R counter), allows selectable REFIN frequencies at the PFD input.A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). In addition, by programming R and N to 1, the device can be used as a standalone PFD and charge pump.The ADF4002-EP supports defense and aerospace applications (AQEC standard).

The ADF4002 frequency synthesizer is used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low-noise digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider and programmable N divider. The 14-bit reference counter (R counter), allows selectable REFIN frequencies at the PFD input.A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). In addition, by programming R and N to 1, the device can be used as a standalone PFD and charge pump.The ADF4002-EP supports defense and aerospace applications (AQEC standard).

The ADF4002 frequency synthesizer is used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low-noise digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider and programmable N divider. The 14-bit reference counter (R counter), allows selectable REFIN frequencies at the PFD input.A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). In addition, by programming R and N to 1, the device can be used as a standalone PFD and charge pump.The ADF4002-EP supports defense and aerospace applications (AQEC standard).

The ADF4153 is a fractional-N frequency synthesizer that implements local oscillators in the upconversion and downconversion sections of wireless receivers and transmitters. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. There is a Σ-Δ based fractional interpolator to allow programmable fractional-N division. The INT, FRAC, and MOD registers define an overall N divider (N = (INT + (FRAC/MOD))). In addition, the 4-bit reference counter (R counter) allows selectable REFIN frequencies at the PFD input. A complete phase- locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and a voltage controlled oscillator (VCO).A simple 3-wire interface controls all on-chip registers. The device operates with a power supply ranging from 2.7 V to 3.3 V and can be powered down when not in use.Applications CATV equipment Base stations for mobile radio (GSM, PCS, DCS, WiMAX, SuperCell 3G, CDMA, W-CDMA) Wireless handsets (GSM, PCS, DCS, CDMA, W-CDMA) Wireless LANs, PMR Communications test equipment

The ADF4252 is a dual fractional-N/integer-N frequencysynthesizer that can be used to implement local oscillators (LO)in the upconversion and downconversion sections of wirelessreceivers and transmitters. Both the RF and IF synthesizersconsist of a low noise digital phase frequency detector (PFD), aprecision charge pump, and a programmable reference divider.The RF synthesizer has a Σ-Δ-based fractional interpolator thatallows programmable fractional-N division. The IF synthesizerhas programmable integer-N counters. A complete phase-lockedloop (PLL) can be implemented if the synthesizer is used withan external loop filter and voltage controlled oscillator (VCO).Control of all the on-chip registers is via a simple 3-wire interface.The device operates with a power supply ranging from 2.7 V to3.3 V and can be powered down when not in use.Applications Base stations for mobile radio (GSM, PCS, DCS, CDMA, WCDMA) Wireless handsets (GSM, PCS, DCS, CDMA, WCDMA) Wireless LANs Communications test equipment CATV equipment

The ADG1204 is a complementary metal-oxide semiconductor(CMOS) analog multiplexer, comprising four single channelsdesigned on an iCMOS (industrial CMOS) process. iCMOS® is amodular manufacturing process that combines high voltage CMOSand bipolar technologies. It enables the development of a widerange of high performance analog ICs capable of 33 V operationin a footprint that no previous generation of high voltage deviceshas been able to achieve. Unlike analog ICs using conventionalCMOS processes, iCMOS components can tolerate high supplyvoltages while providing increased performance, dramaticallylower power consumption, and reduced package size.The ultralow capacitance and charge injection of this multiplexermakes it an ideal solution for data acquisition and sample-andholdapplications, where low glitch and fast settling are required.Fast switching speed coupled with high signal bandwidth makesthe device suitable for video signal switching. iCMOS constructionensures ultralow power dissipation, making the device ideallysuited for portable and battery-powered instruments.The ADG1204 switches one of four inputs to a common output, D,as determined by the 3-bit binary address lines: A0, A1, and EN.Logic 0 on the EN pin disables the device. Each switch conductsequally well in both directions when on and has an input signalrange that extends to the supplies. In the off condition, signallevels up to the supplies are blocked. All switches exhibit break-before-makeswitching action.Product Highlights 1. 1.5 pF off capacitance (±15 V supply). <1 pC charge injection. 3 V logic-compatible digital inputs: VIH = 2.0 V, VIL = 0.8 V. No VL logic power supply required. Ultralow power dissipation: <0.03 μW. 14-lead TSSOP and 12-lead, 3 mm × 3 mm LFCSP packages.Applications Automatic test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Audio signal routing Video signal routing Communication systems

The ADG1204 is a complementary metal-oxide semiconductor(CMOS) analog multiplexer, comprising four single channelsdesigned on an iCMOS (industrial CMOS) process. iCMOS® is amodular manufacturing process that combines high voltage CMOSand bipolar technologies. It enables the development of a widerange of high performance analog ICs capable of 33 V operationin a footprint that no previous generation of high voltage deviceshas been able to achieve. Unlike analog ICs using conventionalCMOS processes, iCMOS components can tolerate high supplyvoltages while providing increased performance, dramaticallylower power consumption, and reduced package size.The ultralow capacitance and charge injection of this multiplexermakes it an ideal solution for data acquisition and sample-andholdapplications, where low glitch and fast settling are required.Fast switching speed coupled with high signal bandwidth makesthe device suitable for video signal switching. iCMOS constructionensures ultralow power dissipation, making the device ideallysuited for portable and battery-powered instruments.The ADG1204 switches one of four inputs to a common output, D,as determined by the 3-bit binary address lines: A0, A1, and EN.Logic 0 on the EN pin disables the device. Each switch conductsequally well in both directions when on and has an input signalrange that extends to the supplies. In the off condition, signallevels up to the supplies are blocked. All switches exhibit break-before-makeswitching action.Product Highlights 1. 1.5 pF off capacitance (±15 V supply). <1 pC charge injection. 3 V logic-compatible digital inputs: VIH = 2.0 V, VIL = 0.8 V. No VL logic power supply required. Ultralow power dissipation: <0.03 μW. 14-lead TSSOP and 12-lead, 3 mm × 3 mm LFCSP packages.Applications Automatic test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Audio signal routing Video signal routing Communication systems