The AD8295 contains all the components necessary for a precision instrumentation amplifier front end in one small 4 mm × 4 mm package. It contains a high performance instrumentation amplifier, two general-purpose operational amplifiers, and two precisely matched 10 kΩ resistors.The AD8295 has been designed to make PCB routing easy andefficient. The AD8295 components are arranged in a logicalway so that typical application circuits have short routes and fewvias. Unlike most chip scale packages, the AD8295 does nothave an exposed metal pad on the back of the part, which freesup additional space for routing and vias. The AD8295 comes in a 4 mm × 4 mm LFCSP that requires half the board space of an 8-pin SOIC package.The AD8295 includes a high performance, programmablegain instrumentation amplifier. Gain is set from 1 to 1000 witha single resistor. The low noise and excellent common-mode rejection of the AD8295 enable the part to easily detect small signals even in the presence of large common-mode interference. For a similar instrumentation amplifier without the associated signal conditioning circuitry, see the AD8221 or AD8222 data sheet.The AD8295 operates on both single and dual supplies and iswell suited for applications where ±10 V input voltages areencountered. Performance is specified over the entire industrialtemperature range of −40°C to +85°C for all grades. The AD8295is operational from −40°C to +125°C; see the Typical Performance Characteristics section for expected operation up to 125°C.ApplicationsIndustrial process controlsWheatstone bridgesPrecision data acquisition systemsMedical instrumentationStrain gaugesTransducer interfacesDifferential outputData Sheet, Rev 0, 11/2008

The AD8597/AD8599 are very low noise, low distortion operational amplifiers ideal for use as preamplifiers. The low noise of 1.1 nV/√Hz and low harmonic distortion of −120 dB (or better) at audio bandwidths give the AD8597/AD8599 the wide dynamic range necessary for preamplifiers in audio, medical, and instru-mentation applications. The excellent slew rate of 14 V/μs and 10 MHz gain bandwidth make them highly suitable for medical applications. The low distortion and fast settling time make them ideal for buffering of high resolution data converters.The AD8597 is available in 8-lead SOIC and LFCSP packages, while the AD8599 is available in an 8-lead SOIC package. They are both specified over a −40°C to +125°C temperature range. The AD8597 and AD8599 are members of a growing series of low noise op amps offered by Analog Devices, Inc.Applications Professional audio preamplifiers ATE/precision testers Imaging systems Medical/physiological measurements Precision detectors/instruments Precision data conversion

The AD866x family are single supply, rail-to-rail output amplifiers with low noise performance featuring an extended operating range with supply voltages up to 16 V. They also feature low input bias currents, wide signal bandwidth, and low input voltage and current noise. For lower offset voltage, choose the AD8661/AD8662/AD8664 family.The combination of low offsets, very low input bias currents, and wide supply range make these amplifiers useful in a wide variety of cost sensitive applications normally associated with much higher priced JFET amplifiers. Systems using high impedance sensors, such as photo diodes, benefit from the combination of low input bias current, low noise, and low offset and bandwidth. The wide operating voltage range matches high performance ADCs and DACs. Audio applications and medical monitoring equipment can take advantage of the high input impedance, low voltage and current noise, wide bandwidth, and the lack of popcorn noise found in many other low input bias current amplifiers.The AD866x family is specified over the extended industrial temperature range (−40° to +125°C). See the Ordering Guide for automotive models.Applications Sensor amplificationReference buffersMedical equipmentPhysiological measurementsSignal filters and conditioningConsumer audioPhotodiode amplificationADC driverLevel shifting circuits

The AD9114/AD9115/AD9116/AD9117 are pin-compatible dual, 8-/10-/12-/14-bit, low power digital-to-analog converters (DACs) that provide a sample rate of 125 MSPS. These TxDAC® converters are optimized for the transmit signal path of communication systems. All the devices share the same interface, package, and pinout, providing an upward or downward component selection path based on performance, resolution, and cost.The AD9114/AD9115/AD9116/AD9117 offer exceptional ac and dc performance and support update rates up to 125 MSPS.The flexible power supply operating range of 1.8 V to 3.3 V and low power dissipation of the AD9114/AD9115/AD9116/AD9117 make them well suited for portable and low power applications.PRODUCT HIGHLIGHTS Low Power. DACs operate on a single 1.8 V to 3.3 V supply; total power consumption reduces to 225 mW at 100 MSPS. Sleep and power-down modes are provided for low power idle periods. LVCMOS Clock Input. High speed, single-ended LVCMOS clock input supports a 125 MSPS conversion rate. Easy Interfacing to Other Components. Adjustable output common mode from 0 V to 1.2 V allows for easy interfacing to other components that accept common-mode levels greater than 0 V. APPLICATIONS Wireless infrastructures Picocell, femtocell base stations Medical instrumentation Ultrasound transducer excitation Portable instrumentation Signal generators, arbitrary waveform generators

The AD9212 is an octal, 10-bit, 40 MSPS/65 MSPS ADC with an on-chip sample-and-hold circuit designed for low cost, low power,small size, and ease of use. Operating at a conversion rate of up to 65 MSPS, it is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performanceoperation. No external reference or driver components arerequired for many applications.The ADC automatically multiplies the sample rate clock forthe appropriate LVDS serial data rate. A data clock (DCO)for capturing data on the output and a frame clock (FCO) for signaling a new output byte are provided. Individual channelpower-down is supported and typically consumes less than 2 mW when all channels are disabled.The ADC contains several features designed to maximizeflexibility and minimize system cost, such as programmableclock and data alignment and programmable digital test patterngeneration. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).The AD9212 is available in a RoHS-compliant, 64-lead LFCSP. It isspecified over the industrial temperature range of −40°C to +85°C.PRODUCT HIGHLIGHTS Small Footprint. Eight ADCs are contained in a small package. Low Power of 100 mW per Channel at 65 MSPS. Ease of Use. A data clock output (DCO) operates up to 300 MHz and supports double data rate (DDR) operation. User Flexibility. SPI control offers a wide range of flexible features to meet specific system requirements. Pin-Compatible Family. This includes the AD9222 (12-bit) and AD9252 (14-bit).APPLICATIONS Medical imaging and nondestructive ultrasound Portable ultrasound and digital beam-forming systems Quadrature radio receivers Diversity radio receivers Tape drives Optical networking Test equipment

The AD9251 is a monolithic, dual-channel, 1.8 V supply, 14-bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS analog-to-digital converter (ADC). It features a high performance sample-and hold circuit and on-chip voltage reference.The product uses multistage differential pipeline architecture with output error correction logic to provide 14-bit accuracy at80 MSPS data rates and to guarantee no missing codes over the full operating temperature range.The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).A differential clock input controls all internal conversion cycles. An optional duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance.The digital output data is presented in offset binary, gray code, or twos complement format. A data output clock (DCO) is provided for each ADC channel to ensure proper latch timing with receiving logic. Both 1.8 V and 3.3 V CMOS levels are supported and output data can be multiplexed onto a single output bus.The AD9251 is available in a 64-lead RoHS Compliant LFCSP and is specified over the industrial temperature range (−40°C to +85°C).PRODUCT HIGHLIGHTS The AD9251 operates from a single 1.8 V analog power supply and features a separate digital output driver supply to accommodate 1.8 V to 3.3 V logic families. The patented sample-and-hold circuit maintains excellent performance for input frequencies up to 200 MHz and is designed for low cost, low power, and ease of use. A standard serial port interface supports various product features and functions, such as data output formatting, internal clock divider, power-down, DCO/DATA timing and offset adjustments, and voltage reference modes. The AD9251 is packaged in a 64-lead RoHS compliant LFCSP that is pin compatible with the AD9268 16-bit ADC, the AD9258 14-bit ADC, the AD9231 12-bit ADC, and the AD9204 10-bit ADC, enabling a simple migration path between 10-bit and 16-bit converters sampling from 20 MSPS to 125 MSPS. APPLICATIONS Communications Diversity radio systems Multimode digital receivers GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA I/Q demodulation systems Smart antenna systems Battery-powered instruments Hand held scope meters Portable medical imaging Ultrasound Radar/LIDAR

The AD9261 is a 16-bit analog-to-digital converter (ADC) based on a continuous time sigma-delta (Σ-Δ) architecture that achieves 86 dB of dynamic range over a 10 MHz input bandwidth. The integrated features and characteristics unique to the continuous time Σ-Δ architecture significantly simplify its use and minimize the need for external components.The AD9261 has a resistive input impedance that significantly relaxes the requirements of the driver amplifier. In addition, a 32× oversampled 5th-order continuous time loop filter significantly attenuates out of band signals and aliases, reducing the need for external filters at the input.An external clock input or the integrated integer-N PLL provides the 640 MHz internal clock needed for the oversampled continuous time Σ-Δ modulator. On-chip decimation filters and sample rate converters reduce the modulator data rate from 640 MSPS to a user-defined output data rate between 30 MSPS to 160 MSPS, enabling a more efficient and direct interface.The digital output data is presented in offset binary, Gray code, or twos complement format. A data clock output (DCO) is provided to ensure proper timing with the receiving logic.The AD9261 operates on a 1.8 V analog supply and a 1.8 V to 3.3 V digital supply, consuming 375 mW. The AD9261 is available in a 48-lead LFCSP and is specified over the industrial temperature range (−40°C to +85°C).Product Highlights Continuous time Σ-Δ architecture efficiently achieves high dynamic range and wide bandwidth. Passive input structure reduces or eliminates the requirements for a driver amplifier. An oversampling ratio of 32× and high order loop filter provide excellent alias rejection reducing or eliminating the need for antialiasing filters. An integrated decimation filter, sample rate converter, PLL clock multiplier, and voltage reference provide ease of use. Operates from a single 1.8 V analog power supply and 1.8 V to 3.3 V output supply. A standard serial port interface (SPI) supports various product features and functions.Applications Data Acquisition Automated Test Equipment Instrumentation Medical Imaging

The AD9516-0 provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 2.55 GHz to 2.95 GHz. Optionally, an external VCO/VCXO of up to 2.4 GHz can be used.The AD9516-0 emphasizes low jitter and phase noise to maximize data converter performance, and it can benefit other applications with demanding phase noise and jitter requirements.The AD9516-0 features six LVPECL outputs (in three pairs) and four LVDS outputs (in two pairs). Each LVDS output can be reconfigured as two CMOS outputs. The LVPECL outputs operate to 1.6 GHz, the LVDS outputs operate to 800 MHz, and the CMOS outputs operate to 250 MHz.Each pair of outputs has dividers that allow both the divide ratio and coarse delay (or phase) to be set. The range of division for the LVPECL outputs is 1 to 32. The LVDS/CMOS outputs allow a range of divisions up to a maximum of 1024.The AD9516-0 is available in a 64-lead LFCSP and can be operated from a single 3.3 V supply. An external VCO, which requires an extended voltage range, can be accommodated by connecting the charge pump supply (VCP) to 5 V. A separate LVPECL power supply can be from 2.5 V to 3.3 V (nominal).The AD9516-0 is specified for operation over the industrial range of −40°C to +85°C. APPLICATIONS Low jitter, low phase noise clock distribution 10/40/100 Gb/sec networking line cards, including SONET, Synchronous Ethernet, OTU2/3/4 Forward error correction (G.710) Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs High performance wireless transceivers ATE and high performance instrumentation

The AD9517-4 provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 1.45 GHz to 1.80 GHz. Optionally, an external VCO/VCXO of up to 2.4 GHz can be used.The AD9517-4 emphasizes low jitter and phase noise to maximize data converter performance, and it can benefit other applications with demanding phase noise and jitter requirements.The AD9517-4 features four LVPECL outputs (in two pairs) and four LVDS outputs (in two pairs). Each LVDS output can be reconfigured as two CMOS outputs. The LVPECL outputs operate to 1.6 GHz, the LVDS outputs operate to 800 MHz, and the CMOS outputs operate to 250 MHz.For applications that require additional outputs, a crystal reference input, zero-delay, or EEPROM for automatic configuration at startup, the AD9520 and AD9522 are available. In addition, the AD9516 and AD9518 are similar to the AD9517 but have a different combination of outputs.Each pair of outputs has dividers that allow both the divide ratio and coarse delay (or phase) to be set. The range of division for the LVPECL outputs is 1 to 32. The LVDS/CMOS outputs allow a range of divisions up to a maximum of 1024.The AD9517-4 is available in a 48-lead LFCSP and can be operated from a single 3.3 V supply. An external VCO, which requires an extended voltage range, can be accommodated by connecting the charge pump supply (VCP) to 5 V. A separate LVPECL power supply can be from 2.5 V to 3.3 V (nominal).The AD9517-4 is specified for operation over the industrial range of −40°C to +85°C.APPLICATIONS Low jitter, low phase noise clock distribution 10/40/100 Gb/sec networking line cards, including SONET, Synchronous Ethernet, OTU2/3/4 Forward error correction (G.710) Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs High performance wireless transceivers ATE and high performance instrumentation

The AD9518-31 The AD9518-31 provides a multi-output clock distributionfunction with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 1.75 GHzto 2.25 GHz. Optionally, an external VCO/VCXO of up to 2.4 GHz can be used.The AD9518-3 emphasizes low jitter and phase noise to maximize data converter performance, and it can benefit otherapplications with demanding phase noise and jitter requirements.The AD9518-3 features six LVPECL outputs (in three pairs).The LVPECL outputs operate to 1.6 GHz.For applications that require additional outputs, a crystal reference input, zero-delay, or EEPROM for automatic configuration at startup, the AD9520 and AD9522 are available.In addition, the AD9516 and AD9517 are similar to the AD9518but have a different combination of outputs.Each pair of outputs has dividers that allow both the divideratio and coarse delay (or phase) to be set. The range of division for the LVPECL outputs is 1 to 32.The AD9518-3 is available in a 48-lead LFCSP and can beoperated from a single 3.3 V supply. An external VCO, which requires an extended voltage range, can be accommodated by connecting the charge pump supply (VCP) to 5 V. A separate LVPECL power supply can be from 2.5 V to 3.3 V (nominal).The AD9518-3 is specified for operation over the industrial range of −40°C to +85°C.Applications Low jitter, low phase noise clock distribution 10/40/100 Gb/sec networking line cards, including SONET, Synchronous Ethernet, OTU2/3/4 Forward error correction (G.710) Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs High performance wireless transceivers ATE and high performance instrumentation 1AD9518 is used throughout the data sheet to refer to all the members of the AD9518 family. However, when AD9518-3 is used, it refers to that specific member of the AD9518 family.