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LT1009CDR

Texas Instruments LT1009CDR

TLC272ID

Texas Instruments TLC272ID

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DAC7564ICPWR

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Texas Instruments JM38510/31202BFA

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SN74ABT540NSR

Texas Instruments SN74ABT540NSR

TLC5951DAPR

Texas Instruments TLC5951DAPR

Price $0.70 $4.49 $2.50 $5.54 $2.68
RoHS Compliant Compliant Yes Compliant Yes Yes No Yes Yes Compliant
Lead Status No No Yes No Yes Yes No Yes Yes No
Iout/Iz(Max)(mA) 10
Temp Coeff(Max)(ppm/ degree C) 25
VO Adj(Max)(V) 2.5
Rating Catalog Catalog Catalog Catalog Catalog Catalog Military Catalog Catalog Catalog
Reference Voltage Fixed
Operating Temperature Range(C) -40 to 85,0 to 70 -40 to 85,0 to 70 -40 to 85 -40 to 105 -40 to 125,-40 to 85 -40 to 105 -55 to 125 -40 to 85 -40 to 85
Pin/Package 3TO-92, 8SOIC, 8TSSOP
Min Iz for Regulation(uA) 400
Package Size mm2 mm2 mm2 mm2 mm2 mm2 mm2 mm2 mm2
Approx. Price (US$) 0.38 | 1ku 0.41 | 1ku 0.65 | 1ku 3.79 | 1ku 1.16 | 1ku 1.80 | 1ku 3.34 | 1ku 0.30 | 1ku 1.55 | 1ku
VO(V) 2.5
VO Adj(Min)(V) 2.5
Package Group SOIC,TO-92,TSSOP PDIP,SO,SOIC,TSSOP SO PowerPAD TSSOP PDIP,SOIC,TSSOP SOIC CDIP,CFP,LCCC SSOP PDIP,SO,SOIC,SSOP HTSSOP,VQFN
Initial Accuracy(Max)(%) 0.2
Temp Coeff(Typ)(ppm/ degree C) 15
Rail-to-Rail In to V-
Total Supply Voltage(Max)(+5V=5, +/-5V=10) 16
CMRR(Typ)(dB) 80
CMRR(Min)(dB) 65
Slew Rate(Typ)(V/us) 3.6
Vos (Offset Voltage @ 25C)(Max)(mV) 10
Iq per channel(Max)(mA) 1.6
Additional Features N/A
Iq per channel(Typ)(mA) 0.7
Architecture CMOS
GBW(Typ)(MHz) 0.32
Vn at 1kHz(Typ)(nV/rtHz) 25
Offset Drift(Typ)(uV/C) 1.8
Total Supply Voltage(Min)(+5V=5, +/-5V=10) 3
Output Current(Typ)(mA) 10
Number of Channels(#) 2
Input Bias Current(Max)(pA) 60
Switching Frequency(Min)(kHz) 650
Vout(Max)(V) 7 9.75
Vin(Min)(V) 4.5 2.47
Vin(Max)(V) 18 10
Regulated Outputs(#) 1 1
Iq(Typ)(mA) 0.8 0.34
Vout(Min)(V) 0.76 1.2
Switching Frequency(Max)(kHz) 650
Duty Cycle(Max)(%) 85
Iout(Max)(A) 3 0.5
Special Features Enable,Synchronous Rectification N/A Enable,Power Good Average Current Mode,Enable,OVP Fault Reporting,LED Open Detection,Power Good/Error Flag,Thermal Shutdown
Control Mode D-CAP2
Type Converter Binary
Output Type Buffered Voltage CMOS
Output Range Max.(mA/V) 5.5
Power Consumption(Typ)(mW) 2.9 120
Interface SPI
Priority 1
INL(Max)(+/-LSB) 1
Resolution(Bits) 12
Zero Code Error(Typ)(mV) N/A
Output Range Min.(mA/V) 0
Internal Reference Drift(Max)(ppm/degC) 5
Gain Error(Max)(%FSR) 0.2
DAC Architecture String
DAC Channels
Reference Type
Code to Code Glitch(Typ)(nV-sec) 0.15
Sample / Update Rate(MSPS) 0.2
Offset Error(Max)(%) 0.07
Settling Time(s) 8
Noise(uVrms) 74
Vdo(Typ)(mV) 270
Output Capacitor Type Non-Ceramic
Accuracy(%) 2
Output Options Adjustable Output,Fixed Output
Fixed Output Options(V) 2.5,3,3.3,4.8,5
Operating Supply(Max)(V) 18
Control Method CCM
Startup Current(mA) 0.1
Device Type PFC+PWM
Peak Output Sink Current Gate Drive(A) 3
Practical Operating Frequency(Max)(MHz) 0.5
Operating Supply Current(mA) 4
Peak Output Source Current Gate Drive(A) -2
UVLO Thresholds On/Off(V) 16/10
tpd @ Nom Voltage(Max)(ns) 24 48
Technology Family LS ABT
VCC(Max)(V) 5.25 5.5
F @ Nom Voltage(Max)(Mhz) 35 150
Bits(#) 4 8
Output Drive (IOL/IOH)(Max)(mA) 8/-0.4 -32/64
VCC(Min)(V) 4.75 4.5
Function Arithmetic
ICC @ Nom Voltage(Max)(mA) 34 0.25
THD+N(Typ)(%) 0.001
DACs(#) 2
Control Interface SPI
# Inputs / # Outputs 0 / 2
Schmitt Trigger No
Voltage(Nom)(V) 5
Input Type TTL
Data Transfer Rate(Typ)(MHz) 30
Analog Dimming Steps 256
Ch to Ch Accuracy(Typ)(+/- %) 1.5