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BQ28550DRZR

Texas Instruments BQ28550DRZR

Price $1.19 $5.41 $3.14
RoHS Yes Yes Yes Yes No Yes No Yes Yes Compliant
Lead Status Yes Yes Yes Yes Yes Yes No Yes Yes No
Iout(Max)(A) 0.05
Fixed Output Options(V) 1.5,1.8,2.5,2.8,3
Iq(Typ)(mA) 0.017 10
Package Size mm2 mm2 mm2 mm2 mm2 mm2 mm2 mm2 mm2
Package Group SOT-23 SOIC,TSSOP TSSOP HTSSOP Surface Mount Module,Through-Hole Module VSSOP,WSON CDIP,CFP,LCCC PDIP,SOIC,VSSOP PDIP,SO,SOIC
Rating Catalog Catalog Automotive Catalog Catalog Military Catalog Catalog
Additional Features Enable,Overcurrent Protection,Thermal Shutdown
Accuracy(%) 3
Vout(Max)(V) 3
Vin(Max)(V) 10 5.5 13.2
Vin(Min)(V) 2.7 2.7 10.8
Operating Temperature Range(C) -40 to 125 -40 to 85 -40 to 125,-40 to 85 -40 to 85 -40 to 85 -40 to 125 -55 to 125 -40 to 85,0 to 70 0 to 70
Output Options Fixed Output
Noise(uVrms) 56
Regulated Outputs(#) 1
Vout(Min)(V) 1.5
PSRR @ 100KHz(dB) 35
Approx. Price (US$) 0.45 | 1ku 1.59 | 1ku 0.31 | 1ku 1.40 | 1ku 10.96 | 1ku 4.20 | 1ku 2.24 | 1ku 2.06 | 1ku
Output Capacitor Type Non-Ceramic
Vdo(Typ)(mV) 57
Multiplier N/A
Timers - 32-bit 0
Timers - 16-bit 1
Frequency(MHz) 8
Non-volatile Memory (KB) 4
UART 0
Active Power (uA/MHz) 200
AES N/A
Min VCC 1.8
Features Watchdog
Standby Power (LPM3-uA) 0.8
GPIO Pins(#) 14
Max VCC 3.6
DMA 0
Comparators(#) 0
ADC N/A
SPI 0
Wakeup Time (us) 6
Special I/O N/A
BSL UART
RAM(KB) 0.25
I2C 0
CPU MSP430
3-State Output Yes
Output Drive (IOL/IOH)(Max)(mA) 50/-50 -15/64
F @ Nom Voltage(Max)(Mhz) 70 70
Schmitt Trigger No No No
Output Type CMOS Buffered Voltage TTL Buffered Voltage
ICC @ Nom Voltage(Max)(mA) 0.02 0.071
Input Type CMOS TTL
Voltage(Nom)(V) 2.5,3.3,5 5 5
Technology Family LV-A LS BCT
No. of Outputs 9
VCC(Max)(V) 5.5 5.5 5.5
VCC(Min)(V) 2 4.5 4.5
tpd @ Nom Voltage(Max)(ns) 24.1,20.2,14.1 4.6
Switch Current Limit Bus Power(Min)(A) 0.8
Ports(Max) 1
LDO Output Range(V) 0.9 to 3.3
Application USB peripheral,DSP
Switch Enable L
LDO Output Current(mA) 250
Number of FETs 1
DDR Memory Type DDR,DDR2,DDR3
Regulator Type Step-Down Module
Vin Bias(Min)(V) 10.8
Vin Bias(Max)(V) 13.2
Special Features Shutdown Pin for S3 Reset to Mid-Scale N/A
Control Mode Voltage Mode
Vout VTT(Min)(V) 0.55
Output VTT
Iout VTT(Max)(A) 10
Zero Code Error(Typ)(mV) 4 15
Interface SPI SPI
Resolution(Bits) 16 10
Sample / Update Rate(MSPS) 0.1 0.075
Output Range Min.(mA/V) 0 0
INL(Max)(+/-LSB) 12 1
DAC Architecture String String
Reference Type Type
Power Consumption(Typ)(mW) 0.5 0.75
Gain Error(Max)(%FSR) 0.15 0.3
Settling Time(s) 7 12.5
DAC Channels 2
Offset Error(Max)(%) 0.07 N/A
Output Range Max.(mA/V) 5 5.1
Code to Code Glitch(Typ)(nV-sec) 0.1 5
Bits(#) 6 8
Priority 1
Internal Reference Drift(Max)(ppm/degC) N/A
DAC Channels