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Texas Instruments
TLV2373ID
|
Texas Instruments
INA208AIDR
|
Texas Instruments
CD74HCT04M
|
Texas Instruments
TPS2066CD
|
Texas Instruments
TPS54329DDAR
|
Texas Instruments
DAC7564ICPWR
|
Texas Instruments
TPS7350QD
|
Texas Instruments
UCC28516DW
|
Texas Instruments
JM38510/31202BFA
|
Texas Instruments
DSD1702E
|
Price |
|
$1.69 |
|
$0.59 |
|
|
$4.49 |
$2.50 |
|
|
$5.54 |
RoHS |
|
Yes |
Yes |
Yes |
Compliant |
Yes |
Compliant |
Yes |
Yes |
No |
Yes |
Lead Status |
|
Yes |
Yes |
Yes |
No |
Yes |
No |
Yes |
Yes |
No |
Yes |
GBW(Typ)(MHz) |
|
3 |
|
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|
Approx. Price (US$) |
|
0.80 | 1ku |
1.00 | 1ku |
0.14 | 1ku |
0.68 | 1ku |
0.65 | 1ku |
3.79 | 1ku |
1.16 | 1ku |
1.80 | 1ku |
|
3.34 | 1ku |
Additional Features |
|
Shutdown |
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Iq per channel(Typ)(mA) |
|
0.55 |
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Offset Drift(Typ)(uV/C) |
|
2 |
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Rating |
|
Catalog |
Catalog |
Catalog |
Catalog |
Catalog |
Catalog |
Catalog |
Catalog |
Military |
Catalog |
Slew Rate(Typ)(V/us) |
|
2.4 |
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Operating Temperature Range(C) |
|
-40 to 125 |
-40 to 125 |
-55 to 125 |
-40 to 85 |
-40 to 85 |
-40 to 105 |
-40 to 125,-40 to 85 |
-40 to 105 |
-55 to 125 |
|
Vn at 1kHz(Typ)(nV/rtHz) |
|
39 |
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Total Supply Voltage(Max)(+5V=5, +/-5V=10) |
|
16 |
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CMRR(Typ)(dB) |
|
72 |
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Package Size |
|
mm2 |
|
mm2 |
mm2 |
|
mm2 |
mm2 |
mm2 |
mm2 |
mm2 |
Vos (Offset Voltage @ 25C)(Max)(mV) |
|
4.5 |
|
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Input Bias Current(Max)(pA) |
|
60 |
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Architecture |
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CMOS |
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Rail-to-Rail |
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In,Out |
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Number of Channels(#) |
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2 |
2 |
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Package Group |
|
PDIP,SOIC,VSSOP |
SOIC,TSSOP,VSSOP |
PDIP,SOIC,TSSOP |
MSOP-PowerPAD,SOIC |
SO PowerPAD |
TSSOP |
PDIP,SOIC,TSSOP |
SOIC |
CDIP,CFP,LCCC |
SSOP |
Total Supply Voltage(Min)(+5V=5, +/-5V=10) |
|
2.7 |
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Iq per channel(Max)(mA) |
|
0.66 |
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Output Current(Typ)(mA) |
|
7 |
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CMRR(Min)(dB) |
|
55 |
100 |
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Special Features |
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Alert Function,Analog Output,Low-side Capable |
|
|
Enable,Synchronous Rectification |
N/A |
Enable,Power Good |
Average Current Mode,Enable,OVP |
|
|
Iq(Max)(mA) |
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2.8 |
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Response Time(Typ)(?s) |
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1.3 |
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Gain(V/V) |
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|
100 |
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Vs(Max)(V) |
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18 |
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Small-Signal Bandwidth(Typ)(MHz) |
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0.2 |
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Input Offset (+/-)(Max)(uV) |
|
|
2500 |
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Input Offset Drift (+/-)(Typ)(uV/Degrees Celsius) |
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|
5 |
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Estimated Package Size (WxL)(mm2) |
|
|
[pf]10VSSOP[/pf] |
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Common Mode Range(Min) |
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-16 |
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Vs(Min)(V) |
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2.7 |
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Gain Error(%) |
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0.2 |
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Hysteresis Input(Typ)(mV) |
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8 |
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Common Mode Range(Max) |
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80 |
|
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tpd @ Nom Voltage(Max)(ns) |
|
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|
24 |
|
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24 |
|
Output Drive (IOL/IOH)(Max)(mA) |
|
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|
-5.2/5.2 |
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8/-0.4 |
|
Schmitt Trigger |
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No |
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Output Type |
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CMOS |
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Buffered Voltage |
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ICC @ Nom Voltage(Max)(mA) |
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0.02 |
|
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|
34 |
|
Voltage(Nom)(V) |
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5 |
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F @ Nom Voltage(Max)(Mhz) |
|
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25 |
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35 |
|
Input Type |
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TTL |
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VCC(Max)(V) |
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5.5 |
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5.25 |
|
Bits(#) |
|
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|
6 |
|
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4 |
|
Technology Family |
|
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|
HCT |
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LS |
|
VCC(Min)(V) |
|
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|
4.5 |
|
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|
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|
4.75 |
|
Continuous Current(Max)(A) |
|
|
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|
1.0 |
|
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Vin(Min)(V) |
|
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|
4.5 |
4.5 |
|
2.47 |
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Current Limit Topology |
|
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Constant-Current |
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Number of Switches |
|
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2 |
|
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Vin(Max)(V) |
|
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|
5.5 |
18 |
|
10 |
|
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|
Enable |
|
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Active High |
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USB Switch rDS(on)(mOhms) |
|
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|
70 |
|
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Switching Frequency(Min)(kHz) |
|
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|
650 |
|
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Vout(Max)(V) |
|
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|
7 |
|
9.75 |
|
|
|
Regulated Outputs(#) |
|
|
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|
1 |
|
1 |
|
|
|
Iq(Typ)(mA) |
|
|
|
|
|
0.8 |
|
0.34 |
|
|
|
Vout(Min)(V) |
|
|
|
|
|
0.76 |
|
1.2 |
|
|
|
Switching Frequency(Max)(kHz) |
|
|
|
|
|
650 |
|
|
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|
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Duty Cycle(Max)(%) |
|
|
|
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|
85 |
|
|
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Iout(Max)(A) |
|
|
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|
3 |
|
0.5 |
|
|
|
Control Mode |
|
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D-CAP2 |
|
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Type |
|
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Converter |
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Binary |
|
Output Range Max.(mA/V) |
|
|
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|
5.5 |
|
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|
Power Consumption(Typ)(mW) |
|
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|
2.9 |
|
|
|
120 |
Interface |
|
|
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|
SPI |
|
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Priority |
|
|
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|
1 |
|
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|
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INL(Max)(+/-LSB) |
|
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|
1 |
|
|
|
|
Resolution(Bits) |
|
|
|
|
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|
12 |
|
|
|
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Zero Code Error(Typ)(mV) |
|
|
|
|
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|
N/A |
|
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Output Range Min.(mA/V) |
|
|
|
|
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|
0 |
|
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Internal Reference Drift(Max)(ppm/degC) |
|
|
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|
5 |
|
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Gain Error(Max)(%FSR) |
|
|
|
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|
0.2 |
|
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DAC Architecture |
|
|
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|
String |
|
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|
DAC |
|
|
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Channels |
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Reference |
|
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Type |
|
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Code to Code Glitch(Typ)(nV-sec) |
|
|
|
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|
0.15 |
|
|
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|
Sample / Update Rate(MSPS) |
|
|
|
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|
0.2 |
|
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|
Offset Error(Max)(%) |
|
|
|
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|
0.07 |
|
|
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Settling Time(s) |
|
|
|
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|
8 |
|
|
|
|
Noise(uVrms) |
|
|
|
|
|
|
|
74 |
|
|
|
Vdo(Typ)(mV) |
|
|
|
|
|
|
|
270 |
|
|
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Output Capacitor Type |
|
|
|
|
|
|
|
Non-Ceramic |
|
|
|
Accuracy(%) |
|
|
|
|
|
|
|
2 |
|
|
|
Output Options |
|
|
|
|
|
|
|
Adjustable Output,Fixed Output |
|
|
|
Fixed Output Options(V) |
|
|
|
|
|
|
|
2.5,3,3.3,4.8,5 |
|
|
|
Operating Supply(Max)(V) |
|
|
|
|
|
|
|
|
18 |
|
|
Control Method |
|
|
|
|
|
|
|
|
CCM |
|
|
Startup Current(mA) |
|
|
|
|
|
|
|
|
0.1 |
|
|
Device Type |
|
|
|
|
|
|
|
|
PFC+PWM |
|
|
Peak Output Sink Current Gate Drive(A) |
|
|
|
|
|
|
|
|
3 |
|
|
Practical Operating Frequency(Max)(MHz) |
|
|
|
|
|
|
|
|
0.5 |
|
|
Operating Supply Current(mA) |
|
|
|
|
|
|
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|
4 |
|
|
Peak Output Source Current Gate Drive(A) |
|
|
|
|
|
|
|
|
-2 |
|
|
UVLO Thresholds On/Off(V) |
|
|
|
|
|
|
|
|
16/10 |
|
|
Function |
|
|
|
|
|
|
|
|
|
Arithmetic |
|
THD+N(Typ)(%) |
|
|
|
|
|
|
|
|
|
|
0.001 |
DACs(#) |
|
|
|
|
|
|
|
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|
|
2 |
Control Interface |
|
|
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|
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|
SPI |
# Inputs / # Outputs |
|
|
|
|
|
|
|
|
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|
0 / 2 |