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Texas Instruments
TMAG5170A2EDGKRQ1
|
Texas Instruments
TPS7A03175PYCHR
|
Texas Instruments
TRSF3243EIRHBR
|
Texas Instruments
TPS81256SIPT
|
Texas Instruments
UCC2580-4
|
Texas Instruments
TLV9162IDGKR
|
Texas Instruments
TLV9362IPWR
|
Texas Instruments
TPSM82822ASILR
|
Texas Instruments
74AVCH4T245RSVR-NT
|
Texas Instruments
LMK1D1212RHAT
|
| Price |
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$2.98 |
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| RoHS |
|
Y |
Y |
Y |
Yes |
|
Y |
Y |
Y |
Y |
Y |
| Lead Status |
|
Y |
Y |
Y |
Yes |
|
Y |
Y |
Y |
Y |
Y |
| Interface type |
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SPI |
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| Magnetic sensing range(mT) |
|
150,300,75 |
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| Operating temperature range(C) |
|
-40 |
-40 |
-40 |
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-40 |
-40 |
-40 |
|
-40 |
| Package area(mm^2) |
|
14.7 |
0.405769 |
25 |
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|
14.7 |
19.2 |
See data sheet |
|
36 |
| Package size (L x W)(mm) |
|
3 x 4.9 |
0.637 x 0.637 |
5 x 5 |
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|
3 x 4.9 |
3 x 6.4 |
See data sheet |
|
6 x 6 |
| Package type |
|
VSSOP |
DSBGA |
VQFN |
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VSSOP |
TSSOP |
USIP |
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VQFN |
| Pin count |
|
8 |
4 |
32 |
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|
8.0 |
8.0 |
10.0 |
|
40.0 |
| Pitch(mm) |
|
0.65 |
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| Rating |
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Catalog |
Catalog |
Catalog |
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Catalog |
Catalog |
Catalog |
Catalog |
Catalog |
| Sample rate(ksps) |
|
20 |
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| Sensitivity error(%) |
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2.5 |
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| Supply voltage(max)(V) |
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5.5 |
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| Supply voltage(min)(V) |
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2.3 |
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| TI functional safety category |
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Functional Safety-Compliant |
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| Type |
|
3-Axis linear |
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Converter,Module |
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| TI.com inventory |
|
6981 |
179500 |
66184 |
|
|
282142 |
0 |
20580 |
|
1049 |
| Approx. price(US$) |
|
.91 | 1ku |
.113 | 1ku |
1.07 | 1ku |
|
|
.414 | 1ku |
.36 | 1ku |
1.05 | 1ku |
0.35 | 1ku |
5.777 | 1ku |
| Accuracy(%) |
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1.5 |
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| Dropout voltage (Vdo)(typ)(mV) |
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|
205 |
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| Features |
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Enable,Output discharge |
Auto-Powerdown |
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EMI Hardened,MUX Friendly,Small Size |
Cost Optimized,EMI Hardened |
EMI Tested,Enable,Output discharge,Overcurrent protection,Power good |
Partial power down (Ioff),Over-voltage tolerant inputs,Bus-Hold |
2 |
| Fixed output options(V) |
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1.75 |
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| Iout(max)(A) |
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0.2 |
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2 |
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| Iq(typ)(mA) |
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|
0.0002 |
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0.004 |
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| Load capacitance(min)(F) |
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1 |
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| Maximum package height(mm) |
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0.4 |
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| Noise(Vrms) |
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130 |
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| Output options |
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Fixed Output |
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| PSRR at 100 KHz(dB) |
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35 |
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| Regulated outputs(#) |
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1 |
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1 |
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| Thermal resistance JA(C/W) |
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201.1 |
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| Vin(max)(V) |
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6 |
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5.5 |
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| Vin(min)(V) |
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1.5 |
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2.4 |
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| Vout(max)(V) |
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5 |
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4 |
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| Vout(min)(V) |
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0.8 |
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0.6 |
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| Data rate(max)(MBits) |
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1 |
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| Data rate(max)(Mbps) |
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1 |
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| Drivers per package |
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3 |
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| ESD HBM(kV) |
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15 |
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| Logic voltage(min)(V) |
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3.3 |
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| Main supply voltage(nom)(V) |
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3.3, 5 |
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| Receivers per package |
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5 |
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| Vout(typ)(V) |
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5.4 |
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| Package Size |
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mm2 |
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| Operating Temperature Range(C) |
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-40 to 85 |
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| Approx. Price (US$) |
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|
0.97 | 1ku |
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| Switching Frequency(Typ)(kHz) |
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4000 |
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| Special Features |
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Enable,Input/Output Isolation,Synchronous Rectification |
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| Regulated Outputs(#) |
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1 |
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| Vin(Max)(V) |
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5.5 |
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| Iout(Max)(A) |
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0.7 |
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| Package Type |
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MicroSiP (BGA) |
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| Shutdown Current(Typ)(uA) |
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0.85 |
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| Vin(Min)(V) |
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2.5 |
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| Vout(Max)(V) |
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5 |
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| Vout(Min)(V) |
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5 |
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| Architecture |
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CMOS |
CMOS |
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| CMRR(typ)(dB) |
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110 |
110 |
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| GBW(typ)(MHz) |
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11 |
10.6 |
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| Input common mode headroom (to negative supply)(typ)(V) |
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0 |
0 |
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| Input common mode headroom (to positive supply)(typ)(V) |
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0 |
-2 |
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| Iout(typ)(A) |
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0.073 |
0.06 |
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| Iq per channel(typ)(mA) |
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2.4 |
2.6 |
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| Number of channels |
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2 |
2 |
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| Offset drift(typ)(V/C) |
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0.25 |
1.25 |
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| Output swing headroom (to negative supply)(typ)(V) |
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0.025 |
0.06 |
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| Output swing headroom (to positive supply)(typ)(V) |
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-0.025 |
-0.06 |
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| Rail-to-rail |
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In,Out |
In to V-,Out |
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| Slew rate(typ)(V/s) |
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33 |
25 |
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| TI package name |
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DGK |
PW |
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| Total supply voltage (+5 V = 5, 5 V = 10)(max)(V) |
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16 |
40 |
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| Total supply voltage (+5 V = 5, 5 V = 10)(min)(V) |
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2.7 |
4.5 |
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| Vn at 1 kHz(typ)(nVHz) |
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6.8 |
8.5 |
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| Vos (offset voltage at 25C)(max)(mV) |
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1 |
1.7 |
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| Control mode |
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Constant on-time (COT),DCS-Control |
|
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| Duty cycle(max)(%) |
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|
100 |
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| Soft start |
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Fixed |
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| Switching frequency(max)(kHz) |
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4000 |
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| Switching frequency(min)(kHz) |
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|
4000 |
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| Topology |
|
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|
Buck,Synchronous Buck |
|
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| Package size |
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mm2 |
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| Output type |
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Balanced CMOS,Push-Pull,3-State |
LVDS |
| IOL(Max)(mA) |
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12 |
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| IOH(Max)(mA) |
|
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|
-12 |
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| Input type |
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Standard CMOS |
HCSL,LP-HCSL,LVCMOS,LVDS,LVPECL |
| Output voltage(Max)(V) |
|
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3.6 |
|
| Technology Family |
|
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AVC |
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| Package Group |
|
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SOIC|16,TSSOP|16,TVSOP|16,UQFN|16,VQFN|16 |
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| Bits(#) |
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4 |
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| Data rate(Max)(Mbps) |
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|
380 |
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| Output voltage(Min)(V) |
|
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1.2 |
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| High input voltage(Min)(Vih) |
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1.2 |
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| High input voltage(Max)(Vih) |
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3.6 |
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| Application |
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UART,JTAG,SPI |
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| ICC(Max)(uA) |
|
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16 |
|
| Additive RMS jitter(typ)(fs) |
|
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|
45 |
| Core supply voltage(V) |
|
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1.8,2.5,3.3 |
| Function |
|
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Clock buffer,Differential |
| Number of outputs |
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12 |
| Output frequency(max)(MHz) |
|
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|
2000 |
| Output skew(ps) |
|
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20 |
| Output supply voltage(V) |
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1.8,2.5,3.3 |