12-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter Features: SNR = 64.8 dBFS @ fIN up to 70 MHz @ 250 MSPS ENOB of 10.5 @ fIN up to 70 MHz @ 250 MSPS (−1.0 dBFS) SFDR = 80 dBc @ fIN up to 70 MHz @ 250 MSPS (−1.0 dBFS) Excellent Linearity DNL = ±0.3 LSB typical INL = ±0.7 LSB typical CMOS outputs Single data port at up to 250 MHz Interleaved dual port @ 1/2 sample rate up to 125 MHz 700 MHz full power analog bandwidth On-chip reference, no external decoupling required Integrated input buffer and track-and-hold Low power dissipation 272 mW @ 170 MSPS 364 mW @ 250 MSPS Programmable input voltage range 1.0 V to 1.5 V, 1.25 V nominal 1.8 V analog and digital supply operation Selectable output data format (offset binary, twos complement, Gray code)

14-Bit, 1300 MSPS/625 MSPS, JESD204B, Dual Analog-to-Digital Converter Features: JESD204B (Subclass 1) coded serial digital outputs Lane rates up to 16 Gbps 1.6 W total power at 1300 MSPS 800 mW per ADC channel SNR = 65.6 dBFS at 172 MHz (1.59 VP-P input range) SFDR = 78 dBFS at 172.3 MHz (1.59 VP-P input range) Noise density −153.9 dBFS/Hz (1.59 VP-P input range) −155.6 dBFS/Hz (2.04 VP-P input range) 0.95 V, 1.8 V, and 2.5 V supply operation No missing codes Internal ADC voltage reference Flexible input range 1.36 VP-P to 2.04 VP-P (1.59 VP-P typical) 2 GHz usable analog input full power bandwidth >95 dB channel isolation/crosstalk Amplitude detect bits for efficient AGC implementation 2 integrated digital downconverters per ADC channel 48-bit NCO Programmable decimation rates Differential clock input SPI control Integer clock divide by 2 and divide by 4 Flexible JESD204B lane configurations On-chip dithering to improve small signal linearity

14-Bit, 3 GSPS, JESD204B, Single Analog-to-Digital Converter Features: JESD204B (Subclass 1) coded serial digital outputs Support for lane rates up to 16 Gbps per lane 2 W total power at 3 GSPS (default settings) Performance at −2 dBFS amplitude, 2.6 GHz input SFDR = 70 dBFS SNR = 57.2 dBFS Performance at −9 dBFS amplitude, 2.6 GHz input SFDR = 78 dBFS SNR = 59.5 dBFS Integrated input buffer Noise density = −152 dBFS/Hz 0.975 V, 1.9 V, and 2.5 V dc supply operation 9 GHz analog input full power bandwidth (−3 dB) Amplitude detect bits for efficient AGC implementation 4 integrated digital downconverters 48-bit NCO 4 cascaded half-band filters Phase coherent NCO switching Up to 4 channels available Serial port control Integer clock with divide by 2 and divide by 4 options Flexible JESD204B lane configurations On-chip dither AEQ-Q100 qualified for automotive applications

12-Bit, 1200 MSPS DACs Features: Pin-compatible family Excellent dynamic performance LVDS data interface with on-chip 100 Ω terminations Built-in self test LVDS sampling integrity LVDS-to-DAC data transfer integrity Low power: 380 mW (IFS = 20 mA; fOUT = 330 MHz) 1.8/3.3 V dual-supply operation Adjustable analog output 8.66 mA to 31.66 mA (RL = 25 Ω to 50 Ω) On-chip 1.2 V reference 160-lead chip scale ball grid array (CSP_BGA) package

12-Bit, 210 MSPS TxDAC D/A Converter Features: High performance member of pin-compatible TxDAC product family Excellent spurious-free dynamic range performance SNR at 5 MHz output, 125 MSPS: 70 dB Twos complement or straight binary data format Differential current outputs: 2 mA to 20 mA Power dissipation: 135 mW at 3.3 V Power-down mode: 15 mW at 3.3 V On-chip 1.2 V Reference CMOS compatible digital interface 28-lead SOIC, 28-lead TSSOP, and 32-lead LFCSP Edge-triggered latches

Differential/Single-Ended Input, Dual 1 MSPS, 12-Bit, 3-Channel SAR A/D Converter Features: Dual 12-bit, 3-channel ADC Throughput rate: 1 MSPS Specified for VDD of 2.7 V to 5.25 V Power consumption 7 mW at 1 MSPS with 3 V supplies 17 mW at 1 MSPS with 5 V supplies Pin-configurable analog inputs 12-channel single-ended inputs 6-channel fully differential inputs 6-channel pseudo differential inputs 70 dB SINAD at 50 kHz input frequency Accurate on-chip reference: 2.5 V ±0.2% maximum at 25°C, 20 ppm/°C maximum Dual conversion with read 875 ns, 16 MHz SCLK High speed serial interface SPI®-/QSPI™-/MICROWIRE™-/DSP-compatible −40°C to +125°C operation Shutdown mode: 1 µA maximum 32-lead LFCSP and 32-lead TQFP

12-Bit Power Amplifier Current Controller with ADC, DACs, Temperature and Current Sensors Features: 4 closed-loop power amplifier (PA) drain current controllers Built-in PA protection, sequencing, and alert features Compatible with both depletion mode and enhancement mode power amplifiers Highly integrated 4 uncommitted 12-bit analog-to-digital converter (ADC) inputs ±0.5 LSB typical integral nonlinearity (INL) Eight 12-bit voltage digital-to-analog converters (DACs) 1.3 μs maximum settling 4 high-side current sense amplifiers, ±0.1% gain error 2 external temperature sensor inputs, ±1.1°C accuracy Internal temperature sensor, ±1.25°C accuracy 2.5 V on-chip reference Flexible monitoring and control ranges ADC input ranges: 0 V to 1.25 V, 0 V to 2.5 V, and 0 V to 5 V Bipolar DAC ranges: 0 V to +5 V, −4 V to +1 V, and −5 V to 0 V Bipolar DAC reset and clamping relative to VCLAMPx voltage Unipolar DAC ranges: 0 V to 5 V, 2.5 V to 7.5 V, and 5 V to 10 V Current sense gain: 6.25, 12.5, 25, 50, 100, and more Adjustable closed-loop setpoint ramp time High-side voltage current sensing 4 current sense inputs 4 V to AVSS + 60 V, ±200 mV input range Small package and flexible interface Serial port interface (SPI) with VDRIVE supporting 1.8 V, 3 V, and 5 V interfaces 56-lead LFCSP Temperature range: −40°C to +125°C

16-Bit, Isolated Sigma-Delta Modulator, LVDS Interface Features: 5 MHz to 20 MHz external clock input rate 16 bits, no missing codes Signal-to-noise ratio (SNR): 88 dB typical Effective number of bits (ENOB): 14.2 bits typical Typical offset drift vs. temperature: 1.6 μV/°C typical LVDS interface On-board digital isolator On-board reference Full-scale analog input range: ±320 mV −40°C to + 125°C operating range High common-mode transient immunity: >25 kV/μs 16-lead, wide-body SOIC, with increased creepage package See data sheet for additional features

4-Channel DAS with 16-Bit, Bipolar Input, Simultaneous Sampling ADC Features: 4 simultaneously sampled inputs True bipolar analog input ranges: ±10 V (maximum), ±5 V (maximum) Single 5 V analog supply and 2.5 V to 5 V VDRIVE (nominal) Fully integrated data acquisition solution Analog input clamp protection Input buffer with 1 MΩ analog input impedance Second-order antialiasing analog filter On-chip accurate reference and reference buffer 16-bit ADC with 300 kSPS on all channels Flexible parallel/serial interface Serial peripheral interface (SPI)/QSPI™/MICROWIRE™/DSP compatible Performance 7 kV ESD rating on analog input channels Standby mode: 25 mW (typical) 64-lead LQFP package

8-Channel DAS with 16-Bit, Bipolar Input, Simultaneous Sampling ADC Features: 8/6/4 simultaneously sampled inputs True bipolar analog input ranges: ±10 V, ±5 V Pin to pin compatible with the state-of-the-art AD7606B Single 5 V analog supply and 2.3 V to 5 V VDRIVE Fully integrated data acquisition solution Analog input clamp protection Input buffer with 1 MΩ analog input impedance Second-order antialiasing analog filter On-chip accurate reference and reference buffer 16-bit ADC with 200 kSPS on all channels Oversampling capability with digital filter Flexible parallel/serial interface SPI/QSPI™/MICROWIRE™/DSP compatible Performance 7 kV ESD rating on analog input channels 95.5 dB SNR, −107 dB THD ±0.5 LSB INL, ±0.5 LSB DNL Low power: 100 mW Standby mode: 25 mW Temperature range: −40°C to +85°C 64-lead LQFP packageAD7606-EP supports defense and aerospace applications (AQEC standard) Download AD7606-EP data sheet (pdf) Military temperature range −55°C to +125°C Controlled manufacturing baseline One assembly/test site One fabrication site Product change notification Qualification data available on request V62/18611