The ADM1064 Super Sequencer® is a configurable supervisory/ sequencing device that offers a single-chip solution for supply monitoring and sequencing in multiple supply systems. In addition to these functions, the ADM1064 integrates a 12-bit ADC that can be used to accurately read back up to 12 separate voltages. The device also provides up to 10 programmable inputs for moni-toring undervoltage faults, overvoltage faults, or out-of-window faults on up to 10 supplies. In addition, 10 programmable outputs can be used as logic enables. Six of these programmable outputs can provide up to a 12 V output for driving the gate of an N-FET that can be placed in the path of a supply. ApplicationsCentral office systemsServers/routersMultivoltage system line cardsDSP/FPGA supply sequencingIn-circuit testing of margined supplies

The ADM1186-1 and ADM1186-2 are integrated, four-channel, voltage monitoring and sequencing devices. A 2.7 V to 5.5 V power supply is required on the VCC pin for power.Four precision comparators monitor four voltage rails, with all comparators sharing a 0.6 V reference and a worst-case accuracy of 0.8%. Resistor networks that are external to the VIN1, VIN2, VIN3, and VIN4 pins set the Under Voltage (UV) trip points for the monitored supply rails.The ADM1186-1 and ADM1186-2 have four open drain enable outputs, OUTx, that are used to enable power supplies. An open drain power good output, PWRGD, is provided that indicatesthe four VINx inputs are above their UV thresholds.A state machine monitors the state of the UP and DOWN pins on the ADM1186-1 or the UP/overbar: DOWN pin on the ADM1186-2 to control the supply sequencing direction. In the ‘Wait Start’state, a rising edge transition on the UP or UP/DOWN pin triggers a power-up sequence. A falling edge transition on the DOWN or UP/DOWN pin in the ‘Power Up Done’ statetriggers a power down sequence.During a power up sequence, the state machine enables each power supply in turn. The supply output voltage is monitored to determine if it rises above the UV threshold level within a userdefined duration called the blanking time. If a supply rises above the UV threshold then the next enable output in the sequence is turned on. In addition to the blanking time a user may also define sequencing time delays between each enable output turning on. When all four enable outputs are on, and the four VINx pins are above their UV trip points the power up sequence is complete. The ADM1186-1 provides an open drain pin, SEQ_DONE, that is asserted high to provide an indication that an up sequence is complete. The SEQ_DONE pins is allows multiple cascadedADM1186-1 devices to be perform controlled power up and down sequences. During a power down sequence the enable outputs turn off inreverse order. The sequence time delays between successive supplies the same as during the power up sequence, and no blanking time is used during a power down sequence. At the end of a down sequence the SEQ_DONE pin is brought low. During sequencing and when powered up, the state machine continuously monitors for any fault conditions. Faults include a UV condition on any of the inputs, or an unexpected controlinput. Any fault that occurs causes the state machine to enter a fault handler. This immediately turns off all enable outputs, and ensures that the device is ready to start a new up sequence. The ADM1186-1 has a bi-directional open drain pin, FAULT, that facilitates fault handling when using multiple devices. An ADM1186-1 experiencing a fault condition drives the FAULT pin low, causing other connected ADM1186-1devices to enter their own fault handling state.The ADM1186-1 is available in a 20-lead QSOP package andthe ADM1186-2 is available in a 16-lead QSOP package.

The ADAU1361 is a low power, stereo audio codec that supports stereo 48 kHz record and playback at 14 mW from a 1.8 V analog supply. The stereo audio ADCs and DACs support sample rates from 8 kHz to 96 kHz as well as a digital volume control. The ADAU1361 is ideal for battery-powered audio and telephony applications.The record path includes an integrated microphone bias circuit and six inputs. The inputs can be mixed and muxed before the ADC, or they can be configured to bypass the ADC. The ADAU1361 includes a stereo digital microphone input.The ADAU1361 includes five high power output drivers (two differential and three single-ended), supporting stereo headphones, an earpiece, or other output transducer. AC-coupled or capless configurations are supported. Individual fine level controls are supported on all analog outputs. The output mixer stage allows for flexible routing of audio.The serial control bus supports the I2C and SPI protocols. The serial audio bus is programmable for I2S, left-/right-justified, and TDM modes. A programmable PLL supports flexible clock generation for all standard integer rates and fractional master clocks from 8 MHz to 27 MHz.Applications Smartphones/Multimedia phones Digital Still Cameras/Digital Video Cameras Portable Media Players/Portable Audio Players Phone accessories products

The ADAV4601 is an enhanced audio processor targeting advanced TV applications with full support for digital and analog baseband audio.The audio processor, by default, loads a dedicated TV audio flow that incorporates full matrix switching (any input to any output), automatic volume control that compensates for volume changes during advertisements or when switching channels, dynamic bass, a multiband equalizer, and up to 200 ms of stereo delay memory for audio-video synchronization.Alternatively, Analog Devices offers an award-winning graphical programming tool (SigmaStudio™) that allows custom flows to be quickly developed and evaluated. This allows the creation of customer-specific audio flows, including the use of ADI library of third-party algorithms.The analog I/O integrates Analog Devices proprietary continuous-time, multibit Σ-Δ architecture to bring a higher level of performance to ATV systems, required by third-party algorithm providers to meet system branding certification. The analog input is provided by 95 dB dynamic range (DNR) ADCs, and analog output is provided by 94 dB DNR DACs.The main speaker outputs can be supplied as a digitally modulated PWM stream to support digital amplifiers.The ADAV4601 includes multichannel digital inputs and outputs. In addition, digital input channels can be routed through integrated sample rate converters (SRC), which are capable of supporting any arbitrary sample rate from 5 kHz to 50 kHz.ApplicationsGeneral-purpose consumer audio post processingHome audioDVD recordersHome theater in a box systems and DVD receiversAudio processing subsystems for DTV-ready TVsAnalog broadcast capability for iDTVs

The ADG858 is a low voltage CMOS device containing foursingle-pole, double-throw (SPDT) switches. This device offersultralow on resistance of less than 0.82 Ω over the full temperaturerange. The ADG858 is fully specified for 4.2 V to 5.5 V and 2.7 Vto 3.6 V supply operation.Each switch conducts equally well in both directions when onand has an input signal range that extends to the supplies. TheADG858 exhibits break-before-make switching action.The ADG858 is available in a 2.1 mm × 2.1 mm, 16-lead miniLFCSP. This tiny package makes the device ideal for spaceconstrainedapplications, such as handsets, PDAs, and MP3s.Product Highlights <0.82 Ω over the full temperature range of −40°C to +85°C. Single 1.8 V to 5.5 V operation. Compatible with 1.8 V CMOS logic. High current handling capability (250 mA continuous current per channel). Low THD + N: 0.06% typical. 2.1 mm × 2.1 mm, 16-lead mini LFCSP.Applications Cellular phones PDAs MP3 players Power routing Battery-powered systems PCMCIA cards Modems Audio and video signal routing Communication systems

The ADL5386 is a quadrature modulator with unmatched integration levels for low intermediate frequency (IF) and radio frequency (RF) transmitters within broadband wireless access systems, microwave radio links, cable modem termination systems, and cellular infrastructure equipment. The ADL5386 operates over a frequency range of 50 MHz to 2200 MHz. Its excellent phase accuracy and amplitude balance supports high data rate, complex modulation for next-generation communication infrastructure equipment.In addition, the ADL5386 incorporates a standalone logarithmic power detector, as well as a voltage variable attenuator (VVA). The attenuator has its own separate input and output pins for easy cascading with filters and buffer amplifiers. The wide dynamic range of the power detector and VVA provides flexibility in the choice of the signal monitoring point in the transmitter system.The wide baseband input bandwidth of 700 MHz allows for either baseband drive or a drive from a complex IF signal. Typical applications are in IF or direct-to-RF radio-link transmitters, cable modem termination systems, broadband wireless access systems, and cellular infrastructure equipment.The ADL5386 takes signals from two differential baseband inputs and modulates them onto two carriers in quadrature with each other. The two internal carriers are derived from a single-ended, external local oscillator (LO) input signal at twice the frequency as the desired output. The output amplifier is designed to drive a 50 Ω load.The ADL5386 consists of two die, one fabricated using the Analog Devices, Inc., advanced SiGe bipolar process, and the other using an external GaAs process. The ADL5386 is packaged in a 40-lead, Pb-free LFCSP_VQ with an exposed paddle. Performance is specified over the −40°C to +85°C range. A Pb-free evaluation board is also available.APPLICATIONS Radio-link infrastructures Cable modem termination systems Wireless/cellular infrastructure systems Wireless local loops WiMAX/broadband wireless access systems

The ADL5523 is a high performance GaAs pHEMT low noise amplifier. It provides high gain and low noise figure for single-downconversion IF sampling receiver architectures as well as direct-downconversion receivers.The ADL5523 provides a high level of integration by incorporating the active bias and the dc blocking capacitors, making it very easy to use while not sacrificing design flexibility.The ADL5523 is easy to tune, requiring only a few external components. The device can support operation from 3 V to 5 V, and the current draw can be adjusted with the external bias resistor for applications requiring very low power consumption.The ADL5523 comes in a compact, thermally enhanced, 3 mm × 3 mm LFCSP and operates over the temperature range of −40°C to +85°C.A fully populated evaluation board is also available.

The ADL5562 is a high performance differential amplifier optimized for RF and IF applications. The amplifier offers low noise of 2.1 nV/√Hz and excellent distortion performance over a wide frequency range, making it an ideal driver for high speed 8-bit to 16-bit ADCs.The ADL5562 provides three gain levels of 6 dB, 12 dB, and 15.5 dB through a pin-strappable configuration. For the single-ended input configuration, the gains are reduced to 5.6 dB, 11.1 dB, and 14.1 dB. Using an external series input resistor expands the amplifier gain flexibility and allows for any gain selection from 0 dB to 15.5 dB.The quiescent current of the ADL5562 is typically 80 mA and, when disabled, consumes less than 3 mA, offering excellent input-to-output isolation.The device is optimized for wideband, low distortion performance. These attributes, together with its adjustable gain capability, make this device the amplifier of choice for general-purpose IF and broadband applications where low distortion, noise, and power are critical. This device is optimized for the best combination of slew speed, bandwidth, and broadband distortion. These attributes allow it to drive a wide variety of ADCs and make it ideally suited for driving mixers, pin diode attenuators, SAW filters, and multielement discrete devices.Fabricated on an Analog Devices, Inc., high speed SiGe process, the ADL5562 is supplied in a compact 3 mm × 3 mm, 16-lead LFCSP package and operates over the temperature range of −40°C to + 85°C.APPLICATIONS Differential ADC drivers Single-ended to differential conversion RF/IF gain blocks SAW filter interfacing

The ADM1066 Super Sequencer® is a configurable supervisory/ sequencing device that offers a single-chip solution for supply monitoring and sequencing in multiple-supply systems. In addition to these functions, the ADM1066 integrates a 12-bit ADC and six 8-bit voltage output DACs. These circuits can be used to implement a closed-loop margining system that enables supply adjustment by altering either the feedback node or reference of a dc-to-dc converter using the DAC outputs. Supply margining can be performed with a minimum of external components. The margining loop can be used for in-circuit testing of a board during production (for example, to verify board functionality at −5% of nominal supplies), or it can be used dynamically to accurately control the output voltage of a dc-to-dc converter.APPLICATIONS Central office systems Servers/routers Multivoltage system line cards DSP/FPGA supply sequencing In-circuit testing of margined supplies

The ADM2482E/ADM2487E are isolated data transceivers with ±15 kV ESD protection and are suitable for high speed, half-duplex or full-duplex communication on multipoint transmission lines. For half-duplex operation, the transmitter outputs and receiver inputs share the same transmission line. Transmitter Output Pin Y is linked externally to Receiver Input Pin A, and Transmitter Output Pin Z to Receiver Input Pin B. The parts are designed for balanced transmission lines and comply with TIA/EIA- 485-A-98 and ISO 8482:1987(E).The devices employ the Analog Devices, Inc., iCoupler® technology to combine a 3-channel isolator, a three-state differential line driver, and a differential input receiver into a single package. An on-chip oscillator outputs a pair of square waveforms that drive an external transformer to provide isolated power. The logic side of the device can be powered with either a 5 V or a 3.3 V supply, and the bus side is powered with an isolated 3.3 V supply.The ADM2482E/ADM2487E driver has an active high enable, and the receiver has an active low enable. The driver output enters a high impedance state when the driver enable signal is low. The receiver output enters a high impedance state when the receiver enable signal is high.The device has current-limiting and thermal shutdown features to protect against output short circuits and situations where bus contention might cause excessive power dissipation. The part is fully specified over the industrial temperature range of −40°C to +85°C and is available in a 16-lead, wide-body SOIC package.Applications Isolated RS-485/RS-422 interfaces Industrial field networks Multipoint data transmission systems