The AD9523-1 provides a low power, multi-output, clock distribution function with low jitter performance, along with an on-chip PLL and VCO with two VCO dividers. The on-chip VCO tunes from 2.94 GHz to 3.1 GHz.The AD9523-1 is designed to support the clock requirements for long term evolution (LTE) and multicarrier GSM base station designs. It relies on an external VCXO to provide the reference jitter cleanup to achieve the restrictive low phase noise requirements necessary for acceptable data converter SNR performance.The input receivers, oscillator, and zero delay receiver provide both single-ended and differential operation. When connected to a recovered system reference clock and a VCXO, the device generates 14 low noise outputs with a range of 1 MHz to 1 GHz, and one dedicated buffered output from the input PLL (PLL1). The frequency and phase of one clock output relative to another clock output can be varied by means of a divider phase select function that serves as a jitter-free, coarse timing adjustment in increments that are equal to half the period of the signal coming out of the VCO.An in-package EEPROM can be programmed through the serial interface to store user-defined register settings for power-up and chip reset.APPLICATIONS LTE and multicarrier GSM base stations Wireless and broadband infrastructure Medical instrumentation Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs Low jitter, low phase noise clock distribution Clock generation and translation for SONET, 10Ge, 10G FC, and other 10 Gbps protocols Forward error correction (G.710) High performance wireless transceivers ATE and high performance instrumentation

The 10 clock outputs of the AD9544 are synchronized to any one of up to four input references. The digital phase-locked loops (DPLLs) reduce timing jitter associated with the external references. The digitally controlled loop and holdover circuitry continuously generate a low jitter output signal, even when all reference inputs fail.The AD9544 is available in a 48-lead LFCSP (7 mm ? 7 mm) package and operates over the ?40?C to +85?C temperature range.Note that throughout this data sheet, multifunction pins, such as SDO/M5, are referred to either by the entire pin name or by a single function of the pin, for example, M5, when only that function is relevant.Appliations SyncE and GPS synchronization and jitter cleanup Optical transport networks (OTN), SDH, and macro and small cell base stations OTN mapping/demapping with jitter cleaning Small base station clocking, including baseband and radio Stratum 2, Stratum 3e, and Stratum 3 holdover, jitter cleanup, and phase transient control JESD204B support for analog-to-digital converter (ADC) and digital-to-analog converter (DAC) clocking Cable infrastructures Carrier Ethernet

The ADCMP606 and ADCMP607 are very fast comparatorsfabricated on XFCB2, an Analog Devices, Inc., proprietaryprocess. These comparators are exceptionally versatile and easyto use. Features include an input range from VEE ? 0.5 V toVCCI + 0.2 V, low noise, CML-compatible output drivers, andTTL-/CMOS-compatible latch inputs with adjustable hysteresisand/or shutdown inputs.The devices offer 1.25 ns propagation delay with 2.5 ps rmsrandom jitter (RJ). Overdrive and slew rate dispersion aretypically less than 50 ps.A flexible power supply scheme allows the devices to operatewith a single +2.5 V positive supply and a ?0.5 V to +2.7 Vinput signal range up to a +5.5 V positive supply with a ?0.5 Vto +5.7 V input signal range. The ADCMP607 features splitinput/output supplies with no sequencing restrictions tosupport a wide input signal range with independent outputswing control and power savings.The CML-compatible output stage is fully back-matched forsuperior performance. The comparator input stage offers robustprotection against large input overdrive, and the outputs do notphase reverse when the valid input signal range is exceeded. Onthe ADCMP607, latch and programmable hysteresis features arealso provided with a unique single-pin control option.The ADCMP606 is available in a 6-lead SC70 package and theADCMP607 is available in a 12-lead LFCSP package.Applications High speed instrumentation Clock and data signal restoration Logic level shifting or translation Pulse spectroscopy High speed line receivers Threshold detection Peak and zero-crossing detectors High speed trigger circuitry Pulse-width modulators Current-/voltage-controlled oscillators Automatic test equipment (ATE)

Video IC Development Tools EVAL BRD ADV7802

The AD7705 / AD7706?are complete analog front ends for low frequency measurement applications. These 2-/3-channel devices can accept low level input signals directly from a transducer and produce serial digital output. The devices employ a ?-? conversion technique to realize up to 16 bits of no missing codes performance. The selected input signal is applied to a proprietary, programmable-gain front end based around an analog modulator. The modulator output is processed by an on-chip digital filter. The first notch of this digital filter can be programmed via an on-chip control register, allowing adjustment of the filter cutoff and output update rate. The AD7705 / AD7706 devices operate from a single 2.7 V to 3.3 V or 4.75 V to 5.25 V supply. The AD7705 features two fully differential analog input channels; the AD7706 features three pseudo differential input channels. Both devices feature a differential reference input. Input signal ranges of 0 mV to 20 mV through 0 V to 2.5 V can be incorporated on both devices when operating with a VDD of 5 V and a reference of 2.5 V. They can also handle bipolar input signal ranges of ?20 mV through ?2.5 V, which are referenced to the AIN(?) inputs on the AD7705 and to the COMMON input on the AD7706.The AD7705 / AD7706 devices, with a 3 V supply and a 1.225 V reference, can handle unipolar input signal ranges of 0 mV to 10 mV through 0 V to 1.225 V. The devices can accept bipolar input ranges of ?10 mV through ?1.225 V. Therefore, the AD7705 / AD7706 devices perform all signal conditioning and conversion for a 2-channel or 3-channel system. The AD7705 / AD7706 are ideal for use in smart, microcontroller, or DSP-based systems. The devices feature a serial interface that can be configured for 3-wire operation. Gain settings, signal polarity, and update rate selection can be configured in software using the input serial port. The parts contains self-calibration and system calibration options to eliminate gain and offset errors on the part itself or in the system. CMOS construction ensures very low power dissipation, and the power-down mode reduces the standby power consumption to 20 ?W typ. These parts are available in a 16-lead, wide body (0.3 inch), plastic dual in-line package (DIP); a 16-lead, wide body (0.3 inch), standard small outline (SOIC) package; and a low profile, 16-lead, thin shrink small outline package (TSSOP).

DC1266A-A: Demo Board for the LTC2453 Ultra-Tiny, Differential, 16-Bit ∆Σ ADC With I2C Interface

Demonstration circuit 1267A is a step-up DC/DC regulator featuring the LTC3125EDCB and is ideally suited for pulsed load applications where the input current needs to be limited. Demonstration circuit 1267A is configured for 500mA maximum input current limit and can handle pulsed load currents of up to 2A, with duty cycles of up to 15%. The input voltage range is 3.3V ±10%.

The LTC1520 is a high speed, precision differential line receiver that can operate at data rates as high as 50Mbps. A unique architecture provides very stable propagation delays and low skew over a wide input common mode, input overdrive and ambient temperature range. Propagation delay is 18ns ?3ns, while typically tPLH/tPHL skew is 500ps and channel-to-channel skew is 400ps.Each receiver translates differential input levels (VID ? 100mV) into valid CMOS and TTL output levels. Its high input resistance (?18k) allows many receivers to be connected to the same driver. The receiver outputs go into a high impedance state when disabled.Protection features include thermal shutdown and a controlled maximum short-circuit current (50mA max) that does not oscillate in and out of short-circuit mode. Input resistance remains ?18k when the device is unpowered or disabled, thus allowing the LTC1520 to be hot swapped into a backplane without loading the data lines.The LTC1520 operates from a single 5V supply and draws 12mA of supply current. The part is available in a 16-lead narrow SO package.Applications High Speed Backplane Interface Line Collision Detector PECL and LVDS Line Receivers Level Translator Ring Oscillator Tapped Delay Line

DC1273A: Demo Board for LT1938 - 25V, 2.2A, 2.8MHz Step-Down Switching Regulator

Demonstration circuit 1294A exercises four adjustable linear regulators in parallel using the LT3080. A small 20 mΩ ballast resistor is required for parallel operation. A short PCB trace can easily serve that purpose. The paralleled devices provide up to 4.4A of output current at 3.3V. Architected as a precision current source and voltage follower, the LT3080 can be used in many applications requiring high current, adjustability to zero output, and no heat sink. The device brings out the collector of the pass transistor to allow low dropout operation when used with multiple supplies. The LT3080's output voltage can be programmed to any level between 0V and 36V; however the demo board has a reduced input voltage range from 3.8V to 25V due to the input capacitor voltage rating.