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|
Texas Instruments
TLC2654ACPE4
|
Texas Instruments
74AUC16244DGVRG4
|
Texas Instruments
TLV2402CD
|
Texas Instruments
LM4040C50QDBZRG4
|
Texas Instruments
VSP5010PM
|
Texas Instruments
THS1031IDW
|
Texas Instruments
TPA112DGN
|
Texas Instruments
CD74HC595DWRG4
|
Texas Instruments
AM26LV31EIRGYRG4
|
Texas Instruments
DAC8043U/2K5G4
|
| Price |
|
|
|
$2.07 |
|
|
|
|
|
$0.67 |
$4.18 |
| RoHS |
|
|
Compliant |
Yes |
Compliant |
Compliant |
Yes |
Yes |
Compliant |
Compliant |
Compliant |
| Lead Status |
|
|
|
Yes |
|
Yes |
Yes |
Yes |
|
No |
No |
| Iq per channel(Max)(mA) |
|
|
|
0.00095 |
|
|
|
|
|
|
|
| Rating |
|
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|
Catalog |
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|
Catalog |
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Catalog |
Catalog |
| GBW(Typ)(MHz) |
|
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|
0.0055 |
|
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|
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|
|
| CMRR(Typ)(dB) |
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|
120 |
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|
|
| CMRR(Min)(dB) |
|
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|
70 |
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| Total Supply Voltage(Max)(+5V=5, +/-5V=10) |
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|
16 |
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|
|
|
|
|
|
| Total Supply Voltage(Min)(+5V=5, +/-5V=10) |
|
|
|
2.5 |
|
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|
|
|
| Approx. Price (US$) |
|
|
|
1.12 | 1ku |
|
|
7.67 | 100u |
|
|
0.59 | 1ku |
3.78 | 1ku |
| Architecture |
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|
|
CMOS |
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|
Pipeline |
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|
|
|
| Package Size |
|
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|
mm2 |
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|
mm2 |
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|
mm2 |
mm2 |
| Vn at 1kHz(Typ)(nV/rtHz) |
|
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|
500 |
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| Rail-to-Rail |
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|
In,Out |
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| Slew Rate(Typ)(V/us) |
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|
0.0025 |
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|
|
| Output Current(Typ)(mA) |
|
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|
0.2 |
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|
| Number of Channels(#) |
|
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|
2 |
|
|
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|
| Package Group |
|
|
|
PDIP,SOIC,VSSOP |
|
|
TSSOP |
|
|
SO,SOIC,TSSOP,VQFN |
SOIC |
| Offset Drift(Typ)(uV/C) |
|
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|
3 |
|
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|
| Iq per channel(Typ)(mA) |
|
|
|
0.00088 |
|
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|
| Vos (Offset Voltage @ 25C)(Max)(mV) |
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|
1.2 |
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| Additional Features |
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N/A |
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| Operating Temperature Range(C) |
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|
-40 to 125,0 to 70 |
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|
0 to 70 |
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|
-40 to 85 |
-40 to 85 |
| Input Bias Current(Max)(pA) |
|
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|
300 |
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| Resolution(Bits) |
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|
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|
10 |
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|
12 |
| # Input Channels |
|
|
|
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|
1 |
|
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|
| ENOB(Bits) |
|
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|
|
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|
7.7 |
|
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|
|
| Input Buffer |
|
|
|
|
|
|
No |
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|
|
| Analog Input BW(MHz) |
|
|
|
|
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|
150 |
|
|
|
|
| Input Range |
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|
|
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|
2V (p-p) |
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| INL(Max)(+/-LSB) |
|
|
|
|
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|
2 |
|
|
|
1 |
| SNR(dB) |
|
|
|
|
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|
49.3 |
|
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| Power Consumption(Typ)(mW) |
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|
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|
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|
160 |
|
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|
2.5 |
| Reference Mode |
|
|
|
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|
Ext,Int |
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| DNL(Max)(+/-LSB) |
|
|
|
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|
1 |
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|
| Interface |
|
|
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|
Parallel CMOS |
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|
SPI |
| Sample Rate(Max)(MSPS) |
|
|
|
|
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|
30 |
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|
|
|
| SINAD(dB) |
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|
56 |
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|
|
|
| SFDR(dB) |
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|
|
|
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|
52.4 |
|
|
|
|
| Supply Voltage(s)(V) |
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|
|
|
|
|
|
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|
3.3 |
|
| Supply Voltage(s)(Max)(V) |
|
|
|
|
|
|
|
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|
3.6 |
|
| Supply Voltage(s)(Min)(V) |
|
|
|
|
|
|
|
|
|
3 |
|
| ESD(kV) |
|
|
|
|
|
|
|
|
|
15 |
|
| Signaling Rate(Mbps) |
|
|
|
|
|
|
|
|
|
32 |
|
| Receivers Per Package |
|
|
|
|
|
|
|
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|
0 |
|
| Drivers Per Package |
|
|
|
|
|
|
|
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|
4 |
|
| Footprint |
|
|
|
|
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|
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|
AM26LS31 |
|
| ICC(Max)(mA) |
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|
|
|
|
|
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|
0.1 |
|
| # of TX/RX |
|
|
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|
|
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|
4 TX / 0 RX |
|
| Output Range Min.(mA/V) |
|
|
|
|
|
|
|
|
|
|
-2 |
| Sample / Update Rate(MSPS) |
|
|
|
|
|
|
|
|
|
|
0.284 |
| Settling Time(s) |
|
|
|
|
|
|
|
|
|
|
1 |
| Offset Error(Max)(%) |
|
|
|
|
|
|
|
|
|
|
0.01 |
| Special Features |
|
|
|
|
|
|
|
|
|
|
N/A |
| Output Range Max.(mA/V) |
|
|
|
|
|
|
|
|
|
|
2 |
| DAC Architecture |
|
|
|
|
|
|
|
|
|
|
Multiplying DAC |
| Gain Error(Max)(%FSR) |
|
|
|
|
|
|
|
|
|
|
0.05 |
| Zero Code Error(Typ)(mV) |
|
|
|
|
|
|
|
|
|
|
0.7 |
| Code to Code Glitch(Typ)(nV-sec) |
|
|
|
|
|
|
|
|
|
|
2 |
| Output Type |
|
|
|
|
|
|
|
|
|
|
Current |
| Reference |
|
|
|
|
|
|
|
|
|
|
Type |
| DAC |
|
|
|
|
|
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|
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|
|
Channels |