|
|
Texas Instruments
SN65C3238PWR
|
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PCI1420PDVG4
|
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PT79SR112S
|
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THS3001CDRG4
|
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TPS2321IPWRG4
|
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BQ24001PWPG4
|
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SN54HC4040J
|
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SN74AHC4066PWRG4
|
Texas Instruments
84099012A
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Texas Instruments
DAC9881SRGETG4
|
| Price |
|
|
$12.13 |
|
$4.56 |
|
$3.92 |
|
|
|
$23.14 |
| RoHS |
|
Compliant |
Yes |
Yes |
Compliant |
Compliant |
Compliant |
No |
|
No |
Compliant |
| Lead Status |
|
No |
Yes |
Yes |
No |
|
No |
No |
|
No |
No |
| ESD HBM(kV) |
|
15 |
|
|
|
|
|
|
|
|
|
| Operating Temperature Range(C) |
|
-40 to 85 |
|
|
-40 to 85,0 to 70 |
|
|
-55 to 125 |
|
-55 to 125 |
-40 to 105 |
| Rating |
|
Catalog |
|
|
Catalog |
|
|
Military |
|
Military |
Catalog |
| Drivers Per Package |
|
5 |
|
|
|
|
|
|
|
|
|
| Package Group |
|
SOIC,SSOP,TSSOP |
|
|
MSOP-PowerPAD,SOIC |
|
HTSSOP,VQFN |
CDIP,CFP,LCCC |
|
CFP,CDIP,LCCC |
VQFN |
| ICC(Max)(mA) |
|
2 |
|
|
|
|
|
|
|
|
|
| Package Size |
|
mm2 |
|
|
mm2 |
|
mm2 |
mm2 |
|
mm2 |
mm2 |
| Receivers Per Package |
|
3 |
|
|
|
|
|
|
|
|
|
| Approx. Price (US$) |
|
1.17 | 1ku |
|
|
4.05 | 1ku |
|
2.10 | 1ku |
|
|
|
16.90 | 1ku |
| Main Supply Voltage(Nom)(V) |
|
3.3,5 |
|
|
|
|
|
|
|
|
|
| Power Saving Feature |
|
Auto-Powerdown Plus |
|
|
|
|
|
|
|
|
|
| Data Rate(Max)(kbps) |
|
1000 |
|
|
|
|
|
|
|
|
|
| Logic Voltage(Min)(V) |
|
3.3 |
|
|
|
|
|
|
|
|
|
| CMRR(Typ)(dB) |
|
|
|
|
73 |
|
|
|
|
|
|
| CMRR(Min)(dB) |
|
|
|
|
65 |
|
|
|
|
|
|
| Input Bias Current(Max)(pA) |
|
|
|
|
10000000 |
|
|
|
|
|
|
| Output Current(Typ)(mA) |
|
|
|
|
120 |
|
|
|
|
|
|
| 3rd Harmonic(dBc) |
|
|
|
|
80 |
|
|
|
|
|
|
| Iq per channel(Max)(mA) |
|
|
|
|
9 |
|
|
|
|
|
|
| Vos (Offset Voltage @ 25C)(Max)(mV) |
|
|
|
|
3 |
|
|
|
|
|
|
| Architecture |
|
|
|
|
Bipolar,Current FB |
|
|
|
|
|
|
| BW @ Acl(MHz) |
|
|
|
|
420 |
|
|
|
|
|
|
| Total Supply Voltage(Min)(+5V=5, +/-5V=10) |
|
|
|
|
9 |
|
|
|
|
|
|
| @ MHz |
|
|
|
|
10 |
|
|
|
|
|
|
| Acl, min spec gain(V/V) |
|
|
|
|
1 |
|
|
|
|
|
|
| Vn at Flatband(Typ)(nV/rtHz) |
|
|
|
|
1.6 |
|
|
|
|
|
|
| 2nd Harmonic(dBc) |
|
|
|
|
80 |
|
|
|
|
|
|
| Number of Channels(#) |
|
|
|
|
1 |
|
|
|
|
|
|
| Total Supply Voltage(Max)(+5V=5, +/-5V=10) |
|
|
|
|
33 |
|
|
|
|
|
|
| Additional Features |
|
|
|
|
N/A |
|
|
|
|
|
|
| GBW(Typ)(MHz) |
|
|
|
|
420 |
|
|
|
|
|
|
| Iq per channel(Typ)(mA) |
|
|
|
|
6.6 |
|
|
|
|
|
|
| Offset Drift(Typ)(uV/C) |
|
|
|
|
5 |
|
|
|
|
|
|
| Rail-to-Rail |
|
|
|
|
No |
|
|
|
|
|
|
| Slew Rate(Typ)(V/us) |
|
|
|
|
6500 |
|
|
|
|
|
|
| Cell Chemistry |
|
|
|
|
|
|
Li-Ion/Li-Polymer |
|
|
|
|
| Control Interface |
|
|
|
|
|
|
Standalone (RC-Settable) |
|
|
|
|
| # Series Cells |
|
|
|
|
|
|
1 |
|
|
|
|
| Battery Charge Voltage(V) |
|
|
|
|
|
|
4.2 (Fixed) |
|
|
|
|
| Special Features |
|
|
|
|
|
|
Integrated FET,Temp Monitoring (Thermistor Pin) |
|
|
|
Reset to Mid-Scale,SDO |
| Charge Current(Max)(A) |
|
|
|
|
|
|
1.2 |
|
|
|
|
| Operating Vin(Max)(V) |
|
|
|
|
|
|
10 |
|
|
|
|
| Absolute Vin (safety rating)(Max)((V)) |
|
|
|
|
|
|
13.5 |
|
|
|
|
| tpd @ Nom Voltage(Max)(ns) |
|
|
|
|
|
|
|
32 |
|
34 |
|
| Output Drive (IOL/IOH)(Max)(mA) |
|
|
|
|
|
|
|
5.2/-5.2 |
|
5.2/-5.2 |
|
| ICC @ Nom Voltage(Max)(mA) |
|
|
|
|
|
|
|
0.08 |
|
0.08 |
|
| F @ Nom Voltage(Max)(Mhz) |
|
|
|
|
|
|
|
28 |
|
28 |
|
| Type |
|
|
|
|
|
|
|
Binary |
|
|
|
| Technology Family |
|
|
|
|
|
|
|
HC |
|
HC |
|
| Bits(#) |
|
|
|
|
|
|
|
12 |
|
8 |
|
| VCC(Max)(V) |
|
|
|
|
|
|
|
6 |
|
6 |
|
| Function |
|
|
|
|
|
|
|
Counter |
|
|
|
| VCC(Min)(V) |
|
|
|
|
|
|
|
2 |
|
2 |
|
| 3-State Output |
|
|
|
|
|
|
|
|
|
No |
|
| Output Type |
|
|
|
|
|
|
|
|
|
CMOS |
Buffered Voltage |
| Input Type |
|
|
|
|
|
|
|
|
|
CMOS |
|
| Output Range Max.(mA/V) |
|
|
|
|
|
|
|
|
|
|
5.5 |
| Interface |
|
|
|
|
|
|
|
|
|
|
SPI |
| Offset Error(Max)(%) |
|
|
|
|
|
|
|
|
|
|
0.01 |
| Internal Reference Drift(Max)(ppm/degC) |
|
|
|
|
|
|
|
|
|
|
N/A |
| Zero Code Error(Typ)(mV) |
|
|
|
|
|
|
|
|
|
|
N/A |
| Output Range Min.(mA/V) |
|
|
|
|
|
|
|
|
|
|
0 |
| Code to Code Glitch(Typ)(nV-sec) |
|
|
|
|
|
|
|
|
|
|
37 |
| INL(Max)(+/-LSB) |
|
|
|
|
|
|
|
|
|
|
2 |
| Priority |
|
|
|
|
|
|
|
|
|
|
2 |
| Power Consumption(Typ)(mW) |
|
|
|
|
|
|
|
|
|
|
6 |
| Settling Time(s) |
|
|
|
|
|
|
|
|
|
|
5 |
| Sample / Update Rate(MSPS) |
|
|
|
|
|
|
|
|
|
|
0.2 |
| Reference |
|
|
|
|
|
|
|
|
|
|
Type |
| Gain Error(Max)(%FSR) |
|
|
|
|
|
|
|
|
|
|
0.01 |
| DAC Architecture |
|
|
|
|
|
|
|
|
|
|
R-2R |
| DAC |
|
|
|
|
|
|
|
|
|
|
Channels |
| Resolution(Bits) |
|
|
|
|
|
|
|
|
|
|
18 |