INA204AID

Texas Instruments INA204AID

TL4050A41IDCKT

Texas Instruments TL4050A41IDCKT

TPS2817DBVT

Texas Instruments TPS2817DBVT

CY74FCT841CTSOCE4

Texas Instruments CY74FCT841CTSOCE4

TSC2100IRHB

Texas Instruments TSC2100IRHB

TLE2081AIDG4

Texas Instruments TLE2081AIDG4

TPS9110IPW

Texas Instruments TPS9110IPW

TLV5614IYZR

Texas Instruments TLV5614IYZR

UC2856NG4

Texas Instruments UC2856NG4

CD74HCT4046AME4

Texas Instruments CD74HCT4046AME4

Price $2.15 $6.56
RoHS Yes Compliant Yes Compliant Yes Compliant Not Compliant Yes Yes Compliant
Lead Status Yes No Yes No Yes No Yes Yes No
Special Features Alert Function,Analog Output,Low-side Capable Internal Regulator N/A Error Amplifier,Multi-topology,Soft Start,Synchronization Pin
Iq(Max)(mA) 2.8
Response Time(Typ)(?s) 1.3
Rating Catalog Catalog Catalog Catalog Catalog Catalog
Vs(Max)(V) 18
CMRR(Min)(dB) 80
Package Group SOIC,TSSOP,VSSOP SOT-23 SOIC,SSOP DSBGA PDIP,SOIC PDIP,SOIC
Small-Signal Bandwidth(Typ)(MHz) 0.3
Approx. Price (US$) 1.00 | 1ku 0.75 | 1ku 0.42 | 1ku 10.56 | 1ku 1.96 | 1ku 0.18 | 1ku
Input Offset (+/-)(Max)(uV) 2500
Gain(V/V) 50
Input Offset Drift (+/-)(Typ)(uV/Degrees Celsius) 5
Estimated Package Size (WxL)(mm2) [pf]10VSSOP[/pf]
Common Mode Range(Min) -16
Vs(Min)(V) 2.7
Gain Error(%) 0.2
Number of Channels(#) 2 1
Hysteresis Input(Typ)(mV) 8
Operating Temperature Range(C) -40 to 125 -40 to 85 -40 to 85 -40 to 85 -55 to 125
Common Mode Range(Max) 80
Input Threshold CMOS
Channel Input Logic Non-Inverting,Active Pullup
Power Switch MOSFET
Input VCC(Max)(V) 14
Peak Output Current(A) 2
Input Negative Voltage(V) 0
Prop Delay(ns) 24
Rise Time(ns) 14
Input VCC(Min)(V) 4
Fall Time(ns) 14
Bits(#) 10 1
F @ Nom Voltage(Max)(Mhz) 70 25
Schmitt Trigger No
Output Drive (IOL/IOH)(Max)(mA) 64/-32 4/-4
VCC(Max)(V) 5.25 5.5
Voltage(Nom)(V) 5 5
Package Size mm2 mm2
Technology Family FCT HCT
VCC(Min)(V) 4.75 4.5
tpd @ Nom Voltage(Max)(ns) 5.5 85
ICC @ Nom Voltage(Max)(mA) 0.2 0.08
Offset Error(Max)(%) N/A
Code to Code Glitch(Typ)(nV-sec) 10
Interface SPI
Output Type Buffered Voltage
Settling Time(s) 3
DAC Channels 4
Resolution(Bits) 12
Output Range Min.(mA/V) 0
Zero Code Error(Typ)(mV) 12
Output Range Max.(mA/V) 5.1
DAC Architecture String
Gain Error(Max)(%FSR) 0.6
INL(Max)(+/-LSB) 4
Reference Type
Sample / Update Rate(MSPS) 0.102
Power Consumption(Typ)(mW) 3.6
Vin(Min)(V) 8
Frequency(Max)(kHz) 1000
Gate Drive(Typ)(A) 1.5
UVLO Thresholds On/Off(V) 7.7/7
Control Method Current
Topology Boost,Flyback,Forward,Full-Bridge,Half-Bridge,Push-Pull
Vin(Max)(V) 40
Duty Cycle(Max)(%) 50