|
|
Texas Instruments
UCD7138DRST
|
onsemi
UC3842BVD1R2G
|
Vishay
VY1332M51Y5UC63V0
|
Lattice Semiconductor Corporation
LIF-UC110-SG48ITR
|
Texas Instruments
DAC8043UCG4
|
Texas Instruments
UCC2806NG4
|
Texas Instruments
UCC3585DG4
|
Texas Instruments
UCC3585D
|
Texas Instruments
UCD3138ARJAR
|
Texas Instruments
UC1705J
|
| Price |
|
|
|
|
$1.44 |
|
|
|
|
|
|
| RoHS |
|
Compliant |
Compliant |
Compliant |
Compliant |
Compliant |
Compliant |
Compliant |
Compliant |
Compliant |
Not Compliant |
| Lead Status |
|
No |
No |
No |
No |
No |
No |
No |
No |
Yes |
No |
| Rating |
|
Catalog |
|
|
|
Catalog |
Catalog |
|
|
Catalog |
Military |
| Operating Temperature Range(C) |
|
-40 to 125 |
|
|
|
-40 to 85 |
-40 to 85 |
|
|
-40 to 125 |
-55 to 125 |
| Approx. Price (US$) |
|
0.75 | 1ku |
|
|
|
3.78 | 1ku |
4.90 | 1ku |
|
|
5.31 | 1ku |
|
| Package Group |
|
SON |
|
|
|
SOIC |
PDIP,SOIC,SSOP,PLCC,TSSOP |
|
|
VQFN,WQFN |
CDIP,LCCC |
| Package Size |
|
mm2 |
|
|
|
mm2 |
|
|
|
mm2 |
|
| Output Range Min.(mA/V) |
|
|
|
|
|
-2 |
|
|
|
|
|
| Interface |
|
|
|
|
|
SPI |
|
|
|
|
|
| Sample / Update Rate(MSPS) |
|
|
|
|
|
0.284 |
|
|
|
|
|
| Settling Time(s) |
|
|
|
|
|
1 |
|
|
|
|
|
| Offset Error(Max)(%) |
|
|
|
|
|
0.01 |
|
|
|
|
|
| INL(Max)(+/-LSB) |
|
|
|
|
|
1 |
|
|
|
|
|
| Resolution(Bits) |
|
|
|
|
|
12 |
|
|
|
|
|
| Special Features |
|
|
|
|
|
N/A |
Error Amplifier,Multi-topology,Soft Start,Synchronization Pin |
|
|
|
|
| Output Range Max.(mA/V) |
|
|
|
|
|
2 |
|
|
|
|
|
| DAC Architecture |
|
|
|
|
|
Multiplying DAC |
|
|
|
|
|
| Gain Error(Max)(%FSR) |
|
|
|
|
|
0.05 |
|
|
|
|
|
| Zero Code Error(Typ)(mV) |
|
|
|
|
|
0.7 |
|
|
|
|
|
| Code to Code Glitch(Typ)(nV-sec) |
|
|
|
|
|
2 |
|
|
|
|
|
| Output Type |
|
|
|
|
|
Current |
|
|
|
|
|
| Power Consumption(Typ)(mW) |
|
|
|
|
|
2.5 |
|
|
|
|
|
| Reference |
|
|
|
|
|
Type |
|
|
|
|
|
| DAC |
|
|
|
|
|
Channels |
|
|
|
|
|
| Frequency(Max)(kHz) |
|
|
|
|
|
|
1000 |
|
|
2000 |
|
| Vin(Min)(V) |
|
|
|
|
|
|
6.75 |
|
|
|
|
| UVLO Thresholds On/Off(V) |
|
|
|
|
|
|
7.5/6.75 |
|
|
|
|
| Gate Drive(Typ)(A) |
|
|
|
|
|
|
0.5 |
|
|
|
|
| Duty Cycle(Max)(%) |
|
|
|
|
|
|
49 |
|
|
|
|
| Topology |
|
|
|
|
|
|
Push-Pull |
|
|
|
|
| Control Method |
|
|
|
|
|
|
Current |
|
|
|
|
| Vin(Max)(V) |
|
|
|
|
|
|
15 |
|
|
|
|
| DPWM Resolution(ps) |
|
|
|
|
|
|
|
|
|
250 |
|
| Processor |
|
|
|
|
|
|
|
|
|
31.25MHz,32-bit ARM7 |
|
| No. of Outputs |
|
|
|
|
|
|
|
|
|
8 |
|
| A/D Channels |
|
|
|
|
|
|
|
|
|
14 |
|
| GPIOs |
|
|
|
|
|
|
|
|
|
30 |
|
| Analog Comparators |
|
|
|
|
|
|
|
|
|
7 |
|
| Compensator |
|
|
|
|
|
|
|
|
|
2-pole/2-zero (PID hardware) |
|
| No. of Digital Power Peripheral feedback loops |
|
|
|
|
|
|
|
|
|
3 |
|
| Non-Volatile Memory |
|
|
|
|
|
|
|
|
|
2kB (Data),32kB (Program) |
|
| Communications |
|
|
|
|
|
|
|
|
|
1 PMBUS,2 UART |
|
| Input VCC(Max)(V) |
|
|
|
|
|
|
|
|
|
|
40 |
| Fall Time(ns) |
|
|
|
|
|
|
|
|
|
|
40 |
| Prop Delay(ns) |
|
|
|
|
|
|
|
|
|
|
100 |
| Power Switch |
|
|
|
|
|
|
|
|
|
|
MOSFET |
| Input Threshold |
|
|
|
|
|
|
|
|
|
|
TTL |
| Input Negative Voltage(V) |
|
|
|
|
|
|
|
|
|
|
0 |
| Rise Time(ns) |
|
|
|
|
|
|
|
|
|
|
40 |
| Peak Output Current(A) |
|
|
|
|
|
|
|
|
|
|
1.5 |
| Input VCC(Min)(V) |
|
|
|
|
|
|
|
|
|
|
5 |
| Number of Channels(#) |
|
|
|
|
|
|
|
|
|
|
1 |
| Channel Input Logic |
|
|
|
|
|
|
|
|
|
|
Inverting |
