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SN74AUC1G07DBVRG4

Texas Instruments SN74AUC1G07DBVRG4

Price $3.44 $0.08
RoHS Compliant Compliant Compliant Compliant Compliant Compliant Compliant Yes Yes Compliant
Lead Status No No No No Yes No No Yes Yes No
UVLO Thresholds On/Off(V) 6.3/5.7
Special Features Green Mode,Leading Edge Blanking,Light Load Efficiency,Multi-topology,Soft Start,Soft Switching Reverse Current Protection N/A IOFF,low power consumption,low tpd
Duty Cycle(Max)(%) 100
Topology Full-Bridge,Half-Bridge,Push-Pull
Package Group TSSOP,USON DDPAK/TO-263,TO-220 SOIC SOIC DDPAK/TO-263,TO-220 TQFP SOIC,VSSOP QFN,SOIC,TSSOP DSBGA,SC70,SOT-23
Frequency(Max)(kHz) 1000 2000
Rating Catalog Catalog Catalog Catalog Catalog Catalog Catalog Catalog Catalog
Approx. Price (US$) 1.20 | 1ku 2.78 | 1ku 2.85 | 1ku 1.94 | 1ku 2.78 | 1ku 10.71 | 1ku 2.29 | 1ku 0.31 | 1ku 0.06 | 1ku
Control Method Voltage
Operating Temperature Range(C) -55 to 125 -40 to 85 -40 to 85 0 to 70 0 to 70 -40 to 125 -40 to 85 -40 to 125 -40 to 85
Vin(Max)(V) 20 9 -3.2 9 9
Vin(Min)(V) 5.7 2.8 -15 1.8 2.8
Gate Drive(Typ)(A) 0.2
Accuracy(%) 2.5 2.5 2.5 2.5
Vout(Max)(V) 8.5 -1.2 8.8 8.5
Package Size mm2 mm2 mm2 mm2 mm2 mm2 mm2 mm2
PSRR @ 100KHz(dB) 18 22 18
Iq(Typ)(mA) 0.4 0.2 0.4 0.4
Regulated Outputs(#) 1 1 1 1
Vdo(Typ)(mV) 400 250 500 400
Vout(Min)(V) 1.2 -15 1.2 1.2
Output Capacitor Type Non-Ceramic Non-Ceramic Non-Ceramic Non-Ceramic
Output Options Adjustable Output,Fixed Output Adjustable Output,Fixed Output,Negative Output Adjustable Output,Fixed Output Adjustable Output,Fixed Output
Fixed Output Options(V) 3.3,5 -5,-12 3.3,5 3.3,5
Iout(Max)(A) 3 0.5 1 3
Additional Features Overcurrent Protection,Thermal Shutdown Overcurrent Protection,Reverse Current Protection,Thermal Shutdown Overcurrent Protection,Reverse Current Protection,Thermal Shutdown
DPWM Resolution(ps) 250
Processor 31.25MHz,32-bit ARM7
No. of Outputs 8
A/D Channels 14
Non-Volatile Memory 128kB (Program),2kB (Data)
Analog Comparators 7
Communications 1 SPI,2 I2C,2 PMBUS,2 UART
Compensator 2-pole/2-zero (PID hardware)
No. of Digital Power Peripheral feedback loops 3
GPIOs 43
Input Range(Min)(V) 0
Analog Voltage AVDD(Max)(V) 5.25
Integrated Features N/A
# Input Channels 1
Resolution(Bits) 12
Digital Supply(Min)(V) 4.5
Digital Supply(Max)(V) 5.25
INL(Max)(+/-LSB) 2
Power Consumption(Typ)(mW) 1.9
Analog Voltage AVDD(Min)(V) 4.5
SINAD(dB) 72
Sample Rate (max)(SPS) 200kSPS
Input Range(Max)(V) 5.25
Reference Mode Ext
Input Type Pseudo-Differential,Single-Ended
THD(Typ)(dB) -84
Multi-Channel Configuration N/A
Architecture SAR
tRESP Low - to - High(us) 0.2
Vs(Max)(V) 5.5
Vs(Min)(V) 2.7
Number of Channels(#) 4
Input Bias Current (+/-)(Max)(nA) 250
Rail-to-Rail Out
VICR(Max)(V) 4.2
Iq per channel(Max)(mA) 0.075
Vos (Offset Voltage @ 25C)(Max)(mV) 7
Output Type Open Collector
VICR(Min)(V) -0.1
3-State Output No
Logic True
Schmitt Trigger No
VCC(Max)(V) 2.7
Output Drive (IOL/IOH)(Max)(mA) 9/-9
F @ Nom Voltage(Max)(Mhz) 250
Bits(#) 1
VCC(Min)(V) 0.8
Technology Family AUC
Gate Type OPEN DRAIN BUFFER
ICC @ Nom Voltage(Max)(mA) 0.01
Voltage(Nom)(V) 0.8,1.2,1.5,1.8,2.5
tpd @ Nom Voltage(Max)(ns) 4.7,3.3,2.4,2.3,1.8
Sub-Family Non-Inverting Buffer/Driver