2.7 V to 5.5 V, <100 μA, 8-/10-/12-Bit nanoDACs® with I2C®-Compatible Interface in LFCSP and SC70

2.7 V to 5.5 V, 450 A, Rail-to-Rail Output, Quad, 12-Bit nano DAC Features: Low power quad nanoDACs: 12 Bits Guaranteed monotonic by design Relative Accuracy: ±12 LSBs max 10-lead MSOP and 3mm × 3mm LFCSP_WD package 2.7 V to 5.5 V power supply Power-on reset to zero Per channel power-down Serial interface, up to 50MHz

2.7 V to 5.5 V, <100 A, 12-Bit nanoDAC with I2C Compatible Interface, Tiny SC70 Package Features: Single 8-, 10-, 12-bit DACs, 2 LSB INL 6-lead LFCSP and SC70 packages Micropower operation: 100 µA max at 5 V Power-down to <150 nA at 3 V 2.7 V to 5.5 V power supply Guaranteed monotonic by design Power-on reset to 0 V with brownout detection 3 power-down functions I2C® compatible serial interface supports standard (100 KHz), fast (400 KHz) and high speed (3.4 MHz) modes On-chip output buffer amplifier, rail-to-rail operation

400MHz SHARC+ DSP with 640KB L1, 256KB Shared L2 SRAM, 120-lead LQFP_EP Features:SHARC+ Core infrastructure 400 (max) Core clock frequency 640KB Level 1 (L1) SRAM memory with parity (optional ability to configure cache) 32-bit, 40-bit & 64-bit floating point support 32-bit fixed point Byte, short-word, word, long-word addressedMemory 256KB on-chip Level 2 (L2) SRAM with ECC protection, up to 8 Mb (1 MB)Advanced Hardware Accelerators Enhanced FIR/IIR offload engines running at Core clock frequency for added processing power Security Crypto Engines with OTPPowerful DMA SystemInnovative Digital Audio Interface (DAI) includes: 8x Full SPORT interfaces w/TDM & I2S modes 2x S/PDIF Rx/Tx, 8 ASRC pairs 4x Precision Clock Generators 24 BuffersOther Peripheral Connectivity / Interfaces: 2x Quad SPI, 1x Octal SPI MLB 3-pin 4x I2C, 2x UARTs 6x General Purpose Timer, 1x General Purpose Counter 2x Watchdog Timers 2-ch 12bit Housekeeping ADCs 22 GPIO pins, 24 DAI pins Thermal SensorPackage 14mm x 14mm 120-lead LQFP_EPAdditional Features Security and Protection Crypto hardware accelerators Fast secure boot with IP protection Enhanced FIR and IIR accelerators running up to 1 GHz AEC-Q100 qualified for automotive applications

The AD5629R device is a low power, octal, 12-bit, buffered voltage-output DACs. It operates from a single 2.7 V to 5.5 V supply and is guaranteed monotonic by design.The AD5629R/AD5669R have an on-chip reference with aninternal gain of 2. The AD5629R-1/AD5669R-1 have a 1.25 V,5 ppm/?C reference, giving a full-scale output range of 2.5 V.The AD5629R-2/AD5629R-3 and the AD5669R-2/AD5669R-3have a 2.5 V 5 ppm/?C reference, giving a full-scale output rangeof 5 V depending on the option selected. Devices with 1.25 Vreference selected operate from a single 2.7 V to 5.5 V supply.Devices with 2.5 V reference selected operate from 4.5 V to 5.5 V.The on-chip reference is off at power-up, allowing the use of anexternal reference. The internal reference is enabled via asoftware write.The part incorporates a power-on reset circuit that ensures that the DAC output powers up to 0 V and remains powered up at this level until a valid write takes place. The part contains a power-down feature that reduces the current consumption of the device to 400 nA at 5 V and provides software-selectable output loads while in power-down mode for any or all DAC channels.Product Highlights Octal, 12-/16-bit DACs. On-chip 1.25 V/2.5 V, 5 ppm/?C reference. Available in 16-lead LFCSP and TSSOP, and 16-ball WLCSP. Power-on reset to 0 V or midscale. Power-down capability. When powered down, the DAC typically consumes 200 nA at 3 V and 400 nA at 5 V.Applications Process control Data acquisition systems Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources

400MHz SHARC+ DSP with 640KB L1, 256KB Shared L2 SRAM, 120-lead LQFP_EP Features:SHARC+ Core infrastructure 400 (max) Core clock frequency 640KB Level 1 (L1) SRAM memory with parity (optional ability to configure cache) 32-bit, 40-bit & 64-bit floating point support 32-bit fixed point Byte, short-word, word, long-word addressedMemory 256KB on-chip Level 2 (L2) SRAM with ECC protection, up to 8 Mb (1 MB)Advanced Hardware Accelerators Enhanced FIR/IIR offload engines running at Core clock frequency for added processing power Security Crypto Engines with OTPPowerful DMA SystemInnovative Digital Audio Interface (DAI) includes: 8x Full SPORT interfaces w/TDM & I2S modes 2x S/PDIF Rx/Tx, 8 ASRC pairs 4x Precision Clock Generators 24 BuffersOther Peripheral Connectivity / Interfaces: 2x Quad SPI, 1x Octal SPI MLB 3-pin 4x I2C, 2x UARTs 6x General Purpose Timer, 1x General Purpose Counter 2x Watchdog Timers 2-ch 12bit Housekeeping ADCs 22 GPIO pins, 24 DAI pins Thermal SensorPackage 14mm x 14mm 120-lead LQFP_EPAdditional Features Security and Protection Crypto hardware accelerators Fast secure boot with IP protection Enhanced FIR and IIR accelerators running up to 1 GHz AEC-Q100 qualified for automotive applications

2.7 V to 5.5 V, 450 A, Rail-to-Rail Output, Quad, 12-Bit nano DAC Features: Low power quad nanoDACs: 12 Bits Guaranteed monotonic by design Relative Accuracy: ±12 LSBs max 10-lead MSOP and 3mm × 3mm LFCSP_WD package 2.7 V to 5.5 V power supply Power-on reset to zero Per channel power-down Serial interface, up to 50MHz

METAL FILM RESISTOR, 562 OHM, 500mW, 1%; Resistance:562ohm; Product Range:SFR16S Series; Power

Through Hole Metal Film Resistor RC Series 562 ohm 250 mW - 0.1% 350 V Axial Leaded RoHS Compliant: Yes

High Precision Wraparound Thin Film Chip Resistor 0603 Size 562 Ohm 0.1% 0.125 W ±25 ppm/°C 2-Pin SMD Waffle