EVAL-ADM3055E-ARDZ is an Arduino Uno compatible Shield for an isolated controller area network with flexible data rate (CAN FD) communications port. The circuit interfaces to the local development platform via Serial Peripheral Interface (SPI) providing a simple method to add field bus communication to new and existing designs. EVAL-ADM3055E-ARDZ enables both the higher bandwidth CAN FD data rates (up to 8Mbps) demanded by modern multi-node CAN FD networks and the rugged electromagnetic compatibility (EMC) performance required by industrial environments. The circuit uses the integrated auxiliary isolated digital channel of the ADM3055E transceiver for runtime configuration of the bus termination. The switchable termination circuitry connects a 120 Ω split termination with common-mode filtering capacitor between the CAN FD bus lines. Switchable termination allows on-the-fly software configuration of termination locations when the CAN FD bus is physically altered. Using switchable termination, each node can be used at any physical location without mechanical changes to the nodes and software can track the position of terminations in the network. Additionally, the circuit can be set by the development platform to a reduced power standby state. While in the standby state, the isolated CAN FD communications port will notify the development platform of a remote wake-up request being transmitted by a remote CAN FD node to the CAN FD bus. With the ADM3055E CAN FD transceiver, the circuit provides reinforced signal and power isolation between the node and CAN FD bus. Electrical connection to the CAN FD bus may be made either by screw terminal or the CAN CiA 303-1 male 9-pin sub-D port. Because the ADM3055E transceiver has an integrated isolated dc-to-dc converter, it does not require external power to be present on the CAN FD bus. The examples focus on CAN FD networks however this circuit is backwards compatible with classical CAN networks.

The ADM3056E is a 5.7 kV rms isolated controller area network (CAN) physical layer transceiver. The ADM3056E fully meets the CAN-FD ISO 11898-2: 2016 requirements and is further capable of supporting data rates as high as 12 Mbps.The device employs Analog Devices, Inc., iCoupler? technology to combine a highly robust 3-channel isolator and a CAN transceiver into a single SOIC, surface-mount package. The ADM3056E provides galvanic isolation between the CAN controller and physical layer bus.Safety and regulatory approvals (pending) for 5.7 kV rms isolation withstand voltage, 849 VPEAK working insulation voltage, 8 kV surge, and 8.3 mm creepage and clearance, ensure that the ADM3056E meets isolation requirements for high voltage applications.Low propagation delays through the isolation support longer bus cables. Slope control mode is available for standard CAN atlow data rates. Standby mode can minimize power consumption when the bus is idle, or if the node goes offline. Silent modeallows the TXD input to be ignored for listen only functionality.Dominant timeout functionality protects against bus lock-up in a fault condition, and current limiting and thermal shutdown features protect against output short circuits. The device is fully specified over the ?40?C to +125?C industrial temperature range and is available in a 16-lead, increased creepage, wide-body SOIC package.Applications CANOpen, DeviceNet, and other CAN bus implementations Solar inverters and battery management Motor and process control Industrial automation Transport and infrastructure

The ADM3058E is a 5.7 kV rms isolated controller area network (CAN) physical layer transceiver with a high perfor-mance, basic feature set. The ADM3058E fully meets the CAN flexible data rate (CAN FD) ISO 11898-2:2016 requirements and is further capable of supporting data rates as high as 12 Mbps.The device employs Analog Devices, Inc., iCoupler? technology to combine a 2-channel isolator and a CAN transceiver into a single small outline integrated circuit (SOIC) surface-mount package. The ADM3058E is a fully isolated solution for CAN and CAN FD applications. The ADM3058E provides isolation between the CAN controller and physical layer bus. Safety and regulatory approvals (pending) for a 5.7 kV rms withstand voltage and a 1500 V peak working voltage ensure that the ADM3058E meets application isolation requirements.Low loop propagation delays and the extended common-mode range of ?25 V support robust communication on longer bus cables. Dominant timeout functionality protects against bus lock up in a fault condition, and current limiting and thermal shutdown features protect against output short circuits. The CAN bus input and output pins are protected to ?40 V against accidental connection to a +24 V bus supply. The device is fully specified over the ?40?C to +125?C industrial temperature range.ApplicationsCANOpen, DeviceNet, and other CAN bus implementationsIndustrial automationProcess control and building controlTransport and infrastructure

The ADN4650/ADN4651/ADN46521 are signal isolated, low voltage differential signaling (LVDS) buffers that operate at up to 600 Mbps with very low jitter.The devices integrate Analog Devices, Inc., iCoupler? technology, enhanced for high speed operation, to provide galvanic isolation of the TIA/EIA-644-A compliant LVDS drivers and receivers. This technology allows drop-in isolation of an LVDS signal chain.Multiple channel configurations are offered, and the LVDS receivers on the ADN4651/ADN4652 include a fail-safe mechanism to ensure a Logic 1 on the corresponding LVDS driver output when the inputs are floating, shorted, or terminated, but not driven.For high speed operation with low jitter, the LVDS and isolator circuits rely on a 2.5 V supply. An integrated on-chip low dropout regulator (LDO) can provide the required 2.5 V from an external 3.3 V power supply. The devices are fully specified over a wide industrial temperature range and are available in a 20-lead, wide body SOIC package with 5 kV rms isolation or a 20-lead SSOP package with 3.75 kV rms isolation.Applications Analog front-end (AFE) isolation Data plane isolation Isolated high speed clock and data links Isolated serial peripheral interface (SPI) over LVDS

The ADN4654/ADN4655/ADN46561? are signal isolated, low voltage differential signaling (LVDS) buffers that operate at up to 1.1 Gbps with low jitter. The devices integrate Analog Devices, Inc., iCoupler? technology, enhanced for high speed operation to provide galvanic isolation of the TIA/EIA-644-A compliant LVDS drivers and receivers. This integration allows drop-in isolation of an LVDS signal chain.The ADN4654/ADN4655/ADN4656 comprise multiple channel configurations, and the LVDS receivers on the ADN4655 and ADN4656 include a fail-safe mechanism to ensure a Logic 1 on the corresponding LVDS driver output when the inputs are floating, shorted, or terminated but not driven.For high speed operation with low jitter, the LVDS and isolator circuits rely on a 2.5 V supply. An integrated on-chip low dropout (LDO) regulator can provide the required 2.5 V from an external 3.3 V power supply. The devices are fully specified over a wide industrial temperature range and come in a 20-lead, wide body SOIC_W package with 5 kV rms isolation or in a 20-lead SSOP package with 3.75 kV rms isolation.Applications Isolated video and imaging data Analog front-end isolation Data plane isolation Isolated high speed clock and data links1 Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Other patents are pending.

The ADN4691E?/?ADN4693E?/?ADN4696E?/ ADN4697E aremultipoint, low voltage differential signaling (M-LVDS)transceivers (driver and receiver pairs) that can operate at up to200 Mbps (100 MHz). The receivers detect the bus state with adifferential input of as little as 50 mV over a common-modevoltage range of ?1 V to +3.4 V. ESD protection of up to ?15 kVis implemented on the bus pins. The devices adhere to theTIA/EIA-899 standard for M-LVDS and complement TIA/EIA-644 LVDS devices with additional multipoint capabilities.The ADN4691E / ADN4693E are Type 1 receivers with 25 mV ofhysteresis so that slow-changing signals or loss of input does notlead to output oscillations. The ADN4696E / ADN4697E areType 2 receivers exhibiting an offset threshold, guaranteeing theoutput state when the bus is idle (bus-idle fail-safe) or the inputs areopen (open-circuit fail-safe).The devices are available as half-duplex in an 8-lead SOIC package(the ADN4691E / ADN4696E) or as full-duplex in a 14-leadSOIC package (the ADN4693E / ADN4697E).APPLICATIONS Backplane and cable multipoint data transmission Multipoint clock distribution Low power, high speed alternative to shorter RS-485 links Networking and wireless base station infrastructure

The ADPD103 is a highly efficient photometric front end with an integrated 14-bit analog-to-digital converter (ADC) and a 20-bit burst accumulator that works in concert with flexible light emitting diode (LED) drivers. It is designed to stimulate an LED and measure the corresponding optical return signal. The data output and functional configuration occur over a 1.8 V I2C interface. The control circuitry includes flexible LED signaling and synchronous detection. The analog front end (AFE) features best-in-class rejection of signal offset and corruption due to modulated interference commonlycaused by ambient light.Couple the ADPD103 with a low capacitance photodiode of <100 pF for optimal performance. The ADPD103 can be used with any LED.Aplications Body worn health and fitness monitors, for example, heart rate monitoring Clinical measurements, for example, SpO2 Industrial monitoring Background light measurements

The EVAL-ADPD188BIZ-S2 evaluation board provides users with a simple means of evaluating the ADPD188BI optical module along with the EVAL-CHAMBER smoke chamber for smoke and aerosol detection applications. The evaluation system is composed of the EVAL-ADPD188BIZ-S2 evaluation board, the EVAL-ADPDUCZ microcontroller board, the optional EVAL-CHAMBER smoke chamber, and the Wavetool Evaluation Software graphical user interface (GUI). The software provides users with both low level and high level configurability, real-time frequency and time domain analysis, and user datagram protocol (UDP) transfer capability so that the evaluation board can easily interface to the user development system. The EVAL-ADPD188BIZ-S2 is powered through the ribbon cable from the EVAL-ADPDUCZ microcontroller board (ordered separately). For full details on the ADPD188BI, see the ADPD188BI data sheet, which should be consulted in conjunction with this user guide when using these evaluation boards.

The ADT74701 controller is a multichannel temperature sensor and PWM fan controller and fan speed monitor for systems requiring active cooling. It is designed to interface directly to an I2C? bus. The ADT7470 can monitor up to 10 daisy-chained TMP05?temperature sensors. It can also monitor and control the speed of four fans, in automatic or in manual control loops.A FULL_SPEED input is provided to allow the fans to be blasted to maximum speed, via external hardware control, under extreme thermal conditions or on system startup. An SMBALERT interrupt communicates error conditions such as fan under speed and over temperature measurements to the system service processor. Individual error conditions can then be read from status registers over the I2C bus.APPLICATIONS Servers Networking and telecommunications equipment Desktops

The ADuC7023 is a fully integrated, 1 MSPS, 12-bit data acquisition system, incorporating high performance multichannel ADCs, 16-bit/32-bit MCUs, and Flash/EE memory on a single chip.The ADC consists of up to 12 single-ended inputs. An additional four inputs are available but are multiplexed with the four DAC output pins. The ADC can operate in single-ended or differential input modes. The ADC input voltage is 0 V to VREF. A low drift band gap reference, temperature sensor, and voltage comparator complete the ADC peripheral set.The DAC output range is programmable to one of two voltage ranges. The DAC outputs have an enhanced feature of being able to retain their output voltage during a watchdog or software reset sequence.The devices operate from an on-chip oscillator and a PLL, generating an internal high frequency clock of 41.78 MHz. This clock is routed through a programmable clock divider from which the MCU core clock operating frequency is generated. The microcontroller core is an ARM7TDMI?, 16-bit/32-bit RISC machine that offers up to 41 MIPS peak performance. Eight kilobytes of SRAM and 62 kilobytes of nonvolatile Flash/EE memory are provided on chip. The ARM7TDMI core views all memory and registers as a single linear array.The ADuC7023 contains an advanced interrupt controller. The vectored interrupt controller (VIC) allows every interrupt to be assigned a priority level. It also supports nested interrupts to a maximum level of eight per IRQ and FIQ. When IRQ and FIQ interrupt sources are combined, a total of 16 nested interrupt levels are supported.On-chip factory firmware supports in-circuit download via the I2C serial interface port, and non-intrusive emulation is supported via the JTAG interface. These features are incorporated into a low cost QuickStart? development system supporting this MicroConverter? family. The part contains a 16-bit PWM with five output signals.For communication purposes, the part contains 2 ? I2C channels that can be individually configured for master or slave mode. An SPI interface supporting both master and slave modes is also provided.The parts operate from 2.7 V to 3.6 V and are specified over an industrial temperature range of ?40?C to +125?C. The ADuC7023 is available in either a 32-lead or 40-lead LFCSP package. A 36-ball wafer level CSP package (WLCSP) is also available.Applications Optical networking Industrial control and automation systems Smart sensors, precision instrumentation Base station systems