DC1415A: Demo Board for the LTC4265 IEEE 802.3 at High Power PD Interface Controller with 2-Event Classification Recognition.

The ADL5320 incorporates a dynamically adjustable biasing circuit that allows for the customization of OIP3 and P1dB performance from 3.3 V to 5 V without the need for an external bias resistor. This feature gives the designer the ability to tailor driver amplifier performance to the specific needs of the design. This feature also creates the opportunity for dynamic biasing of the driver amplifier, where a variable supply is used to allow for full 5 V biasing under large signal conditions and then can reduce the supply voltage when signal levels are smaller and lower power consumption is desirable. This scalability reduces the need to evaluate and inventory multiple driver amplifiers for different output power requirements from 22 dBm to 26 dBm output power levels.The ADL5320 is also rated to operate across the wide temperature range of ?40?C to +105?C for reliable performance in designs that experience higher temperatures, such as power amplifiers. The 1?4 watt driver amplifier also covers the 400 MHz to 2700 MHz wide frequency range and only requires a few external components to be tuned to a specific band within that wide range. This high performance, broadband RF driver amplifier is well suited for a variety of wired and wireless applications including cellular infrastructure, ISM band power amplifiers, defense equipment, and instrumentation equipment. A fully populated evaluation board is available.The ADL5320 also delivers excellent adjacent channel power ratio (ACPR) vs. output power and bias voltage. The driver can deliver greater than 17 dBm of output power at 2140 MHz while achieving an ACPR of ?55 dBc at 5 V. If the bias is reduced to 3.3 V, the ?55 dBc ACPR output power reduces to 9 dBm.Applications Wireless infrastructure Automated test equipment ISM/AMR applications

The ADP1074 is a current mode, fixed frequency, active clamp, synchronous forward controller designed for isolated dc to dc power supplies. Analog Devices proprietary iCouplers? are integrated in the ADP1074 to eliminate the bulky signal transformers and optocouplers that transmit signals over the isolation boundary. Integrating the iCouplers reduces system design complexity, cost, and component count and improves overall system reliability. With the integrated isolators and metal-oxide semiconductor field effect transistor (MOSFET) drivers on both the primary and the secondary side, the ADP1074 offers a compact system level design and yields a higher efficiency than a non-synchronous forward converter at heavy loads.The primary side pins provide functions for programming the switching frequency, maximum duty cycle, external frequency synchronization, and slope compensation.The secondary side pins provide functions for differential output voltage sensing, overvoltage, power good, tracking, and programmable light load mode setting.The feedback signal and timing of synchronous rectifier pulse-width modulations (PWMs) are transmitted from primary to secondary or from secondary to primary sides through the iCouplers using a proprietary transmission scheme.The ADP1074 also offers features such as input current protection, undervoltage lockout (UVLO), precision enable with adjustable hysteresis, overtemperature protection (OTP), and power saving light load mode (LLM).Applications Isolated dc-to-dc power conversion Intermediate bus voltage generation Telecom, industrial Base station and antenna RF power Small cell PoE powered device Enterprise switches/routers Core/edge/metro/optical routing Power modules

DC1717A: Demo Board for the LTC4417 Prioritized PowerPath Controller.

The ADP2138 and ADP2139 are high efficiency, low quiescent current, synchronous step-down dc-to-dc converters. The ADP2139 has the additional feature of an internal discharge switch. The total solution requires only three tiny external components. When the MODE pin is set high, the buck regulator operates in forced PWM mode, which provides low peak-to-peak ripple for power supply noise sensitive loads at the expense of light load efficiency. When the MODE pin is set low, the buck regulator automatically switches operating modes, depending on the load current level. At higher output loads, the buck regulator operates in PWM mode. When the load current falls below a predefined threshold, the regulator operates in power save mode (PSM), improving light load efficiency.The ADP2138/ADP2139 operate on input voltages of 2.3 V to 5.5 V, which allows for single lithium or lithium polymer cell, multiple alkaline or NiMH cell, PCMCIA, USB, and other standard power sources. The maximum load current of 800 mA is achievable across the input voltage range.The ADP2138/ADP2139 are available in fixed output voltages of 3.3 V, 3.0 V, 2.8 V, 2.5 V, 1.8 V, 1.5 V, 1.2 V, 1.0 V, and 0.8 V. All versions include an internal power switch and synchronous rectifier for minimal external part count and high efficiency. The ADP2138/ADP2139 have internal soft start and they are internally compensated. During logic controlled shutdown, the input is disconnected from the output and the ADP2138/ADP2139 draw 0.2 ?A (typical) from the input source.Other key features include undervoltage lockout to prevent deep battery discharge, and soft start to prevent input current overshoot at startup. The ADP2138/ADP2139 are available in a 6-ball wafer level chip scale package (WLCSP).Applications PDAs and palmtop computers Wireless handsets Digital audio, portable media players Digital cameras, GPS navigation units

The ADCLK905 (one input, one output), ADCLK907 (dual oneinput, one output), and ADCLK925 (one input, two outputs) areultrafast clock/data buffers fabricated on the Analog Devices, Inc.,proprietary XFCB3 silicon germanium (SiGe) bipolar process.The ADCLK905/ADCLK907/ADCLK925 feature full-swing emitter coupled logic (ECL) output drivers. For PECL (positive ECL) operation, bias VCC to the positive supply and VEE to ground. For NECL (negative ECL) operation, bias VCC to ground and VEE to the negative supply.The buffers offer 95 ps propagation delay, 7.5 GHz toggle rate, 10 Gbps data rate, and 60 fs random jitter (RJ).The inputs have center tapped, 100 ?, on-chip termination resistors. A VREF pin is available for biasing ac-coupled inputs.The ECL output stages are designed to directly drive 800 mV each side into 50 ? terminated to VCC ? 2 V for a total differential output swing of 1.6 V.The ADCLK905/ADCLK907/ADCLK925 are available in 16-lead LFCSP packages.Applications Clock and data signal restoration and level shifting Automated test equipment (ATE) High speed instrumentation High speed line receivers Threshold detection Converter clocking

The ADMV1128 is a silicon on isolator (SOI), microwave, upconverter and downconverter optimized for 5G radio designs operating in the 24 GHz to 29.5 GHz frequency range.Both upconverters and downconverters offer two modes of frequency translation. One mode is conversion from and/or to single-ended or complex intermediate frequency (IF) signals, which then pass through an on-chip 90? IF hybrid, known as IF mode.The other mode is a direct conversion from and/or to differential baseband inphase/quadrature (I/Q) inputs and outputs, known as baseband mode. The I/Q baseband output common-mode voltage is programmable between 0 V and 1.5 V. The SPI provides fine adjustment of the quadrature phase to optimize I/Q demodulation performance.When the device is used as an image rejecting downconverter, the unwanted image term is typically rejected to 24 dBc, before calibration. The ADMV1128 offers a square law power detector to allow monitoring of the power levels at the mixer inputs of the downconverter.The RF receive input, RF transmit output, and local oscillator (LO) interface are all single-ended and matched to 50 ?. The on-chip RF switch provides the option to combine the transmit and receive RF ports together for time division duplex (TDD) applications. The serial port interface (SPI) provides adjustment of the quadrature phase to allow optimum sideband rejection. In addition, the SPI allows powering down the output envelope detector to reduce power consumption when carrier feedthrough optimization is not necessary.The ADMV1128 upconverter and downconverter is housed in a compact, thermally enhanced, 6 mm ? 6.5 mm, ball grid array (BGA) package. This BGA package enables the ability to heat sink the ADMV1128 from the top of the package for the most efficient thermal heat sinking. The ADMV1128 operates over the ?40?C to +95?C TC range.APPLICATIONS Millimeter-wave 5G applications Point to point microwave radios Radar and electronic warfare systems Instrumentation and automatic test equipment (ATE)

The AD9517-11?provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 2.30 GHz to 2.65 GHz. Optionally, an external VCO/VCXO of up to 2.4 GHz can be used.The AD9517-1 emphasizes low jitter and phase noise to maximize data converter performance, and it can benefit other applications with demanding phase noise and jitter requirements.The AD9517-1 features four LVPECL outputs (in two pairs) and four LVDS outputs (in two pairs). Each LVDS output can be reconfigured as two CMOS outputs. The LVPECL outputs operate to 1.6 GHz, the LVDS outputs operate to 800 MHz, and the CMOS outputs operate to 250 MHz.For applications that require additional outputs, a crystal reference input, zero-delay, or EEPROM for automatic configuration at startup, the AD9520 and AD9522 are available. In addition, the AD9516 and AD9518 are similar to the AD9517 but have a different combination of outputs.Each pair of outputs has dividers that allow both the divide ratio and coarse delay (or phase) to be set. The range of division for the LVPECL outputs is 1 to 32. The LVDS/CMOS outputs allow a range of divisions up to a maximum of 1024.The AD9517-1 is available in a 48-lead LFCSP and can be operated from a single 3.3 V supply. An external VCO, which requires an extended voltage range, can be accommodated by connecting the charge pump supply (VCP) to 5 V. A separate LVPECL power supply can be from 2.5 V to 3.3 V (nominal).The AD9517-1 is specified for operation over the industrial range of ?40?C to +85?C.Applications Low jitter, low phase noise clock distribution 10/40/100 Gb/sec networking line cards, including SONET, Synchronous Ethernet, OTU2/3/4 Forward error correction (G.710) Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs High performance wireless transceivers ATE and high performance instrumentation 1AD9517 is used throughout the data sheet to refer to all the members of the AD9517 family. However, when AD9517-1 is used, it is refers to that specific member of the AD9517 family.

Demonstration circuit 1128A is a dual channel synchronous, 2.25MHz Step-Down DC/DC Regulator featuring the LTC3419. The DC1128A has an input voltage range of 2.5V to 5.5V. Both jumper selectable 3.3V/2.5V and 1.2V/1.5V/1.8V outputs are capable of delivering up to 600mA of output current. The device also features independent internal soft-start for each channel.

The LTC3601 is a high efficiency, monolithic synchronous buck regulator using a phase-lockable controlled on-time, current mode architecture capable of supplying up to 1.5A of output current. The operating supply voltage range is from 4V to 15V, making it suitable for a wide range of power supply applications.The operating frequency is programmable from 800kHz to 4MHz with an external resistor enabling the use of small surface mount inductors. For switching noise sensitive applications, the LTC3601 can be externally synchronized over the same frequency range. An internal phase-locked loop aligns the on-time of the top power MOSFET to the internal or external clock. This unique constant frequency/ controlled on-time architecture is ideal for high step-down ratio applications that demand high switching frequencies and fast transient response.The LTC3601 offers two operational modes: Burst Mode operation and forced continuous mode to allow the user to optimize output voltage ripple, noise, and light load efficiency for a given application. Maximum light load efficiency is achieved with the selection of Burst Mode operation while forced continuous mode provides minimum output ripple and constant frequency operation.Applications Distributed Power Systems Lithium-Ion Battery-Powered Instruments Point-of-Load Power Supply