Demonstration circuit 1062 is a micropower synchronous buck-boost + buck converter based on the LTC3520. The DC1062 has an input voltage range of 2.2V to 5.5V and three output voltages: 3.3V @ up to 1A, 1.8V @ 600mA and 1.5V @ 200mA. The 1.5VOUT is an LDO regulator derived from either the 3.3VOUT or the 1.8VOUT.

DC1066A: Demo Board for the LTC4355 Positive High Voltage Ideal Diode-OR with Input Supply and Fuse Monitors.

DC1067A-B: Demo Board for the LTC2450-1 Easy-to-Use, Ultra-Tiny 16-Bit ΔΣ ADC.

The LTC4310 provides bidirectional I2C communications between two I2C buses whose grounds are isolated from one another. Each LTC4310 encodes I2C bus logic states into signals that are transmitted across an isolation barrier to another LTC4310. The receiving LTC4310 decodes the transmission and drives its l2C bus to the appropriate logic state. The isolation barrier can be bridged by an inexpensive Ethernet, or other transformer, to achieve communications across voltage differences reaching thousands of volts, or it can be bridged by capacitors for lower voltage isolation. The LTC4310-1 is intended for use in 100kHz I2C systems. The LTC4310-2 is intended for 400kHz I2C systems.Rise time accelerators provide strong pull-up currents on SCL and SDA rising edges to meet rise time specifications for heavily loaded systems. Data and clock Hot Swap? circuitry prevent data corruption when a card is inserted into or removed from a live bus. When a bus is stuck low for 37ms, the LTC4310 turns off its pull-down devices and generates up to sixteen clocks and a STOP bit in an attempt to free the bus. Driving EN low sets the LTC4310 in a very low current shutdown mode to conserve power.Applications Isolated I2C, SMBus and PMBus Interfaces Isolated Power Supplies Positive-to-Negative Rail Communications Power-over-Ethernet

The HMC678LC3C is a 2:1 Selector designed to support data transmission rates of up to 13 Gbps, and selector port operation of up to 13 GHz. The selector routes one of the two single-ended inputs to the differential output upon assertion of the proper select port. All single-ended input signals to the HMC678LC3C are terminated with 50 ohms to ground on-chip, and may be either AC or DC coupled.The outputs of the HMC678LC3C may be operated either differentially or single-ended. Outputs can be connected directly to a 50 ohm terminated system, while DC blocking capacitors may be used if the terminating system is 50 ohms to a non-ground DC voltage. The HMC678LC3C operates from a single -3.3V dc supply and is available in a ceramic RoHS compliant 3x3 mm SMT package.APPLICATIONS 2:1 Multiplexer up to 13 Gbps RF ATE Applications Broadband Test & Measurement Serial Data Transmission up to 13 Gbps Redundant Path Switching Built-in Test

The HMC727 is a D-type Flip Flop designed to support data transmission rates of up to 13 Gbps, and clock frequencies as high as 13 GHz. During normal operation, data is transferred to the outputs on the positive edge of the clock. Reversing the clock inputs allows for negative-edge triggered applications. All input signals to the HMC727 are terminated with 50 Ohms to ground on-chip, and maybe either AC or DC coupled.The differential outputs of the HMC727 may be either AC or DC coupled. Outputs can be connected directly to a 50 Ohm to ground terminated system, while DC blocking capacitors may be used if the terminating system is 50 Ohms to a nonground DC voltage. The HMC727 operates from a single -3.3V DC supply and is available in a ceramic RoHS compliant 3x3 mm SMT package.APPLICATIONS RF ATE Applications Broadband Test & Measurement Serial Data Transmission?up to 13 Gbps Digital Logic Systems up to 13 GHz

The HMC737 is a GaAs InGaP Heterojunction Bipolar Transistor (HBT) MMIC VCO. The HMC737 integrate a resonator, negative resistance device, varactor diode and feature half frequency output. The VCO's phase noise performance is excellent over temperature, shock, and process due to the oscillator's monolithic structure. Power output is +9 dBm typical from a +4.2V supply voltage. The voltage controlled oscillator is packaged in a leadless QFN 4x4 mm surface mount package, and requires no external matching components.APPLICATIONS Point-to-Multi-Point Radios Test Equipment & Industrial Controls SATCOM Military End-Use

The HMC686LP4(E) is a high dynamic range passive MMIC mixer with integrated LO amplifier in a 4x4 SMT QFN package covering 0.7 to 1.1 GHz. Excellent input IP3 performance of +34 dBm for down conversion is provided for 3G & 4G GSM/CDMA applications at an LO drive of 0 dBm. With an input 1 dB compression of +25 dBm, the RF port will accept a wide range of input signal levels. Conversion loss is 7.5 dB typical. The DC to 500 MHz IF frequency response will satisfy GSM/CDMA transmit or receive frequency plans.The HMC686LP4(E) is optimized to high side LO frequency plans for 0.7 - 1.1 GHz RF Band and is pin for pin compatible with the?HMC684LP4(E)?which is a 0.7 - 1.0 GHz converter optimized for low side LO. The HMC686LP4(E) is optimized to low side LO frequency plans for 1.4 - 1.5 GHz RF LTE band applications.APPLICATIONS Cellular/3G & LTE/WiMAX/4G Basestations & Repeaters GSM, CDMA & OFDM Transmitters and Receivers

The AD5332?/ AD5333?/ AD5342 / AD5343?are dual 8-,10-,and 12-bit DACs. They operate from a 2.5 V to 5.5 V supply consuming just 230 ?A at 3 V, and feature a power-down pin, PD that further reduces the current to 80 nA. These devices incorporate an on-chip output buffer that can drive the output to both supply rails, while the AD5333 and AD5342 allow a choice of buffered or unbuffered reference input.PRODUCT HIGHLIGHTS Available in a 28-lead TSSOP package Low power, single supply operation from 2.5 V to 5.5 V supply Consumes 0.69 mW at 3 V and 1.5 mW at 5 V On-chip output buffer can drive output to both supply rails Allows a choice of buffered/unbuffered reference input Programmable output range 0-VREF or 0-2VREF (via GAIN pin)

The AD5362 / AD5363 contains 8, 16/14-bit DACs in a single, 56-lead, LFCSP or 52-lead LQFP package. It provides buffered voltage outputs with a span 4 times the reference voltage. The gain and offset of each DAC can be independently trimmed to remove errors. For even greater flexibility, the device is divided into two groups of 4 DACs, and the output range of each group can be independently adjusted by an offset DAC.The AD5362 / AD5363 offers guaranteed operation over a wide supply range with VSS from -4.5 V to -16.5 V and VDD from +8 V to +16.5 V. The output amplifier headroom requirement is 1.4 V operating with a load current of 1 mA.The AD5362 / AD5363 has a high-speed serial interface, which is compatible with SPI?, QSPI?, MICROWIRE?, and DSP interface standards and can handle clock speeds of up to 50 MHz. All the outputs can be updated simultaneously by taking the LDAC input low. Each channel has a programmable gain and an offset adjust register.Each DAC output is amplified and buffered on-chip with respect to an external SIGGND input. The DAC outputs can also be switched to SIGGND via the CLR pin.APPLICATIONS Instrumentation Industrial Control System Level setting in automatic test equipment (ATE) Variable optical attenuators (VOA) Optical line cards