The ADG5248F and ADG5249F are 8:1 and dual 4:1 analog multiplexers. The ADG5248F switches one of eight inputs to a common output and the ADG5249F switches one of four differential inputs to a common differential output. Each channel conducts equally well in both directions when on, and each channel has an input signal range that extends to the supplies. The primary supply voltages define the on-resistance profile, whereas the secondary supply voltages define the voltage level at which the overvoltage protection engages.When no power supplies are present, the channel remains in the off condition, and the switch inputs are high impedance. Under normal operating conditions, if the analog input signal levels on any Sx pin exceed positive fault voltage (POSFV) or negative fault voltage (NEGFV) by a threshold voltage (VT), the channel turns off and that Sx pin becomes high impedance. If the switch is selected to be on, then the drain pin is pulled to the secondary supply voltage that was exceeded. Input signal levels up to +55 V or ?55 V relative to ground are blocked, in both the powered and unpowered condition.The low capacitance and charge injection of these switches make them ideal solutions for data acquisition and sample-and-hold applications, where low glitch switching and fast settling times are required.?Note that, throughout this data sheet, multifunction pins, such as A0/F2, are referred to either by the entire pin name or by a single function of the pin, for example, A0, when only that function is relevant.?Product Highlights Source pins are protected against voltages greater than the secondary supply rails, up to ?55 V and +55 V. Source pins are protected against voltages between ?55 V and +55 V in an unpowered state. Overvoltage detection with digital output indicates operating state of switches. Trench isolation guards against latch-up. Optimized for low charge injection and on-capacitance. The ADG5248F/ADG5249F can be operated from a dual?supply of ?5 V to ?22 V or a single power supply of 8 V to 44 V.Applications Analog input/output modules Process control/distributed control systems Data acquisition Instrumentation Avionics Automatic test equipment Communication systems Relay replacement

The ADG5412F and ADG5413F contain four independently controlled single-pole/single-throw (SPST) switches. The ADG5412F has four switches that turn on with Logic 1 inputs. The ADG5413F has two switches with that turn on and two switches that turn off with Logic 1 inputs. Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the supplies. The digital inputs are compatible with 3 V logic inputs over the full operating supply range.When no power supplies are present, the switch remains in the off condition, and the switch inputs are high impedance. Under normal operating conditions, if the analog input signal levels on any Sx pin exceed VDD or VSS by a threshold voltage, VT, then the switch turns off. Input signal levels up to +55 V or ?55 V relative to ground are blocked, in both the powered and unpowered condition.The low on resistance of these switches, combined with on-resistance flatness over a significant portion of the signal range make them an ideal solution for data acquisition and gain switching applications where excellent linearity and low distortion are critical.Product Highlights Source pins are protected against voltages greater than the supply rails, up to ?55 V and +55 V. Source pins are protected against voltages between ?55 V and +55 V, in an unpowered state. Overvoltage detection with digital output indicates operating state of switches. Trench isolation guards against latch-up. Optimized for low on resistance and on-resistance flatness. The ADG5412F/ADG5413F can be operated from a dual?supply of ?5 V up to ?22 V or a single power supply of 8 V up to 44 V.Applications Analog input/output modules Process control/distributed control systems Data acquisition Instrumentation Avionics Automatic test equipment Communication systems Relay replacement

The ADG918/ADG919 are wideband switches using a CMOSprocess to provide high isolation and low insertion loss to1 GHz. The ADG918 is an absorptive (matched) switch having50 ? terminated shunt legs, whereas the ADG919 is a reflectiveswitch. These devices are designed such that the isolation ishigh over the dc to 1 GHz frequency range. They have on-boardCMOS control logic, thus eliminating the need for externalcontrolling circuitry. The control inputs are both CMOS andLVTTL compatible. The low power consumption of theseCMOS devices makes them ideally suited to wireless andgeneral-purpose high frequency switching applications.Product Highlights ?43 dB off isolation at 1 GHz. 0.8 dB insertion loss at 1 GHz. Tiny 8-lead MSOP/LFCSP.Applications Wireless communications General-purpose RF switching Dual-band applications High speed filter selection Digital transceiver front end switch IF switching Tuner modules Antenna diversity switching

The ADGM1304 is a wideband, single-pole, four-throw (SP4T) switch, fabricated using Analog Devices, Inc., microelectro-mechanical system (MEMS) switch technology. This technology enables a small form factor, wide RF bandwidth, highly linear, low insertion loss switch that is operational from 0 Hz/dc to 14 GHz, making the ADGM1304 an ideal solution for a wide range of RF and precision equipment switching needs.An integrated driver chip generates a high voltage to electrostatically actuate a switch that can be controlled by a parallel interface and a serial peripheral interface (SPI). All four switches are independently controllable.The device is packaged in a 24-lead, 5 mm ? 4 mm ? 0.95 mm, lead frame chip-scale package (LFCSP).To ensure optimum operation of the ADGM1304, the Critical Operational Requirements section must be followed exactly.The on resistance (RON) performance of the ADGM1304 is affected by device to device variation, channel to channel variation, cycle actuations, settling time post turn on, bias voltage, and temperature changes.APPLICATIONS Relay replacements Automatic test equipment: RF/high speed digital and mixed signals Load and probe boards: RF/high speed digital and mixed signals RF test instrumentation Reconfigurable filters and attenuators High performance RF switching

The ADGS1212 contains four independent single-pole/single-throw(SPST) switches. A serial peripheral interface (SPI)controls the switches. The SPI interface has robust error detectionfeatures such as cyclic redundancy check (CRC) error detection,invalid read/write address detection, and SCLK count errordetection.It is possible to daisy-chain multiple ADGS1212 devices together.Daisy-chain mode enables the configuration of multiple deviceswith minimal digital lines. The ADGS1212 can also operate inburst mode to decrease the time between SPI commands.iCMOS construction ensures ultralow power dissipation, makingthe device ideal for portable and battery-powered instruments.Each switch conducts equally well in both directions when on,and each switch has an input signal range that extends to thesupplies.In the off condition, signal levels up to the supplies are blocked.The ultralow capacitance and charge injection of these switchesmake them ideal solutions for data acquisition and sample-andholdapplications where low glitch and fast settling are required.Fast switching speed coupled with high signal bandwidth makethe device suitable for video signal switching.Multifunction pin names may be referenced by their relevantfunction only.Product Highlights SPI interface removes the need for parallel conversion, logic traces, and reduces the general-purpose input/output (GPIO) channel count. Daisy-chain mode removes additional logic traces when multiple devices are used. CRC error detection, invalid read/write address detection, and SCLK count error detection ensure a robust digital interface. CRC and error detection capabilities allow the ADGS1212 to be used in safety critical systems. Guaranteed break-before-make switching allows the the ADGS1212 to be used in multiplexer configurations with external wiring. The ADGS1212 1.8 V logic compatibility with 2.7 V ? VL ? 3.3 V Ultralow capacitance. <1 pC charge injection.Applications Automated test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Audio signal routing Video signal routing Communications systems

The ADM1062 Super Sequencer? is a configurable supervisory/sequencing device that offers a single-chip solution for supply monitoring and sequencing in multiple-supply systems. In addition to these functions, the ADM1062 integrates a 12-bit ADC and six 8-bit voltage output DACs. These circuits can be used to implement a closed-loop margining system that enables supply adjustment by altering either the feedback node or the reference of a dc-to-dc converter using the DAC outputs.For more information about the ADM1062 register map, refer to the AN-698 Application Note.?APPLICATIONS Central office systems Servers/routers Multivoltage system line cards DSP/FPGA supply sequencing In-circuit testing of margined supplies

The AD91641 is a high performance, 16-bit digital-to-analog converter (DAC) and direct digital synthesizer (DDS) that supports update rates to 6 GSPS. The DAC core is based on a quad-switch architecture coupled with a 2? interpolator filter that enables an effective DAC update rate of up to 12 GSPS in some modes. The high dynamic range and bandwidth makes these DACs ideally suited for the most demanding high speed radio frequency (RF) DAC applications.The DDS consists of a bank of 32, 32-bit numerically controlled oscillators (NCOs), each with its own phase accumulator.When combined with a 100 MHz serial peripheral interface (SPI) and fast hop modes, phase coherent fast frequency hopping (FFH) is enabled, with several modes to support multiple applications.In baseband mode, wide analog bandwidth capability combines with high dynamic range to support DOCSIS 3.1 cable infrastructure compliance from the minimum of one carrier up to the full maximum spectrum of 1.791 GHz of signal bandwidth. A 2? interpolator filter (FIR85) enables the AD9164 to be configured for lower data rates and converter clocking to reduce the overall system power and ease the filtering requirements. In Mix-Mode? operation, the AD9164 can reconstruct RF carriers in the second and third Nyquist zones up to 7.5 GHz while still maintaining exceptional dynamic range. The output current can be programmed from 8 mA to 38.76 mA. The AD9164 data interface consists of up to eight JESD204B serializer/deserializer (SERDES) lanes that are programmable in terms of lane speed and number of lanes to enable application flexibility.An SPI interface configures the AD9164 and monitors the status of all registers. The AD9164 is offered in a 165-ball, 8 mm ? 8 mm, 0.5 mm pitch CSP_BGA package, and a 169-ball, 11 mm ? 11 mm, 0.8 mm pitch, CSP_BGA package, including a leaded ball option.Product Highlights High dynamic range and signal reconstruction bandwidth supports RF signal synthesis of up to 7.5 GHz. Up to eight lanes JESD204B SERDES interface flexible in terms of number of lanes and lane speed. Bandwidth and dynamic range to meet DOCSIS 3.1 compliance and multiband wireless communications standards with margin.?Applications Broadband communications systems DOCSIS 3.1 CMTS/ video on demand (VOD)/edge quadrature amplitude modulation (EQAM) Wireless communications infrastructure W-CDMA, LTE, LTE-A, point to point

The AD91641 is a high performance, 16-bit digital-to-analog converter (DAC) and direct digital synthesizer (DDS) that supports update rates to 6 GSPS. The DAC core is based on a quad-switch architecture coupled with a 2? interpolator filter that enables an effective DAC update rate of up to 12 GSPS in some modes. The high dynamic range and bandwidth makes these DACs ideally suited for the most demanding high speed radio frequency (RF) DAC applications.The DDS consists of a bank of 32, 32-bit numerically controlled oscillators (NCOs), each with its own phase accumulator.When combined with a 100 MHz serial peripheral interface (SPI) and fast hop modes, phase coherent fast frequency hopping (FFH) is enabled, with several modes to support multiple applications.In baseband mode, wide analog bandwidth capability combines with high dynamic range to support DOCSIS 3.1 cable infrastructure compliance from the minimum of one carrier up to the full maximum spectrum of 1.791 GHz of signal bandwidth. A 2? interpolator filter (FIR85) enables the AD9164 to be configured for lower data rates and converter clocking to reduce the overall system power and ease the filtering requirements. In Mix-Mode? operation, the AD9164 can reconstruct RF carriers in the second and third Nyquist zones up to 7.5 GHz while still maintaining exceptional dynamic range. The output current can be programmed from 8 mA to 38.76 mA. The AD9164 data interface consists of up to eight JESD204B serializer/deserializer (SERDES) lanes that are programmable in terms of lane speed and number of lanes to enable application flexibility.An SPI interface configures the AD9164 and monitors the status of all registers. The AD9164 is offered in a 165-ball, 8 mm ? 8 mm, 0.5 mm pitch CSP_BGA package, and a 169-ball, 11 mm ? 11 mm, 0.8 mm pitch, CSP_BGA package, including a leaded ball option.Product Highlights High dynamic range and signal reconstruction bandwidth supports RF signal synthesis of up to 7.5 GHz. Up to eight lanes JESD204B SERDES interface flexible in terms of number of lanes and lane speed. Bandwidth and dynamic range to meet DOCSIS 3.1 compliance and multiband wireless communications standards with margin.?Applications Broadband communications systems DOCSIS 3.1 CMTS/ video on demand (VOD)/edge quadrature amplitude modulation (EQAM) Wireless communications infrastructure W-CDMA, LTE, LTE-A, point to point

The AD9173 is a high performance, dual, 16-bit digital-to-analog converter (DAC) that supports DAC sample rates to 12.6 GSPS. The device features an 8-lane, 15.4 Gbps JESD204B data input port, a high performance, on-chip DAC clock multiplier, and digital signal processing capabilities targeted at single-band and multiband direct to radio frequency (RF) wireless applications.The AD9173 features three complex data input channels per RF DAC that are bypassable. Each data input channel includes a configurable gain stage, an interpolation filter, and a channel numerically controlled oscillator (NCO) for flexible, multiband frequency planning. The device supports up to a 1.54 GSPS complex data rate per input channel and is capable of aggregating multiple complex input data streams up to a maximum complex data rate of 1.54 GSPS. Additionally, the AD9173 supports ultrawide bandwidth modes bypassing the channelizers to provide maximum data rates of up to 3.08 GSPS (with 11-bit resolution using 16-bit serializer/deserializer (SERDES) packing) and 3.4 GSPS (with 11-bit resolution using 12-bit SERDES packing).The AD9173 is available in a 144-ball BGA_ED package.APPLICATIONS Wireless communications infrastructure Multiband base station radios Microwave/E-band backhaul systems Instrumentation, automatic test equipment (ATE)PRODUCT HIGHLIGHTS Supports single-band and multiband wireless applications with three bypassable complex data input channels per RF DAC at a maximum complex input data rate of 1.54 GSPS with 11-bit resolution and 1.23 GSPS with 16-bit resolution. One independent NCO per input channel. Ultrawide bandwidth channel bypass modes supporting up to 3.08 GSPS data rates with 11-bit resolution, 16-bit SERDES packing and 3.4 GSPS with 11-bit resolution, 12-bit SERDES packing. Low power dual converter decreases the amount of power consumption needed in high bandwidth and multichannel applications.

The AD9208 is a dual, 14-bit, 3 GSPS analog-to-digital converter (ADC). The device has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. This product is designed to support communications applications capable of direct sampling wide bandwidth analog signals of up to 5 GHz. The ?3 dB bandwidth of the ADC input is 9 GHz. The AD9208 is optimized for wide input bandwidth, high sampling rate, excellent linearity, and low power in a small package.The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage referenceeases design considerations. The analog input and clock signals are differential inputs. The ADC data outputs are internally connected to four digital downconverters (DDCs) through a crossbar mux. Each DDC consists of up to five cascaded signalprocessing stages: a 48-bit frequency translator (numerically controlled oscillator (NCO)), and up to four half-band decimationfilters. The NCO has the option to select preset bands over the general-purpose input/output (GPIO) pins, which enables the selection of up to three bands. Operation of the AD9208 between the DDC modes is selectable via SPI-programmable profiles.In addition to the DDC blocks, the AD9208 has several functions that simplify the automatic gain control (AGC) function in acommunications receiver. The programmable threshold detector allows monitoring of the incoming signal power using the fast detect control bits in Register 0x0245 of the ADC. If the input signal level exceeds the programmable threshold, the fast detect indicator goes high. Because this threshold indicator has low latency, the user can quickly turn down the system gain to avoidan overrange condition at the ADC input. In addition to the fast detect outputs, the AD9208 also offers signal monitoring capability. The signal monitoring block provides additional information about the signal being digitized by the ADC.The user can configure the Subclasss 1 JESD204B-based high speed serialized output in a variety of one-lane, two-lane, four-lane, and eight-lane configurations, depending on the DDC configuration and the acceptable lane rate of the receiving logic device. Multidevice synchronization is supported through the SYSREF? and SYNCINB? input pins.The AD9208 has flexible power-down options that allow significant power savings when desired. All of these features canbe programmed using a 3-wire serial port interface (SPI).The AD9208 is available in a Pb-free, 196-ball BGA, specified over the ?40?C to +85?C ambient temperature range. Thisproduct is protected by a U.S. patent.Note that throughout this data sheet, multifunction pins, such as FD_A/GPIO_A0, are referred to either by the entire pin name or by a single function of the pin, for example, FD_A, when only that function is relevant.Product Highlights Wide, input ?3 dB bandwidth of 9 GHz supports direct radio frequency (RF) sampling of signals up to about 5 GHz. Four integrated, wideband decimation filter and NCO blocks supporting multiband receivers. Fast NCO switching enabled through GPIO pins. A SPI controls various product features and functions to meet specific system requirements. Programmable fast overrange detection and signal monitoring. On-chip temperature dioide for system thermal management. 12mm ? 12mm 196-Lead BGAApplications Diversity multiband, multimode digital receivers 3G/4G, TD-SCDMA, W-CDMA, GSM, LTE, LTE-A Electronic test and measurement systems Phased array radar and electronic warfare DOCSIS 3.0 CMTS upstream receive paths HFC digital reverse path receivers