The HMC741 is an InGaP Heterojunction Bipolar Transistor (HBT) Gain Block MMIC SMT amplifier covering 0.05 to 3 GHz. Packaged in an industry standard SOT89, the amplifier can be used as a cascadable 50 Ohm RF or IF gain stage as well as a PA or LO driver with up to +18.5 dBm output power. The HMC741 offers 20 dB of gain with a +42 dBm output IP3 at 200 MHz, and can operate directly from a +5V supply. The HMC741 exhibits excellent gain and output power stability over temperature, while requiring a minimal number of external bias components.Applications Cellular/3G & WiMAX/4G Fixed Wireless & WLAN CATV, Cable Modem & DBS Microwave Radio & Test Equipment IF & RF Applications

The HMC1021LP4E is an RMS power detector with an integrated high bandwidth envelope detector. The RMS output is a temperature compensated, monotonic, linear-in-dB representation of real RF signal power, measured over an input sensing range of 70 dB.The envelope detector provides an accurate voltage output which is linearly proportional to the envelope amplitude of the RF input signal for modulation bandwidths up to 150 MHz. The high bandwidth envelope detection of the HMC1021LP4E makes it ideal for detecting broadband and high crest factor RF signals commonly used in CDMA2000, WCDMA, and LTE systems. Additionally, the instantaneous envelope output can be used to create fast, excessive RF power protection, PA linearization, and efficiency enhancing envelopetracking PA implementations.The HMC1021LP4E?s RMS detector integration bandwidth is digitally programmable via input pins SCI1-4 over a range of more than 4 decades. This allows the user to dynamically set the operation bandwidth and also permits the detection of different types of modulations on the same platform.The HMC1021LP4E features an internal op-amp at the RMS output stage, which accommodates slope and intercept adjustments and supports a wide range of applications.Applications Log ?> Root-Mean-Square (RMS) Conversion Tx/Rx Signal Strength Indication (TSSI / RSSI) RF Power Amplifier Efficiency Control Receiver Automatic Gain Control Transmitter Power Control Envelope Tracking PA Linearization

The HMC948LP3E Logarithmic Detector converts RF signals at its input, to a proportional DC voltage at its output. The HMC948LP3E employs successive compression topology which delivers high dynamic range over a wide input frequency range. As the input power is increased, successive amplifiers move into saturation one by one creating an approximation of the logarithm function.The output of a series of square law detectors is summed, converted into the voltage domain and buffered to drive the LOG OUT output. The HMC948LP3E provides a nominal logarithmic slope of +14.2 mV/dB and an intercept of -111 dBm at 23 GHz. Ideal as a log detector for high volume microwave radio and VSAT applications, the HMC948LP3E is housed in a compact 3x3 mm RoHS compliant SMT plastic package.Applications Point-to-Point Microwave Radio VSAT Wideband Power Monitoring Receiver Signal Strength?Indication (RSSI) Test & Measurement

The AD6674 is a 385 MHz bandwidth mixed-signal intermediate frequency (IF) receiver. It consists of two, 14-bit 1.0 GSPS/750 MSPS/500 MSPS analog-to-digital converters (ADC) and various digital signal processing blocks consisting of four wideband DDCs, an NSR, and VDR monitoring. It has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. This product is designed to support communications applications capable of sampling wide bandwidth analog signals of up to 2 GHz. The AD6674 is optimized for wide input bandwidth, high sampling rate, excellent linearity, and low power in a small package.The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations.Applications Diversity multiband, multimode digital receivers 3G/4G, TD-SCDMA, W-CDMA, GSM, LTE, LTE-A DOCSIS 3.0 CMTS upstream receive paths HFC digital reverse path receivers

The AD6674 is a 385 MHz bandwidth mixed-signal intermediate frequency (IF) receiver. It consists of two, 14-bit 1.0 GSPS/750 MSPS/500 MSPS analog-to-digital converters (ADC) and various digital signal processing blocks consisting of four wideband DDCs, an NSR, and VDR monitoring. It has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. This product is designed to support communications applications capable of sampling wide bandwidth analog signals of up to 2 GHz. The AD6674 is optimized for wide input bandwidth, high sampling rate, excellent linearity, and low power in a small package.The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations.Applications Diversity multiband, multimode digital receivers 3G/4G, TD-SCDMA, W-CDMA, GSM, LTE, LTE-A DOCSIS 3.0 CMTS upstream receive paths HFC digital reverse path receivers

The AD6674 is a 385 MHz bandwidth mixed-signal intermediate frequency (IF) receiver. It consists of two, 14-bit 1.0 GSPS/750 MSPS/500 MSPS analog-to-digital converters (ADC) and various digital signal processing blocks consisting of four wideband DDCs, an NSR, and VDR monitoring. It has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. This product is designed to support communications applications capable of sampling wide bandwidth analog signals of up to 2 GHz. The AD6674 is optimized for wide input bandwidth, high sampling rate, excellent linearity, and low power in a small package.The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations.Applications Diversity multiband, multimode digital receivers 3G/4G, TD-SCDMA, W-CDMA, GSM, LTE, LTE-A DOCSIS 3.0 CMTS upstream receive paths HFC digital reverse path receivers

The AD8013 is a low power, single supply, triple video amplifier. Each of the three amplifiers has 30 mA of output current, and is optimized for driving one back terminated video load (150 ?) each. Each amplifier is a current feedback amp-lifier and features gain flatness of 0.1 dB to 60 MHz while offering differential gain and phase error of 0.02% and 0.06? This makes the AD8013 ideal for broadcast and professional video electronics.The AD8013 offers low power of 4 mA per amplifier max and runs on a single +5 V to +13 V power supply. The outputs of each amplifier swing to within one volt of either supply rail to easily accommodate video signals. The AD8013 is unique among current feedback op amps by virtue of its large capacitive load drive. Each op amp is capable of driving large capacitive loads while still achieving rapid settling time. For instance it can settle in 18 ns driving a resistive load, and achieves 40 ns (0.1%) settling while driving 200 pF.The outstanding bandwidth of 150 MHz along with 1000 V/?s of slew rate make the AD8013 useful in many general purpose high speed applications where a single +5 V or dual power supplies up to ?6.5 V are required. Furthermore the AD8013's high speed disable function can be used to power down the amplifier or to put the output in a high impedance state. This can then be used in video multiplexing applications. The AD8013 is available in the industrial temperature range of -40?C to +85?C.

The AD8129/AD8130 are designed as receivers for the transmission of high speed signals over twisted-pair cables to work with the AD8131 or AD8132 drivers. Either can be used for analog or digital video signals and for high speed data transmission. The AD8129/AD8130 are differential-to-single-ended amplifiers with extremely high CMRR at high frequency. Therefore, they canalso be effectively used as high speed instrumentation amps or for converting differential signals to single-ended signals.The AD8129 is a low noise, high gain (10 or greater) version intended for applications over very long cables, where signal attenuation is significant. The AD8130 is stable at a gain of 1 and can be used for applications where lower gains are required. Both have user-adjustable gain to help compensate for losses in the transmission line. The gain is set by the ratio of two resistor values. The AD8129/AD8130 have very high input impedance on both inputs, regardless of the gain setting. The AD8129/AD8130 have excellent common-mode rejection (70 dB @ 10 MHz), allowing the use of low cost, unshielded twisted-pair cables without fear of corruption by external noise sources or crosstalk. The AD8129/AD8130 have a wide power supply range from single +5 V to ?12 V, allowing wide common-mode and differential-mode voltage ranges while maintaining signal integrity. The wide common-mode voltage range enables the driver-receiver pair to operate without isolation transformers in many systems where the ground potential difference between drive and receive locations is many volts. The AD8129/AD8130 have considerable cost and performance improvements over op amps and other multiamplifier receiving solutions. Applications High speed differential line receivers Differential-to-single-ended converters High speed instrumentation amps Level shifting

The AD8244 is a precision, low power, FET input, quad unity-gain buffer that is designed to isolate very large source impedances from the rest of the signal chain. The 2 pA maximum bias current, near zero current noise, and 10 T? input impedance introduce almost no error, even with source impedance well into the megaohms.Many traditional operational amplifier pinouts have a supply pin that is next to the noninverting input. A guard trace must be routed between these pins to avoid leakage currents much larger than the bias current of a FET input op amp. Guard traces can be routed between pins for large packages, such as DIP or even SOIC; however, the board area consumed by these packages is prohibitive for many modern applications. The AD8244 solves this problem with a unique pinout that physically separates the high impedance inputs from the low impedance supplies and outputs of the other buffers. This configuration simplifies guarding while reducing board space, allowing high performance and high density in the same design.The AD8244 design is focused on solving problems specific to buffers. This includes close channel-to-channel matching which allows channels of the AD8244 to be used in differential signal chains with minimal error. With its low voltage noise, wide supply range, and high precision, the AD8244 is also flexible enough to provide high performance anywhere a unity-gain buffer is needed, even with low source resistance.The AD8244 is specified over the industrial temperature range of ?40?C to +85?C. It is available in a 10-lead MSOP package.APPLICATIONSBiopotential electrodesMedical instrumentationHigh impedance sensor conditioningFiltersPhotodiode amplifiers

The AD8251 is an instrumentation amplifier with digitally programmable gains that has G? input impedance, low output noise, and low distortion, making it suitable for interfacing with sensors and driving high sample rate analog-to-digital converters (ADCs). It has high bandwidth of 10 MHz, low THD of ?110 dB, and fast settling time of 785 ns (maximum) to 0.001%. Offset drift and gain drift are guaranteed to 1.8 ?V/?C and 10 ppm/?C, respectively, for G = 8. In addition to its wide input common voltage range, it boasts a high common-mode rejection of 80 dB at G = 1 from dc to 50 kHz. The combination of precision dc performance coupled with high speed capabilities makes the AD8251 an excellent candidate for data acquisition. Furthermore, this monolithic solution simplifies design and manufacturing and boosts performance of instrumentation by maintaining a tight match of internal resistors and amplifiers. The AD8251 user interface consists of a parallel port that allows users to set the gain in one of two different ways (see Figure 1 in data sheet for the functional block diagram). A 2-bit word sent via a bus can be latched using the WR input. An alternative is to use transparent gain mode where the state of logic levels at the gain port determines the gain. The AD8251 is available in a 10-lead MSOP package and is specified over the ?40?C to +85?C temperature range, making it an excellent solution for applications where size and packing density are important considerations. ApplicationsData acquisition Biomedical analysis Test and measurement