The AD8244 is a precision, low power, FET input, quad unity-gain buffer that is designed to isolate very large source impedances from the rest of the signal chain. The 2 pA maximum bias current, near zero current noise, and 10 T? input impedance introduce almost no error, even with source impedance well into the megaohms.Many traditional operational amplifier pinouts have a supply pin that is next to the noninverting input. A guard trace must be routed between these pins to avoid leakage currents much larger than the bias current of a FET input op amp. Guard traces can be routed between pins for large packages, such as DIP or even SOIC; however, the board area consumed by these packages is prohibitive for many modern applications. The AD8244 solves this problem with a unique pinout that physically separates the high impedance inputs from the low impedance supplies and outputs of the other buffers. This configuration simplifies guarding while reducing board space, allowing high performance and high density in the same design.The AD8244 design is focused on solving problems specific to buffers. This includes close channel-to-channel matching which allows channels of the AD8244 to be used in differential signal chains with minimal error. With its low voltage noise, wide supply range, and high precision, the AD8244 is also flexible enough to provide high performance anywhere a unity-gain buffer is needed, even with low source resistance.The AD8244 is specified over the industrial temperature range of ?40?C to +85?C. It is available in a 10-lead MSOP package.APPLICATIONSBiopotential electrodesMedical instrumentationHigh impedance sensor conditioningFiltersPhotodiode amplifiers

The AD8251 is an instrumentation amplifier with digitally programmable gains that has G? input impedance, low output noise, and low distortion, making it suitable for interfacing with sensors and driving high sample rate analog-to-digital converters (ADCs). It has high bandwidth of 10 MHz, low THD of ?110 dB, and fast settling time of 785 ns (maximum) to 0.001%. Offset drift and gain drift are guaranteed to 1.8 ?V/?C and 10 ppm/?C, respectively, for G = 8. In addition to its wide input common voltage range, it boasts a high common-mode rejection of 80 dB at G = 1 from dc to 50 kHz. The combination of precision dc performance coupled with high speed capabilities makes the AD8251 an excellent candidate for data acquisition. Furthermore, this monolithic solution simplifies design and manufacturing and boosts performance of instrumentation by maintaining a tight match of internal resistors and amplifiers. The AD8251 user interface consists of a parallel port that allows users to set the gain in one of two different ways (see Figure 1 in data sheet for the functional block diagram). A 2-bit word sent via a bus can be latched using the WR input. An alternative is to use transparent gain mode where the state of logic levels at the gain port determines the gain. The AD8251 is available in a 10-lead MSOP package and is specified over the ?40?C to +85?C temperature range, making it an excellent solution for applications where size and packing density are important considerations. ApplicationsData acquisition Biomedical analysis Test and measurement

The AD8260 includes a high current driver, usable as atransmitter, and a low noise digitally programmable variablegain amplifier (DGA), useable as a receiver.The receiver section consists of a single-ended input preamplifier,and linear-in-dB, differential-output DGA. The receiver hasa small signal ?3 dB bandwidth of 230 MHz; the driver smallsignal bandwidth is 195 MHz. The driver delivers ?300 mA,well suited for driving low impedance loads, even whenconnected to a 3.3 V supply.The AD8260 DGA is ideal for trim applications and has a gainspan of 30 dB, in 3 dB steps. Excellent bandwidth uniformity ismaintained across the entire frequency range. The low output-referrednoise of the DGA is advantageous in driving highspeed ADCs. The differential output facilitates the interface tomodern low voltage high speed ADCs.Single-supply and dual-supply operation makes the part versatileand enables gain control of negative-going pulses, such as thosegenerated by photodiodes or photo-multiplier tubes, as well asprocessing band-pass signals on a single supply. For maximumdynamic range, it is essential that the part be ac-coupled whenoperating on a single supply.The AD8260 preamplifier (PrA) is configured with externalresistors for gains greater than 6 dB and can be inverting ornoninverting. The DGA is characterized with a noninvertingpreamplifier gain of 2?. The attenuator has a range of 30 dB andthe output amplifier has a gain of 8? (18.06 dB). The lowestnoninverting gain range is ?6 dB to +24 dB and shifts up withincreased preamplifier gain. The gain is controlled via a parallelport (Pin GNS0 to Pin GNS3) with 10 gain steps of 3 dB percode. The preamplifier and DGA are disabled for any code thatis not assigned a gain step.The AD8260 can operate with single or dual supplies from 3.3 Vto ?5 V. An internal buffer normally provides a split supplyreference for single-supply operation; an external reference canalso be used when the VMID buffer is shut down.The operating temperature range is ?40?C to +105?C. TheAD8260 is available in a 5 mm ? 5 mm, 32-lead LFCSP.Applications Digital AGC systems Tx/Rx signal processing Power line transceivers

The AD9114/AD9115/AD9116/AD9117 are pin-compatible dual, 8-/10-/12-/14-bit, low power digital-to-analog converters (DACs) that provide a sample rate of 125 MSPS. These TxDAC? converters are optimized for the transmit signal path of communication systems. All the devices share the same interface, package, and pinout, providing an upward or downward component selection path based on performance, resolution, and cost.The AD9114/AD9115/AD9116/AD9117 offer exceptional ac and dc performance and support update rates up to 125 MSPS.The flexible power supply operating range of 1.8 V to 3.3 V and low power dissipation of the AD9114/AD9115/AD9116/AD9117 make them well suited for portable and low power applications.PRODUCT HIGHLIGHTS Low Power. DACs operate on a single 1.8 V to 3.3 V supply; total power consumption reduces to 225 mW at 100 MSPS. Sleep and power-down modes are provided for low power idle periods. CMOS Clock Input. High speed, single-ended CMOS clock input supports a 125 MSPS conversion rate. Easy Interfacing to Other Components. Adjustable output common mode from 0 V to 1.2 V allows for easy interfacing to other components that accept common-mode levels greater than 0 V.?APPLICATIONS Wireless infrastructures Picocell, femtocell base stations Medical instrumentation Ultrasound transducer excitation Portable instrumentation Signal generators, arbitrary waveform generators

The AD9122 is a dual 16-bit, high dynamic range, digital-to-analog converter (DAC) that provides a sample rate of 1200 MSPS, permitting a multicarrier generation up to the Nyquist frequency. It includes features optimized for direct conversion transmit applications, including complex digital modulation, and gain and offset compensation. The DAC outputs are optimized to interface seamlessly with analog quadrature modulators, such as the ADL537x F-MOD series from Analog Devices, Inc. A 4-wire serial port interface provides for programming/readback of many internal parameters. Full-scale output current can be programmed over a range of 8.7 mA to 31.7 mA. The AD9122 comes in a 72-lead LFCSP.The AD9122-EP supports defense and aerospace applications (AQEC).Product Highlights Ultralow noise and intermodulation distortion (IMD) enable high quality synthesis of wideband signals from baseband to high intermediate frequencies. A proprietary DAC output switching technique enhances dynamic performance. The current outputs are easily configured for various single-ended or differential circuit topologies. Flexible LVDS digital interface allows the standard 32-wire bus to be reduced to ? or ? of the width.Applications Wireless infrastructure W-CDMA, CDMA2000, TD-SCDMA, WiMAX, GSM, LTE Digital high or low IF synthesis Transmit diversity Wideband communications: LMDS/MMDS, point-to-point

The AD9122 is a dual 16-bit, high dynamic range, digital-to-analog converter (DAC) that provides a sample rate of 1200 MSPS, permitting a multicarrier generation up to the Nyquist frequency. It includes features optimized for direct conversion transmit applications, including complex digital modulation, and gain and offset compensation. The DAC outputs are optimized to interface seamlessly with analog quadrature modulators, such as the ADL537x F-MOD series from Analog Devices, Inc. A 4-wire serial port interface provides for programming/readback of many internal parameters. Full-scale output current can be programmed over a range of 8.7 mA to 31.7 mA. The AD9122 comes in a 72-lead LFCSP.The AD9122-EP supports defense and aerospace applications (AQEC).Product Highlights Ultralow noise and intermodulation distortion (IMD) enable high quality synthesis of wideband signals from baseband to high intermediate frequencies. A proprietary DAC output switching technique enhances dynamic performance. The current outputs are easily configured for various single-ended or differential circuit topologies. Flexible LVDS digital interface allows the standard 32-wire bus to be reduced to ? or ? of the width.Applications Wireless infrastructure W-CDMA, CDMA2000, TD-SCDMA, WiMAX, GSM, LTE Digital high or low IF synthesis Transmit diversity Wideband communications: LMDS/MMDS, point-to-point

The AD9162 is a high performance, 16-bit digital-to-analog converter (DAC) that supports data rates to 6 GSPS. The DAC core is based on a quad-switch architecture coupled with a 2? interpolator filter that enables an effective DAC update rate of up to 12 GSPS in some modes. The high dynamic range and bandwidth makes these DACs ideally suited for the most demanding high speed radio frequency (RF) DAC applications.In baseband mode, wide bandwidth capability combines with high dynamic range to support DOCSIS 3.1 cable infrastructure compliance from the minimum of two carriers to full maximum spectrum of 1.794 GHz. A 2? interpolator filter (FIR85) enables the AD9161/AD9162 to be configured for lower data rates and converter clocking to reduce the overall system power and ease the filtering requirements. In Mix-Mode? operation, the AD9161/AD9162 can reconstruct RF carriers in the second and third Nyquist zones up to 7.5 GHz while still maintaining exceptional dynamic range. The output current can be programmed from 8 mA to 38.76 mA. The AD9161/AD9162 data interface consists of up to eight JESD204B serializer/deserializer (SERDES) lanes that are programmable in terms of lane speed and number of lanes to enable application flexibility.A serial peripheral interface (SPI) can configure the AD9161/AD9162 and monitor the status of all registers. The AD9161/AD9162 are offered in an 165-ball, 8.0 mm ? 8.0 mm, 0.5 mm pitch, CSP_BGA package and in an 169-ball, 11 mm ? 11 mm, 0.8 mm pitch, CSP_BGA package, including a leaded ball option for the AD9162.Product Highlights High dynamic range and signal reconstruction bandwidth supports RF signal synthesis of up to 7.5 GHz. Up to eight lanes JESD204B SERDES interface flexible in terms of number of lanes and lane speed. Bandwidth and dynamic range to meet DOCSIS 3.1 compliance with margin.Applications Broadband communications systems DOCSIS 3.1 cable modem termination system (CMTS)/video on demand (VOD)/edge quadrature amplitude modulation (EQAM) Wireless communications infrastructure W-CDMA, LTE, LTE-A, point to point Instrumentation, automatic test equipment (ATE) Radars and jammers

The AD9208 is a dual, 14-bit, 3 GSPS analog-to-digital converter (ADC). The device has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. This product is designed to support communications applications capable of direct sampling wide bandwidth analog signals of up to 5 GHz. The ?3 dB bandwidth of the ADC input is 9 GHz. The AD9208 is optimized for wide input bandwidth, high sampling rate, excellent linearity, and low power in a small package.The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage referenceeases design considerations. The analog input and clock signals are differential inputs. The ADC data outputs are internally connected to four digital downconverters (DDCs) through a crossbar mux. Each DDC consists of up to five cascaded signalprocessing stages: a 48-bit frequency translator (numerically controlled oscillator (NCO)), and up to four half-band decimationfilters. The NCO has the option to select preset bands over the general-purpose input/output (GPIO) pins, which enables the selection of up to three bands. Operation of the AD9208 between the DDC modes is selectable via SPI-programmable profiles.In addition to the DDC blocks, the AD9208 has several functions that simplify the automatic gain control (AGC) function in acommunications receiver. The programmable threshold detector allows monitoring of the incoming signal power using the fast detect control bits in Register 0x0245 of the ADC. If the input signal level exceeds the programmable threshold, the fast detect indicator goes high. Because this threshold indicator has low latency, the user can quickly turn down the system gain to avoidan overrange condition at the ADC input. In addition to the fast detect outputs, the AD9208 also offers signal monitoring capability. The signal monitoring block provides additional information about the signal being digitized by the ADC.The user can configure the Subclasss 1 JESD204B-based high speed serialized output in a variety of one-lane, two-lane, four-lane, and eight-lane configurations, depending on the DDC configuration and the acceptable lane rate of the receiving logic device. Multidevice synchronization is supported through the SYSREF? and SYNCINB? input pins.The AD9208 has flexible power-down options that allow significant power savings when desired. All of these features canbe programmed using a 3-wire serial port interface (SPI).The AD9208 is available in a Pb-free, 196-ball BGA, specified over the ?40?C to +85?C ambient temperature range. Thisproduct is protected by a U.S. patent.Note that throughout this data sheet, multifunction pins, such as FD_A/GPIO_A0, are referred to either by the entire pin name or by a single function of the pin, for example, FD_A, when only that function is relevant.Product Highlights Wide, input ?3 dB bandwidth of 9 GHz supports direct radio frequency (RF) sampling of signals up to about 5 GHz. Four integrated, wideband decimation filter and NCO blocks supporting multiband receivers. Fast NCO switching enabled through GPIO pins. A SPI controls various product features and functions to meet specific system requirements. Programmable fast overrange detection and signal monitoring. On-chip temperature dioide for system thermal management. 12mm ? 12mm 196-Lead BGAApplications Diversity multiband, multimode digital receivers 3G/4G, TD-SCDMA, W-CDMA, GSM, LTE, LTE-A Electronic test and measurement systems Phased array radar and electronic warfare DOCSIS 3.0 CMTS upstream receive paths HFC digital reverse path receivers

The AD9212 is an octal, 10-bit, 40 MSPS/65 MSPS ADC with an on-chip sample-and-hold circuit designed for low cost, low power,small size, and ease of use. Operating at a conversion rate of up to 65 MSPS, it is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performanceoperation. No external reference or driver components arerequired for many applications.The ADC automatically multiplies the sample rate clock forthe appropriate LVDS serial data rate. A data clock (DCO)for capturing data on the output and a frame clock (FCO) for signaling a new output byte are provided. Individual channelpower-down is supported and typically consumes less than 2 mW when all channels are disabled.The ADC contains several features designed to maximizeflexibility and minimize system cost, such as programmableclock and data alignment and programmable digital test patterngeneration. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).The AD9212 is available in a RoHS-compliant, 64-lead LFCSP. It isspecified over the industrial temperature range of ?40?C to +85?C.PRODUCT HIGHLIGHTS Small Footprint. Eight ADCs are contained in a small package. Low Power of 100 mW per Channel at 65 MSPS. Ease of Use. A data clock output (DCO) operates up to 300 MHz and supports double data rate (DDR) operation. User Flexibility. SPI control offers a wide range of flexible features to meet specific system requirements. Pin-Compatible Family. This includes the AD9222 (12-bit) and AD9252 (14-bit).APPLICATIONS Medical imaging and nondestructive ultrasound Portable ultrasound and digital beam-forming systems Quadrature radio receivers Diversity radio receivers Tape drives Optical networking Test equipment

The AD9228 is a quad, 12-bit, 40/65 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. The product operates at a conversion rate of up to 65 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical. The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications. The ADC automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for signaling a new output byte are provided. Individual channel power-down is supported and typically consumes The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI). The AD9228 is available in an RoHS compliant, 48-lead LFCSP. It is specified over the industrial temperature range of ?40?C to +85?C.PRODUCT HIGHLIGHTSSmall Footprint. Four ADCs are contained in a small, space-saving package. Low power of 119 mW/channel at 65 MSPS. Ease of Use. A data clock output (DCO) is provided that operates at frequencies of up to 390 MHz and supports double data rate (DDR) operation.User Flexibility. The SPI control offers a wide range of flexible features to meet specific system requirements. Pin-Compatible Family. This includes the AD9287 (8-bit), AD9219 (10-bit), and AD9259 (14-bit).?APPLICATIONSMedical imaging and nondestructive ultrasound Portable ultrasound and digital beam-forming systemsQuadrature radio receivers Diversity radio receivers Tape drives Optical networking Test equipment