The AD8352 is a high performance differential amplifier optimized for RF and IF applications. It achieves better than 80 dB SFDR performance at frequencies up to 200 MHz, and 65 dB beyond 500 MHz, making it an ideal driver for high speed 12-bit to 16-bit analog-to-digital converters (ADCs). Unlike other wideband differential amplifiers, the AD8352 has buffers that isolate the gain setting resistor(RG) from the signal inputs. As a result, the AD8352 maintains a constant 3 k? input resistance for gains of 3 dB to 25 dB, easing matching and input drive requirements. The AD8352 has a nominal 100 ? differential output resistance.The device is optimized for wideband, low distortion performance at frequencies beyond 500 MHz. These attributes, together with its wide gain adjust capability, make this device the amplifier of choice for general-purpose IF and broadband applications where low distortion, noise, and power are critical. It is ideally suited for driving not only ADCs but also mixers, pin diode attenuators, surface acoustic wave (SAW) filters, and multielement discrete devices. The device is available in a compact 3 mm ? 3 mm, 16-lead LFCSP and operates over a temperature range of ?40?C to +85?C.ApplicationsDifferential ADC driversSingle-ended-to-differential conversionRF/IF gain blocksSAW filter interfacing

The AD9082-FMCA-EBZ evaluation board includes all of the support circuitry required to operate the AD9082 in various modes and configurations. The application software used to interface with the device is also described. The AD9082-FMCA-EBZ evaluation board connects to the Analog Devices, Inc., ADS9-V2EBZ for evaluation with the ACE software. The boards can also interface to commercially available field- programmable gate array (FPGA) development boards from Xilinx® or Intel®. Information on how to use these platforms to evaluate the AD9081 or AD9082 is available in the Using the AD-FMC-SDCARD section. The ACE software allows the user to set up the AD9081 or AD9082 in various modes, and capture analog-to-digital converter (ADC) data for analysis. The PGDownloaderLite software generates and transmits vectors to the DACs, which can then be sent to a spectrum analyzer for further analysis. For more details, see the AD9081 and AD9082 data sheets, which must be consulted in conjunction with this user guide when using the evaluation boards.

The AD9119/AD9129 are high performance, 11-/14-bit RF digital-to-analog converters (DACs) supporting data rates up to 2.85 GSPS. The DAC core is based on a quad-switch architecture that enables dual-edge clocking operation, effectively increasing the DAC update rate to 5.7 GSPS when configured for Mix-Mode? or 2? interpolation. The high dynamic range and bandwidth enable multicarrier generation up to 4.2 GHz.In baseband mode, wide bandwidth capability combines with high dynamic range to support from 1 to 158 contiguous carriers for CATV infrastructure applications. A choice of two optional 2? interpolation filters is available to simplify the postreconstruction filter by effectively increasing the DAC update rate by a factor of 2. In Mix-Mode operation, the AD9119/AD9129 can reconstruct RF carriers in the second and third Nyquist zone while still maintaining exceptional dynamic range up to 4.2 GHz. The high performance NMOS DAC core features a quad-switch architecture that enables industry-leading direct RF synthesis performance with minimal loss in output power. The output current can be programmed over a range of 9.5 mA to 34.4 mA.The AD9119/AD9129 include several features that may further simplify system integration. A dual-port, source synchronous LVDS interface simplifies the data interface to a host FPGA/ASIC. A differential frame/parity bit is also included to monitor the integrity of the interface. On-chip delay locked loops (DLLs) optimize timing between different clock domains.A serial peripheral interface (SPI) configures the AD9119/ AD9129 and monitors the status of readback registers. The AD9119/AD9129 are manufactured on a 0.18 ?m CMOS process and operates from +1.8 V and ?1.5 V supplies. It is supplied in a 160-ball chip scale package ball grid array.Product Highlights High dynamic range and signal reconstruction bandwidth support RF signal synthesis of up to 4.2 GHz. Dual-port interface with double data rate (DDR) LVDS data receivers supports 2850 MSPS maximum conversion rate. Manufactured on a CMOS process; a proprietary switching technique enhances dynamic performance.Applications Broadband communications systems CMTS/VOD Wireless infrastructure: W-CDMA, LTE, point-to-point Instrumentation, automatic test equipment (ATE) Radar, jammers

The AD9162 is a high performance, 16-bit digital-to-analog converter (DAC) that supports data rates to 6 GSPS. The DAC core is based on a quad-switch architecture coupled with a 2? interpolator filter that enables an effective DAC update rate of up to 12 GSPS in some modes. The high dynamic range and bandwidth makes these DACs ideally suited for the most demanding high speed radio frequency (RF) DAC applications.In baseband mode, wide bandwidth capability combines with high dynamic range to support DOCSIS 3.1 cable infrastructure compliance from the minimum of two carriers to full maximum spectrum of 1.794 GHz. A 2? interpolator filter (FIR85) enables the AD9161/AD9162 to be configured for lower data rates and converter clocking to reduce the overall system power and ease the filtering requirements. In Mix-Mode? operation, the AD9161/AD9162 can reconstruct RF carriers in the second and third Nyquist zones up to 7.5 GHz while still maintaining exceptional dynamic range. The output current can be programmed from 8 mA to 38.76 mA. The AD9161/AD9162 data interface consists of up to eight JESD204B serializer/deserializer (SERDES) lanes that are programmable in terms of lane speed and number of lanes to enable application flexibility.A serial peripheral interface (SPI) can configure the AD9161/AD9162 and monitor the status of all registers. The AD9161/AD9162 are offered in an 165-ball, 8.0 mm ? 8.0 mm, 0.5 mm pitch, CSP_BGA package and in an 169-ball, 11 mm ? 11 mm, 0.8 mm pitch, CSP_BGA package, including a leaded ball option for the AD9162.Product Highlights High dynamic range and signal reconstruction bandwidth supports RF signal synthesis of up to 7.5 GHz. Up to eight lanes JESD204B SERDES interface flexible in terms of number of lanes and lane speed. Bandwidth and dynamic range to meet DOCSIS 3.1 compliance with margin.Applications Broadband communications systems DOCSIS 3.1 cable modem termination system (CMTS)/video on demand (VOD)/edge quadrature amplitude modulation (EQAM) Wireless communications infrastructure W-CDMA, LTE, LTE-A, point to point Instrumentation, automatic test equipment (ATE) Radars and jammers

Demonstration circuit 2290A features the LTC2387 family. With up to 15Msps, these differential input, single channel, 18-/16-Bit, serial, high speed successive approximation register (SAR) ADCs are available in a 32-Pin QFN package. The LTC2387 family has an internal 20ppm/°C reference and a serial LVDS interface. The demo manual refers to the LTC2387 but applies to all members of the family, the only difference being the sample rate and the number of bits. The DC2290A demonstrates the AC performance of the LTC2387 in conjunction with the DC718 data collection board. Differential amplifier demo boards are available separately that provide amplification of low level differential signals if required. Alternatively, by connecting the DC2290A into a customer application the performance of the LTC2387 can be evaluated directly in that circuit.

Demonstration circuit 2310A is optimized for evaluation of the LTC5549 passive double-balanced mixer with integrated LO frequency doubler. Its RF port is matched to 50Ω from 2GHz to 13.6GHz with 9dB return loss, and the LO port is matched to 50Ω from 1GHz to 12GHz with 10dB return loss. The IF output is matched to 50Ω from 700MHz to 6GHz with 10dB return loss. The LTC5549 can be used for upconverting and downconverting applications.

Demonstration circuit 2321A is a low power wireless sensor node development platform equipped with an E-ink display for user feedback. The system is capable of monitoring and managing its available energy, logging information from sensors and sharing this data over a wireless network. The board is designed to connect to the DC2344A or DC2509A energy harvesting demonstration boards which output a regulated power supply as well as status information from energy harvesting ICs and their backup batteries. Two coulomb counters on the DC2321A allow the processor to monitor the energy output of these batteries which will vary depending on the amount of energy which can be harvested from the system’s surroundings. A DC2274A-A SmartMesh Manager must be used in order to evaluate the networking features of the DC2321A.

Demonstration circuits 2324A-A, 2324A-B, and 2324A-C are active clamp forward converters with synchronous rectification featuring the LT3753. These circuits were designed to demonstrate the high level of performance, efficiency and small solution size attainable using this part. They operate at 240kHz. The DC2324A-A produces a 24V/5A output from an input voltage range of 36V to 72V. The DC2324A-B produces a 24V/5A output from an input voltage range of 18V to 36V. The DC2324A-C produces a 24V/4A output from an input voltage range of 9V to 18V, making it suitable for telecom, industrial and other isolated power supply applications. They all have an eighth-brick footprint area. Synchronous rectification helps to attain efficiency exceeding 94% (exceeding 95% for the DC2324A-A and DC2324A-B).

The LTM8067 is a 2kVAC isolated flyback ?Module? (power module) DC/DC converter. Included in the package are the switching controller, power switches, transformer, and all support components. Operating over an input voltage range of 3V to 40V, the LTM8067 supports an output voltage range of 2.5V to 24V, set by a single resistor. Only output and input capacitors are needed to finish the design.The LTM8067 is packaged in a thermally enhanced, compact (9mm ? 11.25mm ? 4.92mm) overmolded ball grid array (BGA) package suitable for automated assembly by standard surface mount equipment. The LTM8067 is available with SnPb or RoHS compliant terminal finish.APPLICATIONS Isolated IGBT Gate Drive Industrial Sensors Industrial Switches Test and Measurement Equipment

Demonstration circuit 2365A highlights the LTC2358 family of buffered input ADCs. The LTC2358/LTC2357/LTC2353/LTC2333 are low noise, high speed, 16-/18-bit successive approximation register (SAR) ADCs with integrated front end buffers. These ADCs accept a wide common mode range. Pico-amp inputs and high CMRR enable these ADCs to connect directly to a wide range of sensors without compromising measurement accuracy. The demo manual refers to the LTC2358-18 but applies to all parts in the family, the only differences being the number of bits, number of channels and the maximum sample rate. The LTC2358-18 has a flexible SoftSpan™ interface that allows conversion-by-conversion control of the input voltage span on a per-channel basis. An internal 2.048V reference and 2X buffer simplify basic operation while an external reference can be used to increase the input range and the SNR of the ADC.