The ADL5725 is a narrow-band, high performance, low noise amplifier (LNA) targeting microwave radio link receiver designs. The monolithic silicon germanium (SiGe) design is optimized for microwave radio link bands ranging from 17.7 GHz to 19.7 GHz. The unique design offers a single-ended 50 ? input impedance and provides a 100 ? balanced differential output that is ideal for driving Analog Devices, Inc., differential downconverters and radio frequency (RF) sampling analog-to-digital converters (ADCs). This low noise amplifier provides noise figure performance that, in the past, required more expensive three-five (III-V) compounds process technology to achieve.The ADL5721 and ADL5723 to ADL5726 family of narrow-band LNAs are each packaged in a tiny, thermally enhanced, 2.00 mm ? 2 mm LFCSP package. The ADL5721 and ADL5723 to ADL5726 family operates over the temperature range of ?40?C to +85?C.Applications Point to point microwave radios Instrumentation Satellite communications (SATCOM) Phased arrays

The ADP1052 is an advanced digital controller with a PMBus? interface targeting high density, high efficiency, dc-to-dc power conversion. This controller implements voltage mode control with high speed, input line feedforward for enhanced transient and improved noise performance. The ADP1052 has six programmable pulse-width modulation (PWM) outputs capable of controlling most high efficiency power supply topologies, with added control of synchronous rectification (SR). The device includes adaptive dead time compensation to improve efficiency over the load range, and programmable light load mode operation, combined with low power consumption, to reduce system standby power losses.The ADP1052 implements several features to enable a robust system of parallel and redundant operation for customers that require high availability or parallel connection. The device provides synchronization, reverse current protection, prebias startup, accurate current sharing between power supplies, and conditional overvoltage techniques to identify and safely shut down an erroneous power supply in parallel operation mode.The ADP1052 is based on flexible state machine architecture and is programmed using an intuitive GUI. The easy to use interface reduces design cycle time and results in a robust, hardware coded system loaded into the built-in EEPROM. The small size (4 mm ? 4 mm) LFCSP package makes the ADP1052 ideal for ultracompact, isolated dc-to-dc power module or embedded power designs.APPLICATIONS High density isolated dc-to-dc power supplies Intermediate bus converters High availability parallel power systems Server, storage, industrial, networking, and communications infrastructure

The ADP1621 is a fixed-frequency, pulse-width modulation (PWM), current-mode, step-up converter controller. It drives an external n-channel MOSFET to convert the input voltage to a higher output voltage. The ADP1621 can also be used to drive flyback, SEPIC, and forward converter topologies, either isolated or nonisolated.The ADP1621 eliminates the use of a current-sense power resistor by measuring the voltage drop across the on resistance of the n-channel MOSFET. This technique, allowed up to a maximum voltage of 30 V at the switch node, maximizes efficiency and reduces cost. For switch-node voltages higher than 30 V or for more accurate current limiting, the CS pin can be connected to a current-sense resistor in the source of the MOSFET. The slope compensation is implemented by an external resistor, allowing a wide range of external components (inductors and MOSFETs), and can be chosen for various switching frequencies and input and output voltages.The ADP1621 supply input voltage range is 2.9 V to 5.5 V, although higher input voltages are possible with the use of a small-signal NPN pass transistor or a single resistor. The voltage of the power input can be as low as 1 V for fuel cell applications. The switching frequency is set by an external resistor over a range of 100 kHz to 1.5 MHz and can be synchronized to an external clock by using the SDSN pin. The shutdown quiescent current is less than 10 ?A. The ADP1621 has a thermal shutdown feature that shuts down the gate driver when the junction temperature reaches approximately 150?C. The internal soft start circuit limits inrush current at startup. The ADP1621 is available in the 10-lead MSOP lead-free package and is specified over the ?40?C to +125?C junction temperature range.Applications APD bias Portable electronic equipment Isolated dc-to-dc converter Step-up/step-down dc-to-dc converter LED driver for laptop computer and navigation system LCD backlighting

The ADP165/ADP166 are very low quiescent current, low dropout, linear regulator that operate from 2.2 V to 5.5 V and provides up to 150 mA of output current. The low 120 mV dropout voltage at 150 mA load improves efficiency and allows operation over a wide input voltage range.The ADP165/ADP166 are specifically designed for stable operation with a tiny 1 ?F ? 30% ceramic input and output capacitors to meet the requirements of high performance, space-constrained applications.The ADP165/ADP166 are available in seven fixed output voltage options, ranging from 1.2 V to 3.3 V, and an adjustable output option. The ADP165 also include a switched resistor to discharge the output automatically when the LDO is disabled. The ADP166 is identical to the ADP165, but does not include the output discharge function.Short-circuit and thermal overload protection circuits prevent damage in adverse conditions. The ADP165/ADP166 are available in a tiny 5-lead TSOT, a 6-lead LFCSP and a 4-ball, 0.5 mm pitch WLCSP package for the smallest footprint solution to meet a variety of portable power applications.Applications Portable and battery-powered equipment Post dc-to-dc regulation Portable medical devices Wireless sensor network (WSN) devices

The ADP1660 is a very compact, highly efficient, dual white LEDflash driver for high-resolution camera phones that improvespicture and video quality in low light environments. The deviceintegrates a programmable 1.5 MHz or 3.0 MHz synchronousinductive boost converter, an I2C-compatible interface, and two 750 mA current sources. The high switching frequency enablesthe use of a tiny, 1 mm high, low cost, 1 ?H power inductor,and the parallel current sources permit LED cathode groundingfor thermally enhanced, low EMI, and compact layouts.The LED driver maximizes efficiency over the entire battery voltage range to maximize the input-power-to-LED-power conversion and minimize battery current draw during flash events.The LED driver maximizes efficiency over the entire batteryvoltage range to maximize the input-power-to-LED-powerconversion and minimize battery current draw during flashevents. A programmable DC battery current limit safely maximizesLED current for all LED VF and battery voltage conditions.A TxMASK input permits the flash LED currents and batterycurrent to reduce quickly during a power amplifier current burst.The I2C-compatible interface enables the programmability oftimers, currents, and status bit readback for operationmonitoring and safety control.ADP1660 comes in a compact 12-ball, 0.5 mm pitch packageand operates within specification over the full ?40?C to +125?Cjunction temperature range.APPLICATIONS Camera-enabled cellular phones and smart phones Digital still cameras, camcorders, and PDAs

The ADP165?/ ADP166 are very low quiescent current, low dropout, linear regulator that operate from 2.2 V to 5.5 V and provides up to 150 mA of output current. The low 120 mV dropout voltage at 150 mA load improves efficiency and allows operation over a wide input voltage range.The ADP165 / ADP166 are specifically designed for stable operation with a tiny 1 ?F ? 30% ceramic input and output capacitors to meet the requirements of high performance, space-constrained applications.The ADP165 / ADP166 are available in seven fixed output voltage options, ranging from 1.2 V to 3.3 V, and an adjustable output option. The ADP165 also include a switched resistor to discharge the output automatically when the LDO is disabled. The ADP166 is identical to the ADP165, but does not include the output discharge function.Short-circuit and thermal overload protection circuits prevent damage in adverse conditions. The ADP165 / ADP166 are available in a tiny 5-lead TSOT, a 6-lead LFCSP and a 4-ball, 0.5 mm pitch WLCSP package for the smallest footprint solution to meet a variety of portable power applications.APPLICATIONS Portable and battery-powered equipment Post dc-to-dc regulation Portable medical devices Wireless sensor network (WSN) devices

The ADP1762 is a low noise, low dropout (LDO) linear regulator. It is designed to operate from a single input supply with an input voltage as low as 1.10 V, without the requirement of an external bias supply, to increase efficiency and provide up to 2 A of output current.The low 62 mV typical dropout voltage at a 2 A load allows the ADP1762 to operate with a small headroom while maintaining regulation and providing better efficiency.The ADP1762 is optimized for stable operation with small 10 ?F ceramic output capacitors. The ADP1762 delivers optimal transient performance with minimal board area.The ADP1762 is available in fixed output voltages ranging from 0.9 V to 1.5 V. The output of the adjustable output model can be set from 0.5 V to 1.5 V through an external resistor connected between VADJ and ground.The ADP1762 has an externally programmable soft start time by connecting a capacitor to the SS pin. Short-circuit and thermal overload protection circuits prevent damage in adverse conditions. The ADP1762 is available in a small 16-lead LFCSP package for the smallest footprint solution to meet a variety of applications.APPLICATIONS Regulation to noise sensitive applications such as radio frequency (RF) transceivers, analog-to-digital converter (ADC) and digital-to-analog converter (DAC) circuits, phase-locked loops (PLLs), voltage controlled oscillators (VCOs) and clocking integrated circuits Field-programmable gate array (FPGA) and digital signal processor (DSP) supplies Medical and healthcare Industrial and instrumentation?

The ADRF6520 is a matched pair of fully differential low noise and low distortion programmable filters and variable gain amplifiers(VGAs). Each channel is capable of rejecting large, out of band interferers while reliably boosting the wanted signal, thus reducingthe bandwidth and resolution requirements on the analog-to-digital converters (ADCs). The excellent matching betweenchannels and their high spurious-free dynamic range over all gain and bandwidth settings make the ADRF6520 ideal forquadrature-based (IQ) communication systems with dense constellations, multiple carriers, and nearby interferers. Thefilter corners, enable, and dc offset correction loop enable are all programmable via a serial peripheral interface (SPI).The first VGA that precedes the filters offers 30 dB of continuous gain control with a maximum gain of 18 dB and sets a differentialinput impedance of 100 ?. The filters provide a four-pole Butterworth response with ?1 dB corner frequencies: 36 MHz,72 MHz, 144 MHz, 288 MHz, 432 MHz, 576 MHz, and 720 MHz. For operation beyond 720 MHz, the filter can be disabled andcompletely bypassed, thereby extending the ?1 dB bandwidth up to 1.25 GHz. A wideband rms detector is available tomonitor the signal at the filter inputs. A fixed gain amplifier of 6 dB immediately follows the filter. The postfilter VGA provides30 dB of continuous gain control with a maximum gain of 12 dB. The output buffers offer an additional 18 dB of gain andprovide a differential output impedance of 20 ?. The output buffers are capable of driving 1.5 V p-p into 100 ? loads at betterthan 55 dBc nominal for the third-order intermodulation distortion (IMD3). Independent, built in, dc offset correctionloops for each channel can be disabled via the SPI if fully dc-coupled operation is desired. The high-pass corner frequency isdetermined by external capacitors on the CHP1 and CHP2 pins and the postfilter VGA gain.The ADRF6520 operates from a 3.15 V to 3.45 V supply and consumes a maximum supply current of 425 mA. When fullydisabled, it consumes ?10 mA. The ADRF6520 is fabricated in an advanced silicon-germanium BiCMOS process and isavailable in a 32-lead, exposed pad LFCSP. Performance is specified over the ?40?C to +85?C temperature range.Applications Point-to-point and point-to-multipoint radios Baseband IQ receivers Diversity receivers ADC drivers Instrumentation Medical

The ADRF6850 is a highly integrated broadband quadrature demodulator, frequency synthesizer, and variable gain amplifier (VGA). The device covers an operating frequency range from 100 MHz to 1000 MHz for use in both narrow-band and wideband communications applications, performing quadrature demodulation from IF directly to baseband frequencies.The ADRF6850 demodulator includes a high modulus fractional-N frequency synthesizer with integrated VCO, providing better than 1 Hz frequency resolution, and a 60 dB gain control range provided by a front-end VGA.Control of all the on-chip registers is through a user-selected SPI interface or I2C interface. The device operates from a single power supply ranging from 3.15 V to 3.45 V.APPLICATIONS Broadband communications Cellular communications Satellite communications

The ADRV9029 is a highly integrated, radio frequency (RF) agile transceiver offering four independently controlled transmitters, dedicated observation receiver inputs for monitoring each transmitter channel, four independently controlled receivers, integrated synthesizers, and digital signal processing functions providing a complete transceiver solution. The device provides the performance demanded by cellular infrastructure applications, such as small cell base station radios, macro 3G/4G/5G systems, and massive multiple in/multiple out (MIMO) base stations.The receiver subsystem consists of four independent, wide bandwidth, direct conversion receivers with wide dynamic range. The four independent transmitters use a direct conversion modulator resulting in low noise operation with low power consumption. The device also includes two wide bandwidth, time shared, observation path receivers with two inputs each for monitoring transmitter outputs.The complete transceiver subsystem includes automatic and manual attenuation control, dc offset correction, quadrature error correction (QEC), and digital filtering, eliminating the need for these functions in the digital baseband. Other auxiliary functions such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and general-purpose input/ outputs (GPIOs) that provide an array of digital control options are also integrated.To achieve a high level of RF performance, the transceiver includes five fully integrated phase-locked loops (PLLs). Two PLLs provide low noise and low power fractional-N RF synthesis for the transmitter and receiver signal paths. A third fully integrated PLL supports an independent local oscillator (LO) mode for the observation receiver. The fourth PLL generates the clocks needed for the converters and digital circuits, and a fifth PLL provides the clock for the serial data interface.A multichip synchronization mechanism synchronizes the phase of all LOs and baseband clocks between multiple ADRV9029 chips. All voltage controlled oscillators (VCOs) and loop filter components are integrated and adjustable through the digital control interface.This device contains a fully integrated, low power digital predistortion (DPD) adaptation engine for use in power amplifier linearization. DPD enables use of high efficiency power amplifiers, reducing the power consumption of base station radios while also reducing the number of SERDES lanes necessary to interface with baseband processors.The low power crest factor reduction (CFR) engine of the ADRV9029 reduces the peak to average ratio (PAR) of the input signal, enabling higher efficiency transmit line ups while reducing the processing load on baseband processors.The serial data interface consists of four serializer lanes and four deserializer lanes. The interface supports both the JESD204B and JESD204C standards, operating at data rates up to 24.33 Gbps. The interface also supports interleaved mode for lower bandwidths, thus reducing the number of high speed data interface lanes to one. Both fixed and floating-point data formats are supported. The floating-point format allows internal automatic gain control (AGC) to be invisible to the demodulator device.The ADRV9029 is powered directly from 1.0 V, 1.3 V, and 1.8 V regulators and is controlled via a standard serial peripheral interface (SPI) serial port. Comprehensive power-down modes are included to minimize power consumption in normal use. The ADRV9029 is packaged in a 14 mm ? 14 mm, 289-ball chip scale ball grid array (CSP_BGA).APPLICATIONS3G/4G/5G TDD and FDD massive MIMO, macro and small cell base stations