The ADG841 and ADG842 are low voltage CMOS devices containing a single-pole, single-throw (SPST) switch. The ADG841 is closed for a Logic 1 input and the ADG842 is open for a Logic 1 input. The devices offer ultralow on resistance of less than 0.48 ? over the full temperature range. The ADG841 / ADG842 are fully specified for 3.3 V, 2.5 V, and 1.8 V supply operation.Each switch conducts equally well in both directions when on, and has an input signal range that extends to the supplies. The ADG841 / ADG842 exhibit break-before-make switching action.The ADG841 / ADG842 are available in a 6-lead SC70 package.PRODUCT HIGHLIGHTS <0.48 ? over full temperature range of ?40?C to +125?C. Compatible with 1.8 V CMOS logic. High current handling capability (300 mA continuous current at 3.3 V). Low THD + N (0.02% typ). Tiny SC70 package.APPLICATIONS Handsets PDAs MP3 Players Power Routing Battery-powered Systems Communication Systems Modems PCMCIA Cards

The AD1940 /?AD1941 are a complete 28-bit, single-chip, multi-channel audio SigmaDSP? for equalization, multiband dynamic processing, delay compensation, speaker compensation, and image enhancement. These algorithms can be used to compen-sate for the real world limitations of speakers, amplifiers, and listening environments, resulting in a dramatic improvement of perceived audio quality.The signal processing used in the AD1940 / AD1941 is comparable to that found in high end studio equipment. Most of the processing is done in full, 56-bit double-precision mode, resulting in very good, low level signal performance and the absence of limit cycles or idle tones. The dynamics processor uses a sophisticated, multiple-breakpoint algorithm often found in high end broadcast compressors. The AD1940 / AD1941 are a fully programmable DSP. Easy to use software allows the user to graphically configure a custom signal processing flow using blocks such as biquad filters, dynamics processors, and surround sound processors. An extensive control port allows click-free parameter updates, along with readback capability from any point in the algorithm flow.The AD1940 / AD1941?s digital input and output ports allow a glueless connection to ADCs and DACs by multiple, 2-channel serial data streams or TDM data streams. When in TDM mode, the AD1940 / AD1941 can input 8 or 16 channels of serial data, and can output 8 or 16 channels of serial data. The input and output port configurations can be individually set. The AD1940 is controlled by a 4-wire SPI? port; the AD1941 is controlled by a 2-wire I2C? bus. Other than the control interface, the functions of the two parts are identical. APPLICATIONS Automotive sound systems Digital televisions Home theater systems (Dolby digital/DTS postprocessor) Multichannel audio systems Mini-component stereos Multimedia audio Digital speaker crossover Musical instruments In-seat sound systems (aircrafts/motor coaches)

The AD3552R is a low drift, ultra-fast, 16-bit accuracy, current output digital-to-analog converter (DAC) that can be configured in multiple voltage span ranges. The AD3552R operates with a fixed 2.5 V reference.The device incorporates three drift compensating feedback resistors for the required external transimpedance amplifier (TIA) that scales the output voltage. Offset and gain scaling registers allow for generation of multiple output span ranges, such as 0 V to 2.5 V, 0 V to 5 V, 0 V to 10 V, ?5 V to +5 V, and ?10 V to +10 V, and custom intermediate ranges with full 16-bit resolution.The DAC can operate in fast mode for maximum speed or precision mode for maximum accuracy.The SPI interface can be configured in single SPI (classic SPI) mode, dual SPI mode, synchronous dual SPI mode, and quad SPI mode with single date rate (SDR) or double data rate (DDR), with logical levels from 1.2 V to 1.8 V.To improve device robustness, cyclic redundancy check (CRC) can be enabled. Multiple error checkers have also been integrated to detect VREF failures or memory map corruption.The AD3552R is specified over the extended industrial temperature range (?40?C to +105?C).APPLICATIONSInstrumentationHardware in the loopProcess control equipmentMedical devicesAutomatic test equipmentData acquisition systemProgrammable voltage sourcesOptical communications

The AD4001/AD4005 are high accuracy, high speed, low power, 16-bit, Easy Drive, precision successive approximation register (SAR) analog-to-digital converters (ADCs) that operate from a single power supply, VDD. The reference voltage, VREF, is applied externally and can be set independent of the supply voltage. The AD4001/AD4005 power scales linearly with throughput. Easy Drive features reduce both signal chain complexity and power consumption while enabling higher channel density. The reduced input current, particularly in high-Z mode, coupled with a long signal acquisition phase, eliminates the need for a dedicated ADC driver. Easy Drive broadens the range of companion circuitry that is capable of driving these ADCs (see Figure 2 in the data sheet).Input span compression eliminates the need to provide a negative supply to the ADC driver amplifier while preserving access to the full ADC code range. The input overvoltage clamp protects the ADC inputs against overvoltage events, minimizing disturbances on the reference pin and eliminating the need for external protection diodes. Fast device throughput up to 2 MSPS allows users to accurately capture high frequency signals and to implement oversampling techniques to alleviate the challenges associated with antialias filter designs. Decreased serial peripheral interface (SPI) clock rate requirements reduce digital input and output power consumption, broadens digital host options, and simplifies the task of sending data across digital isolation. The SPI-compatible serial user interface is compatible with 1.8 V, 2.5 V, 3 V, and 5 V logic by using the separate VIO logic supply.APPLICATIONS Automated test equipment Machine automation Medical equipment Battery-powered equipment Precision data acquisition systems Instrumentation and control systems

The AD5241?/ AD52421 provide a single-/dual-channel, 256-position, digitally controlled variable resistor (VR) device. These devices perform the same electronic adjustment function as a potentiometer, trimmer, or variable resistor. Each VR offers a completely programmable value of resistance between the A terminal and the wiper, or the B terminal and the wiper. For the AD5242, the fixed A-to-B terminal resistance of 10 k?, 100 k?, or 1 M? has a 1% channel-to-channel matching tolerance. The nominal temperature coefficient of both parts is 30 ppm/?C.Wiper position programming defaults to midscale at system power on. When powered, the VR wiper position is programmed by an I2C-compatible, 2-wire serial data interface. Both parts have two extra programmable logic outputs available that enable users to drive digital loads, logic gates, LED drivers, and analog switches in their system.The AD5241 / AD5242 are available in surface-mount, 14-lead SOIC and 16-lead SOIC packages and, for ultracompact solutions, 14-lead TSSOP and 16-lead TSSOP packages. All parts are guaranteed to operate over the extended temperature range of ?40?C to +105?C.APPLICATIONS Multimedia, video, and audio Communications Mechanical potentiometer replacement Instrumentation: gain, offset adjustment Programmable voltage-to-current conversion Line impedance matching

The AD9522-51 provides a multioutput clock distribution function with subpicosecond jitter performance, along with an on-chip PLL that can be used with an external VCO.???The AD9522 serial interface supports both SPI and I2C? ports. An in-package EEPROM can be programmed through the serial interface and store user-defined register settings for power-up and chip reset.The AD9522 features 12 LVDS outputs in four groups. Any of the 800 MHz LVDS outputs can be reconfigured as two 250 MHz CMOS outputs.Each group of outputs has a divider that allows both the divide ratio (from 1 to 32) and the phase (coarse delay) to be set.The AD9522 is available in a 64-lead LFCSP and can be operated from a single 3.3 V supply. The external VCO can have an operating voltage up to 5.5 V.The AD9522 is specified for operation over the standard industrial range of ?40?C to +85?C.The AD9520-5 is an equivalent part to the AD9522-5 featuring LVPECL/CMOS drivers instead of LVDS/CMOS drivers.1The AD9522 is used throughout this data sheet to refer to all the members of the AD9522 family. However, when AD9522-5 is used, it is referring to that specific member of the AD9522 family.ApplicationsLow jitter, low phase noise clock distributionClock generation and translation for SONET, 10Ge, 10G FC, and other 10 Gbps protocolsForward error correction (G.710)Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEsHigh performance wireless transceiversATE and high performance instrumentationBroadband infrastructures

Demonstration circuit 742B features the LTC2449, an 8-/16-channel, high speed, 24-bit ΔΣ ADC with ten selectable speed/resolution modes from 6.9Hz/200nVRMS to 3.5kHz/25μVRMS (4kHz with external oscillator). Key DC specifications include 5ppm INL, 5μV offset, 10ppm fullscale error and 20nV/°C offset drift. In the 6.9Hz/200nVRMS mode, input normal mode rejection of 50Hz and 60Hz noise is better than 87dB. The accuracy (offset, full-scale, linearity, drift) and power dissipation are independent of the speed selected. The LTC2449 performs auto-zeroing of the ADC by reversing the inputs through the multiplexer output/ADC input connections. This allows an external dual buffer amplifier to isolate the signal inputs from the sampling current of the ADC.

The LTC6430-20 is a differential gain block amplifier designed to drive high resolution, high speed ADCs with excellent linearity beyond 1000MHz and with low associated output noise. The LTC6430-20 operates from a single 5V power supply and consumes only 850mW.In its differential configuration, the LTC6430-20 can directly drive the differential inputs of an ADC. Using 1:2 baluns, the device makes an excellent 50? wideband balanced amplifier. While using 1:1.33 baluns, the device creates a high fidelity 40MHz to 1000MHz 75? CATV amplifier.The LTC6430-20 is designed for ease of use, requiring a minimum of support components. The device is internally matched to 100? differential source/load impedance. On-chip bias and temperature compensation ensure consistent performance over environmental changes.The LTC6430-20 uses a high performance SiGe BiCMOS process for excellent repeatability compared with similar GaAs amplifiers. All A-grade LTC6430-20 devices are tested and guaranteed for OIP3 at 380MHz. The LTC6430-20 is housed in a 4mm ? 4mm, 24-lead, QFN package with an exposed pad for thermal management and low inductance. A single-ended 50? IF gain block with similar performance is also available, see the related LTC6431-20.Applications Differential ADC Driver Differential IF Amplifier OFDM Signal Chain Amplifier 50? Balanced IF Amplifier 75? CATV Amplifier 700MHz to 800MHz LTE Amplifier Low Phase Noise Clock or LO Amplifier

The AD9148 is a quad, 16-bit, high dynamic range, digital-toanalogconverter (DAC) that provides a sample rate of 1000 MSPS.These devices include features optimized for direct conversiontransmit applications, including gain, phase, and offset compensation.The DAC outputs are optimized to interface seamlessly withanalog quadrature modulators such as the?ADL5371/ADL5372/ADL5373/ADL5374/ADL5375/. A serial peripheral interface (SPI)is provided for programming of the internal device parameters.Full-scale output current can be programmed over a range of 10 mAto 30 mA. The devices operate from 1.8 V and 3.3 V supplies fora total power consumption of 3 W at the maximum sample rate.They are enclosed in 196-ball chip scale package ball grid arraywith the option of an attached heat spreader..Product Highlights1. Low noise and inter-modulation distortion (IMD) enable highquality synthesis of wideband signals from baseband to highintermediate frequencies.2. A proprietary DAC output switching technique enhancesdynamic performance.3. The current outputs are easily configured for various singleendedor differential circuit topologies.4. LVDS data input interface includes FIFO to ease input timing.Applications Wireless infrastructure LTE, TD-SCDMA, WiMAX, WCDMA, CDMA2000, GSM MIMO/Transmit diversity Digital high or low IF synthesis

The AD9162 is a high performance, 16-bit digital-to-analog converter (DAC) that supports data rates to 6 GSPS. The DAC core is based on a quad-switch architecture coupled with a 2? interpolator filter that enables an effective DAC update rate of up to 12 GSPS in some modes. The high dynamic range and bandwidth makes these DACs ideally suited for the most demanding high speed radio frequency (RF) DAC applications.In baseband mode, wide bandwidth capability combines with high dynamic range to support DOCSIS 3.1 cable infrastructure compliance from the minimum of two carriers to full maximum spectrum of 1.794 GHz. A 2? interpolator filter (FIR85) enables the AD9161/AD9162 to be configured for lower data rates and converter clocking to reduce the overall system power and ease the filtering requirements. In Mix-Mode? operation, the AD9161/AD9162 can reconstruct RF carriers in the second and third Nyquist zones up to 7.5 GHz while still maintaining exceptional dynamic range. The output current can be programmed from 8 mA to 38.76 mA. The AD9161/AD9162 data interface consists of up to eight JESD204B serializer/deserializer (SERDES) lanes that are programmable in terms of lane speed and number of lanes to enable application flexibility.A serial peripheral interface (SPI) can configure the AD9161/AD9162 and monitor the status of all registers. The AD9161/AD9162 are offered in an 165-ball, 8.0 mm ? 8.0 mm, 0.5 mm pitch, CSP_BGA package and in an 169-ball, 11 mm ? 11 mm, 0.8 mm pitch, CSP_BGA package, including a leaded ball option for the AD9162.Product Highlights High dynamic range and signal reconstruction bandwidth supports RF signal synthesis of up to 7.5 GHz. Up to eight lanes JESD204B SERDES interface flexible in terms of number of lanes and lane speed. Bandwidth and dynamic range to meet DOCSIS 3.1 compliance with margin.Applications Broadband communications systems DOCSIS 3.1 cable modem termination system (CMTS)/video on demand (VOD)/edge quadrature amplitude modulation (EQAM) Wireless communications infrastructure W-CDMA, LTE, LTE-A, point to point Instrumentation, automatic test equipment (ATE) Radars and jammers