The AD8417 is a high voltage, high resolution current shunt amplifier. It features an initial gain of 60 V/V, with a maximum ?0.3% gain error over the entire temperature range. The buffered output voltage directly interfaces with any typical converter. The AD8417 offers excellent input common-mode rejection from ?2 V to +70 V. The AD8417 performs bidirectional current measurements across a shunt resistor in a variety of automotive and industrial applications, including motor control, power management, and solenoid control.The AD8417 offers breakthrough performance throughout the ?40?C to +150?C temperature range. It features a zero drift core, which leads to a typical offset drift of 0.1 ?V/?C throughout the operating temperature range and the common-mode voltage range. The AD8417 is qualified for automotive applications. The device includes EMI filters and patented circuitry to enable output accuracy with pulse-width modulation (PWM) type input common-mode voltages. The typical input offset voltage is ?200 ?V. The AD8417 is offered in 8-lead MSOP and SOIC packages.Applications High-side current sensing in Motor controls Solenoid controls Power management Low-side current sensing Diagnostic protection

The AD8451 is a precision analog front end and controller for testing and monitoring battery cells. A precision fixed gain instrumentation amplifier (IA) measures the battery charge/discharge current, and a fixed gain difference amplifier (DA) measures the battery voltage. Internal laser trimmed resistor networks set the gains for the IA and the DA, optimizing the performance of the AD8451 over the rated temperature range. The IA gain is 26 and the DA gain is 0.8 V/V.Voltages at the ISET and VSET inputs set the desired constant current (CC) and constant voltage (CV) values. CC to CV switching is automatic and transparent to the system.A TTL logic level input, MODE, selects the charge or discharge mode (high for charge, low for discharge). An analog output, VCTRL, interfaces directly with the Analog Devices, Inc., ADP1972 PWM controller.The AD8451 simplifies designs by providing excellent accuracy, performance over temperature, flexibility with functionality, and overall reliability in a space-saving package. The AD8451 is available in an 80-lead, 14 mm ? 14 mm ? 1 mm LQFP package and is rated for an operating temperature of ?40?C to +85?C.APPLICATIONS Battery cell formation and testing Battery module testing

The AD9217 is a single, 12-bit, 6 GSPS/10.25 GSPS, radio frequency (RF) analog-to-digital converter (ADC) with a 6.5 GHz input bandwidth. The AD9217 supports high dynamic range frequency and time domain applications requiring wide instantaneous bandwidth and low conversion error rates (CER).The AD9217 features a low latency, high speed, parallel CML output interface that supports full bandwidth operation with compatible FPGA/ASIC receivers. The AD9217 can be reconfigured to operate in native AD9213 mode for applications requiring additional digital processing and JESD204B output support. Refer to the AD9213 data sheet?when operating the AD9217 in AD9213 mode.The AD9217 achieves dynamic range and linearity performance while consuming 4.2 W typical. The device is based on an interleaved pipeline architecture and features a proprietary calibration and randomization technique that suppresses interleaving spurious artifacts into its noise floor. The linearity performance of the AD9217 is preserved by a combination of on-chip dithering and calibration, which results in excellent spurious-free performance over a wide range of input signal conditions.The AD9217 is offered in a 192-ball ball grid array (BGA) package and is specified over a junction temperature range of ?20?C to +115?C.

The AD9627 is a dual, 12-bit, 80 MSPS/105 MSPS/125 MSPS/150 MSPS analog-to-digital converter (ADC). The AD9627 is designed to support communications applications where low cost, small size and versatility are desired.The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth differential sample-and-hold analog input amplifiers supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance. The AD9627 has several functions that simplify the automatic gain control (AGC) function in the system receiver. The fast detect feature allows fast overrange detection by outputting four bits of input level information with very short latency. In addition, the programmable threshold detector allows monitoring of the incoming signal power, using the four fast detect bits of the ADC with very low latency. If the input signal level exceeds the programmable threshold, the coarse upper threshold indicator goes high. Because this threshold indicator has very low latency, the user can quickly turn down the system gain to avoid an overrange condition. The second AGC-related function is the signal monitor. This block allows the user to monitor the composite magnitude of the incoming signal, which aids in setting the gain to optimize the dynamic range of the overall system. The ADC output data can be routed directly to the two external 12-bit output ports. These outputs can be set from 1.8 V to 3.3 V CMOS or 1.8 V LVDS. Flexible power-down options allow significant power savings, when desired.Programming for setup and control is accomplished using a 3-bit SPI-compatible serial interface.The AD9627 is available in a 64-lead LFCSP and is specified over the industrial temperature range of ?40?C to +85?C.PRODUCT HIGHLIGHTS Integrated dual, 12-bit, 80 MSPS/105 MSPS/125 MSPS/150 MSPS ADC. Fast overrange detect and signal monitor with serial output. Signal monitor block with dedicated serial output mode. Proprietary differential input that maintains excellent SNR performance for input frequencies up to 450 MHz. Operation from a single 1.8 V supply and a separate digital output driver supply to accommodate 1.8 V to 3.3 V logic families. Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock DCS, power-down, test modes, and voltage reference mode. Pin compatibility with the AD9640, AD9627-11, and AD9600 for a simple migration from 12 bits to 14 bits, 11 bits, or 10 bits.APPLICATIONS Communications Diversity radio systems Multimode digital receivers (3G) GSM, EDGE, WCDMA, CDMA2000, WiMAX, TD-SCDMA I/Q demodulation systems Smart antenna systems General-purpose software radios Broadband data applications

The ADRF6520 is a matched pair of fully differential low noise and low distortion programmable filters and variable gain amplifiers(VGAs). Each channel is capable of rejecting large, out of band interferers while reliably boosting the wanted signal, thus reducingthe bandwidth and resolution requirements on the analog-to-digital converters (ADCs). The excellent matching betweenchannels and their high spurious-free dynamic range over all gain and bandwidth settings make the ADRF6520 ideal forquadrature-based (IQ) communication systems with dense constellations, multiple carriers, and nearby interferers. Thefilter corners, enable, and dc offset correction loop enable are all programmable via a serial peripheral interface (SPI).The first VGA that precedes the filters offers 30 dB of continuous gain control with a maximum gain of 18 dB and sets a differentialinput impedance of 100 ?. The filters provide a four-pole Butterworth response with ?1 dB corner frequencies: 36 MHz,72 MHz, 144 MHz, 288 MHz, 432 MHz, 576 MHz, and 720 MHz. For operation beyond 720 MHz, the filter can be disabled andcompletely bypassed, thereby extending the ?1 dB bandwidth up to 1.25 GHz. A wideband rms detector is available tomonitor the signal at the filter inputs. A fixed gain amplifier of 6 dB immediately follows the filter. The postfilter VGA provides30 dB of continuous gain control with a maximum gain of 12 dB. The output buffers offer an additional 18 dB of gain andprovide a differential output impedance of 20 ?. The output buffers are capable of driving 1.5 V p-p into 100 ? loads at betterthan 55 dBc nominal for the third-order intermodulation distortion (IMD3). Independent, built in, dc offset correctionloops for each channel can be disabled via the SPI if fully dc-coupled operation is desired. The high-pass corner frequency isdetermined by external capacitors on the CHP1 and CHP2 pins and the postfilter VGA gain.The ADRF6520 operates from a 3.15 V to 3.45 V supply and consumes a maximum supply current of 425 mA. When fullydisabled, it consumes ?10 mA. The ADRF6520 is fabricated in an advanced silicon-germanium BiCMOS process and isavailable in a 32-lead, exposed pad LFCSP. Performance is specified over the ?40?C to +85?C temperature range.Applications Point-to-point and point-to-multipoint radios Baseband IQ receivers Diversity receivers ADC drivers Instrumentation Medical

The ADRF6850 is a highly integrated broadband quadrature demodulator, frequency synthesizer, and variable gain amplifier (VGA). The device covers an operating frequency range from 100 MHz to 1000 MHz for use in both narrow-band and wideband communications applications, performing quadrature demodulation from IF directly to baseband frequencies.The ADRF6850 demodulator includes a high modulus fractional-N frequency synthesizer with integrated VCO, providing better than 1 Hz frequency resolution, and a 60 dB gain control range provided by a front-end VGA.Control of all the on-chip registers is through a user-selected SPI interface or I2C interface. The device operates from a single power supply ranging from 3.15 V to 3.45 V.APPLICATIONS Broadband communications Cellular communications Satellite communications

The ADRV9029 is a highly integrated, radio frequency (RF) agile transceiver offering four independently controlled transmitters, dedicated observation receiver inputs for monitoring each transmitter channel, four independently controlled receivers, integrated synthesizers, and digital signal processing functions providing a complete transceiver solution. The device provides the performance demanded by cellular infrastructure applications, such as small cell base station radios, macro 3G/4G/5G systems, and massive multiple in/multiple out (MIMO) base stations.The receiver subsystem consists of four independent, wide bandwidth, direct conversion receivers with wide dynamic range. The four independent transmitters use a direct conversion modulator resulting in low noise operation with low power consumption. The device also includes two wide bandwidth, time shared, observation path receivers with two inputs each for monitoring transmitter outputs.The complete transceiver subsystem includes automatic and manual attenuation control, dc offset correction, quadrature error correction (QEC), and digital filtering, eliminating the need for these functions in the digital baseband. Other auxiliary functions such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and general-purpose input/ outputs (GPIOs) that provide an array of digital control options are also integrated.To achieve a high level of RF performance, the transceiver includes five fully integrated phase-locked loops (PLLs). Two PLLs provide low noise and low power fractional-N RF synthesis for the transmitter and receiver signal paths. A third fully integrated PLL supports an independent local oscillator (LO) mode for the observation receiver. The fourth PLL generates the clocks needed for the converters and digital circuits, and a fifth PLL provides the clock for the serial data interface.A multichip synchronization mechanism synchronizes the phase of all LOs and baseband clocks between multiple ADRV9029 chips. All voltage controlled oscillators (VCOs) and loop filter components are integrated and adjustable through the digital control interface.This device contains a fully integrated, low power digital predistortion (DPD) adaptation engine for use in power amplifier linearization. DPD enables use of high efficiency power amplifiers, reducing the power consumption of base station radios while also reducing the number of SERDES lanes necessary to interface with baseband processors.The low power crest factor reduction (CFR) engine of the ADRV9029 reduces the peak to average ratio (PAR) of the input signal, enabling higher efficiency transmit line ups while reducing the processing load on baseband processors.The serial data interface consists of four serializer lanes and four deserializer lanes. The interface supports both the JESD204B and JESD204C standards, operating at data rates up to 24.33 Gbps. The interface also supports interleaved mode for lower bandwidths, thus reducing the number of high speed data interface lanes to one. Both fixed and floating-point data formats are supported. The floating-point format allows internal automatic gain control (AGC) to be invisible to the demodulator device.The ADRV9029 is powered directly from 1.0 V, 1.3 V, and 1.8 V regulators and is controlled via a standard serial peripheral interface (SPI) serial port. Comprehensive power-down modes are included to minimize power consumption in normal use. The ADRV9029 is packaged in a 14 mm ? 14 mm, 289-ball chip scale ball grid array (CSP_BGA).APPLICATIONS3G/4G/5G TDD and FDD massive MIMO, macro and small cell base stations

The ADV3200/ADV3201 are 32 ? 32 analog crosspoint switch matrices. They feature a selectable sync-tip clamp input forac-coupled applications and an on-screen display (OSD) insertion mux. With ?48 dB of crosstalk and ?80 dB isolationat 5 MHz, the ADV3200/ADV3201 are useful in many high density routing applications. The 0.1 dB flatness out to 60 MHz makes the ADV3200/ADV3201 ideal for composite video switching.The 32 independent output buffers of the ADV3200/ADV3201 can be placed into a high impedance state for paralleling crosspoint outputs so that off-channels present minimal loading to an output bus if building a larger array. The part is available in gain of +1 (ADV3200) or +2 (ADV3201) for ease of use in back-terminated load applications. A single 5 V supply, dual ?2.5 V supplies, or dual ?3.3 V supplies (G = +2) can be used while consuming only 250 mA of idle current with all outputs enabled. The channel switching is performed via a double buffered, serial digital control, which can accommodate daisy chaining of several devices. The ADV3200/ADV3201 are packaged in a 176-lead exposed pad LQFP (24 mm ? 24 mm) and are available over the extended industrial temperature range of ?40?C to +85?C.Applications CCTV surveillance Routing of high speed signals including ????????Composite video (NTSC, PAL, S, SECAM) ????????RGB and component video routing ????????Compressed video (MPEG, Wavelet) Video conferencing?

The LTC1174 is a simple current mode DC/DC converter ideally suited for 9V to 5V, 5V to 3.3V or 5V to ?5V operation. With an internal 0.9? switch (at a supply voltage of 9V), the LTC1174 requires only four external components to construct a complete high efficiency DC/DC converter.Under a no load condition the LTC1174 draws only 130?A. In shutdown, it draws a mere 1?A making this converter ideal for current sensitive applications. In dropout, the internal P-channel MOSFET switch is turned on continuously allowing the user to maximize the life of the battery source.The maximum inductor current of the LTC1174 family is pin selectable to either 340mA or 600mA, optimizing efficiency for a wide range of applications. Operation up to 200kHz permits the use of small surface mount inductors and capacitors.For applications requiring higher output current or ultrahigh efficiency, see the LTC1148 data sheet.Applications Distributed Power Systems Step-Down Converters Inverting Converters Memory Backup Supply Portable Instruments Battery-Powered Equipment

The LT6557 is a high speed triple video ampli?er with an internal ?xed gain of 2 and a programmable DC input bias voltage. This ampli?er features a 400MHz 2VP-P signal bandwidth, 2200V/?s slew rate and a unique ability to drive heavy output loads to 0.8V of the supply rails, making the LT6557 ideal for a single 5V supply, wideband video application. With just one resistor, the inputs of all three ampli?ers can be programmed to a common voltage level, simplifying and reducing the need for external circuitry in the AC-coupled applications. Without the programmable resistor, the input bias circuit becomes inactive, allowing the use of an external clamp circuit or direct coupled input.The LT6557 has separate power supply and ground pins for each ampli?er to improve channel separation and to ease power supply bypassing. The LT6557 provides uncompromised performance in many high speed applications where a low voltage, single supply is required.The LT6557 is available in 16-lead SSOP and 5mm ? 3mm DFN packages.Applications LCD Video Projectors RGB HD Video Ampli?ers Coaxial Cable Drivers Low Supply ADC Drivers