The ADRF6520 is a matched pair of fully differential low noise and low distortion programmable filters and variable gain amplifiers(VGAs). Each channel is capable of rejecting large, out of band interferers while reliably boosting the wanted signal, thus reducingthe bandwidth and resolution requirements on the analog-to-digital converters (ADCs). The excellent matching betweenchannels and their high spurious-free dynamic range over all gain and bandwidth settings make the ADRF6520 ideal forquadrature-based (IQ) communication systems with dense constellations, multiple carriers, and nearby interferers. Thefilter corners, enable, and dc offset correction loop enable are all programmable via a serial peripheral interface (SPI).The first VGA that precedes the filters offers 30 dB of continuous gain control with a maximum gain of 18 dB and sets a differentialinput impedance of 100 ?. The filters provide a four-pole Butterworth response with ?1 dB corner frequencies: 36 MHz,72 MHz, 144 MHz, 288 MHz, 432 MHz, 576 MHz, and 720 MHz. For operation beyond 720 MHz, the filter can be disabled andcompletely bypassed, thereby extending the ?1 dB bandwidth up to 1.25 GHz. A wideband rms detector is available tomonitor the signal at the filter inputs. A fixed gain amplifier of 6 dB immediately follows the filter. The postfilter VGA provides30 dB of continuous gain control with a maximum gain of 12 dB. The output buffers offer an additional 18 dB of gain andprovide a differential output impedance of 20 ?. The output buffers are capable of driving 1.5 V p-p into 100 ? loads at betterthan 55 dBc nominal for the third-order intermodulation distortion (IMD3). Independent, built in, dc offset correctionloops for each channel can be disabled via the SPI if fully dc-coupled operation is desired. The high-pass corner frequency isdetermined by external capacitors on the CHP1 and CHP2 pins and the postfilter VGA gain.The ADRF6520 operates from a 3.15 V to 3.45 V supply and consumes a maximum supply current of 425 mA. When fullydisabled, it consumes ?10 mA. The ADRF6520 is fabricated in an advanced silicon-germanium BiCMOS process and isavailable in a 32-lead, exposed pad LFCSP. Performance is specified over the ?40?C to +85?C temperature range.Applications Point-to-point and point-to-multipoint radios Baseband IQ receivers Diversity receivers ADC drivers Instrumentation Medical

The ADRF6850 is a highly integrated broadband quadrature demodulator, frequency synthesizer, and variable gain amplifier (VGA). The device covers an operating frequency range from 100 MHz to 1000 MHz for use in both narrow-band and wideband communications applications, performing quadrature demodulation from IF directly to baseband frequencies.The ADRF6850 demodulator includes a high modulus fractional-N frequency synthesizer with integrated VCO, providing better than 1 Hz frequency resolution, and a 60 dB gain control range provided by a front-end VGA.Control of all the on-chip registers is through a user-selected SPI interface or I2C interface. The device operates from a single power supply ranging from 3.15 V to 3.45 V.APPLICATIONS Broadband communications Cellular communications Satellite communications

The ADRV9029 is a highly integrated, radio frequency (RF) agile transceiver offering four independently controlled transmitters, dedicated observation receiver inputs for monitoring each transmitter channel, four independently controlled receivers, integrated synthesizers, and digital signal processing functions providing a complete transceiver solution. The device provides the performance demanded by cellular infrastructure applications, such as small cell base station radios, macro 3G/4G/5G systems, and massive multiple in/multiple out (MIMO) base stations.The receiver subsystem consists of four independent, wide bandwidth, direct conversion receivers with wide dynamic range. The four independent transmitters use a direct conversion modulator resulting in low noise operation with low power consumption. The device also includes two wide bandwidth, time shared, observation path receivers with two inputs each for monitoring transmitter outputs.The complete transceiver subsystem includes automatic and manual attenuation control, dc offset correction, quadrature error correction (QEC), and digital filtering, eliminating the need for these functions in the digital baseband. Other auxiliary functions such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and general-purpose input/ outputs (GPIOs) that provide an array of digital control options are also integrated.To achieve a high level of RF performance, the transceiver includes five fully integrated phase-locked loops (PLLs). Two PLLs provide low noise and low power fractional-N RF synthesis for the transmitter and receiver signal paths. A third fully integrated PLL supports an independent local oscillator (LO) mode for the observation receiver. The fourth PLL generates the clocks needed for the converters and digital circuits, and a fifth PLL provides the clock for the serial data interface.A multichip synchronization mechanism synchronizes the phase of all LOs and baseband clocks between multiple ADRV9029 chips. All voltage controlled oscillators (VCOs) and loop filter components are integrated and adjustable through the digital control interface.This device contains a fully integrated, low power digital predistortion (DPD) adaptation engine for use in power amplifier linearization. DPD enables use of high efficiency power amplifiers, reducing the power consumption of base station radios while also reducing the number of SERDES lanes necessary to interface with baseband processors.The low power crest factor reduction (CFR) engine of the ADRV9029 reduces the peak to average ratio (PAR) of the input signal, enabling higher efficiency transmit line ups while reducing the processing load on baseband processors.The serial data interface consists of four serializer lanes and four deserializer lanes. The interface supports both the JESD204B and JESD204C standards, operating at data rates up to 24.33 Gbps. The interface also supports interleaved mode for lower bandwidths, thus reducing the number of high speed data interface lanes to one. Both fixed and floating-point data formats are supported. The floating-point format allows internal automatic gain control (AGC) to be invisible to the demodulator device.The ADRV9029 is powered directly from 1.0 V, 1.3 V, and 1.8 V regulators and is controlled via a standard serial peripheral interface (SPI) serial port. Comprehensive power-down modes are included to minimize power consumption in normal use. The ADRV9029 is packaged in a 14 mm ? 14 mm, 289-ball chip scale ball grid array (CSP_BGA).APPLICATIONS3G/4G/5G TDD and FDD massive MIMO, macro and small cell base stations

The ADV3200/ADV3201 are 32 ? 32 analog crosspoint switch matrices. They feature a selectable sync-tip clamp input forac-coupled applications and an on-screen display (OSD) insertion mux. With ?48 dB of crosstalk and ?80 dB isolationat 5 MHz, the ADV3200/ADV3201 are useful in many high density routing applications. The 0.1 dB flatness out to 60 MHz makes the ADV3200/ADV3201 ideal for composite video switching.The 32 independent output buffers of the ADV3200/ADV3201 can be placed into a high impedance state for paralleling crosspoint outputs so that off-channels present minimal loading to an output bus if building a larger array. The part is available in gain of +1 (ADV3200) or +2 (ADV3201) for ease of use in back-terminated load applications. A single 5 V supply, dual ?2.5 V supplies, or dual ?3.3 V supplies (G = +2) can be used while consuming only 250 mA of idle current with all outputs enabled. The channel switching is performed via a double buffered, serial digital control, which can accommodate daisy chaining of several devices. The ADV3200/ADV3201 are packaged in a 176-lead exposed pad LQFP (24 mm ? 24 mm) and are available over the extended industrial temperature range of ?40?C to +85?C.Applications CCTV surveillance Routing of high speed signals including ????????Composite video (NTSC, PAL, S, SECAM) ????????RGB and component video routing ????????Compressed video (MPEG, Wavelet) Video conferencing?

The LTC1174 is a simple current mode DC/DC converter ideally suited for 9V to 5V, 5V to 3.3V or 5V to ?5V operation. With an internal 0.9? switch (at a supply voltage of 9V), the LTC1174 requires only four external components to construct a complete high efficiency DC/DC converter.Under a no load condition the LTC1174 draws only 130?A. In shutdown, it draws a mere 1?A making this converter ideal for current sensitive applications. In dropout, the internal P-channel MOSFET switch is turned on continuously allowing the user to maximize the life of the battery source.The maximum inductor current of the LTC1174 family is pin selectable to either 340mA or 600mA, optimizing efficiency for a wide range of applications. Operation up to 200kHz permits the use of small surface mount inductors and capacitors.For applications requiring higher output current or ultrahigh efficiency, see the LTC1148 data sheet.Applications Distributed Power Systems Step-Down Converters Inverting Converters Memory Backup Supply Portable Instruments Battery-Powered Equipment

The LT6557 is a high speed triple video ampli?er with an internal ?xed gain of 2 and a programmable DC input bias voltage. This ampli?er features a 400MHz 2VP-P signal bandwidth, 2200V/?s slew rate and a unique ability to drive heavy output loads to 0.8V of the supply rails, making the LT6557 ideal for a single 5V supply, wideband video application. With just one resistor, the inputs of all three ampli?ers can be programmed to a common voltage level, simplifying and reducing the need for external circuitry in the AC-coupled applications. Without the programmable resistor, the input bias circuit becomes inactive, allowing the use of an external clamp circuit or direct coupled input.The LT6557 has separate power supply and ground pins for each ampli?er to improve channel separation and to ease power supply bypassing. The LT6557 provides uncompromised performance in many high speed applications where a low voltage, single supply is required.The LT6557 is available in 16-lead SSOP and 5mm ? 3mm DFN packages.Applications LCD Video Projectors RGB HD Video Ampli?ers Coaxial Cable Drivers Low Supply ADC Drivers

Demonstration circuit 1021A is a high efficiency synchronous step-down DC/DC converter with 4.5V to 16V input range. It can provide 2.5V output with 10A maximum current. The demo board features the LTC3823EUH controller.

The LT3513 5-output adjustable switching regulator provides power for large TFT-LCD panels. The 38-pin 5mm ? 7mm QFN device can generate a 3.3V or 5V logic supply along with the triple output supply required for the TFT-LCD panel. A lower voltage secondary logic supply may also be generated with the addition of an external NPN driven by the internal linear regulator. A step-down regulator provides a low voltage output, VLOGIC, with up to 1.2A of current while capable of operating from a wide input range of 4.5V to 30V. A high power step-up converter, a lower power step-up converter and an inverting converter provide the three independent output voltages: AVDD, VON and VOFF required by the LCD panel. A high-side PNP provides delayed turn-on of the VON signal and can handle up to 30mA. Protection circuitry ensures that VON is disabled if any of the four outputs are more than 10% below the programmed voltage.Applications Automotive TFT-LCD Displays Large TFT-LCD Desktop Monitors Flat Panel Televisions

The LTC3812-5 is a synchronous step-down switching regulator controller that can directly step down voltages from up to 60V input, making it ideal for telecom and automotive applications. The LTC3812-5 uses a constant on-time valley current control architecture to deliver very low duty cycles with accurate cycle-by-cycle current limit without requiring a sense resistor.A precise internal reference provides 0.5% DC accuracy. A high bandwidth (25MHz) error amplifier provides very fast line and load transient response. Large 1? gate drivers allow the LTC3812-5 to drive large power MOSFETs for higher current applications. The operating frequency is selected by an external resistor and is compensated for variations in VIN. A shutdown pin allows the LTC3812-5 to be turned off reducing the supply current to <230?A.Integrated bias control generates gate drive power from the input supply during start-up and when an output short-circuit occurs, with the addition of a small external SOT23 MOSFET. When in regulation, power is derived from the output for higher efficiency. Features Adj UVLO, Sync & Tracking Package LTC3810 Vin 6.2V to 100V, 10V Driver Voltage Yes SSOP-28 LTC3810-5 Vin 4.35V to 60V, 5.5V Driver Voltage Yes QFN-32 LTC3812-5 Vin 4.35 to 60V, 5.5V Driver Voltage No TSSOP-16E Applications? 48V Telecom and Base Station Power Supplies Networking Equipment, Servers Automotive and Industrial Control Systems

Demonstration circuit 1038A-B is a 35W isolated flyback converter with synchronous rectification and primary-side regulation featuring the LT3837. This circuit was designed to demonstrate the high levels of performance, efficiency, and small solution size attainable using the part in a flyback power supply. It operates at 200kHz and produces a regulated 5V, 7A output from an input voltage range of 9V to 36V. Isolation voltage is 1500VDC.