The LTC2387-16 is a low noise, high speed, 16-bit 15Msps successive approximation register (SAR) ADC ideally suited for a wide range of applications. The combination of excellent linearity and wide dynamic range makes the LTC2387-16 ideal for high speed imaging and instrumentation applications. No-latency operation provides a unique solution for high speed control loop applications. The very low distortion at high input frequencies enables communications applications requiring wide dynamic range and significant signal bandwidth.To support high speed operation while minimizing the number of data lines, the LTC2387-16 features a serial LVDS digital interface. The LVDS interface has one-lane and two-lane output modes, allowing the user to optimize the interface data rate for each application.Applications High Speed Data Acquisition Imaging Communications Control Loops Instrumentation ATE

The ADXL317 is a small, thin, low latency, 3-axis accelerometer with high resolution (14-bit) measurement up to ?16 g. Digital output data is formatted as an I2S/time-division multiplexing (TDM) signal. Additionally, an I2C digital interface is provided for user configuration. The ADXL317 is well suited for wideband active noise control (ANC) applications. Featuring very low latency from the moment of acceleration to the transmission of digital output data, the ADXL317 is uniquely capable of responding quickly enough to allow wideband ANC systems sufficient time to respond to noise scenarios. The low noise of the ADXL317 enhances the ability of the device to accurately discriminate various external noise sources.?Due to the wide operating temperature range and high performance, the ADXL317 is ideal for other wheel well applications, such as adaptive suspension control. The Automotive Audio Bus (A2B?) developed by Analog Devices, Inc., introduces system wide savings in cabling costs. The ADXL317 is designed to interface directly with the A2B product portfolio, such as the AD2428W and?AD2425W A2B transceivers.The ADXL317 is supplied in a small, thin, 5 mm ? 5 mm ? 1.45 mm, 32-pin LFCSP package. The device is qualified for use in automotive applications over the entire operating temperature range of ?40?C to +125?C.?Note that throughout this data sheet, multifunction pins, such as DTX1/TPC, are referred to either by the entire pin name or by a single function of the pin, for example, DTX1, when only that function is relevant.?Applications Wideband ANC Adaptive suspension control?

The SSM4321 is a fully integrated, high efficiency, Class-Daudio amplifier with digitized output of output voltage, outputcurrent, and the PVDD supply voltage. It is designed to maximize performance for mobile phone applications. The application circuit requires a minimum of external components and operates from a 2.5 V to 5.5 V supply for the amplifier and a 1.42 V to 3.6 V supply for input/output. The SSM4321 is capable of delivering 2.2 W of continuous output power with 100 dB.The SSM4321 includes circuitry to sense output current, output voltage, and the PVDD supply voltage. Current sense is performedusing an external sense resistor that is connected between anoutput pin and the load. The output current and voltage are sentto ADCs with 16-bit resolution; the PVDD supply voltage is sent to an ADC with 8-bit resolution.The outputs of these ADCs are available on the TDM or I2S output serial port. The SLOT pin is used to determine which of four possible output slots is used on the TDM interface. A stereo I2S interface can be selected by reversing the pin connections forBCLK and FSYNC. Also, a direct PDM bit stream of voltage andcurrent data can be selected via the SLOT pin.Spread-spectrum pulse density modulation (PDM) is used to provide lower EMI-radiated emissions compared with other Class-D architectures. The inherent randomized nature of spread-spectrum PDM eliminates the clock intermodulation (beating effect) of several amplifiers in close proximity.The SSM4321 produces ultralow EMI emissions that significantlyreduce the radiated emissions at the Class-D outputs, particularly above 100 MHz. The ultralow EMI emissions of the SSM4321 arealso helpful for antenna and RF sensitivity problems.The device includes a highly flexible gain select pin that requiresonly one series resistor to select a gain setting of 0 dB, 3 dB, 6 dB, 9 dB, or 12 dB. Input impedance is fixed at 80 k?, independent of the selected gain.The SSM4321 has a shutdown mode with a typical shutdowncurrent of <1 ?A. Shutdown is enabled by removing the BCLK input. A clock must be present on the BCLK pin for the part to operate. The device also includes pop-and-click suppression circuitry, which minimizes voltage glitches at the output during turn-on and turn-off, reducing audible noise on activation and deactivation.The SSM4321 is specified over the industrial temperature rangeof ?40?C to +85?C. It has built-in thermal shutdown and output short-circuit protection. It is available in a halide-free, 16-ball, 0.4 mm pitch, 1.74 mm ? 1.74 mm wafer level chip scale package (WLCSP).Applications Mobile phones MP3 players Portable electronics

The ADuCM4050 microcontroller unit (MCU) is an ultra low power integrated microcontroller system with integrated power management for processing, control, and connectivity. The MCU system is based on the ARM? Cortex?-M4F processor. The MCU also has a collection of digital peripherals, embedded static random access memory (SRAM) and embedded flash memory, and an analog subsystem that provides clocking, reset, and power management capabilities in addition to an analog-to-digital converter (ADC) subsystem.This data sheet describes the ARM Cortex-M4F core and memory architecture used on the ADuCM4050 MCU. It does not provide detailed programming information about the ARM processor.The system features include an up to 52 MHz ARM Cortex-M4F processor, 512 kB of embedded flash memory with error correction code (ECC), an optional 4 kB cache for lower active power, and 128 kB system SRAM with parity. The ADuCM4050 features a power management unit (PMU), multilayer advanced microcontroller bus architecture (AMBA) bus matrix, central direct memory access (DMA) controller, and beeper interface.The ADuCM4050 features cryptographic hardware supporting advanced encryption standard (AES)-128 and AES-256 with secure hash algorithm (SHA)-256 and the following modes: electronic code book (ECB), cipher block chaining (CBC), counter (CTR), and cipher block chaining-message authentication code (CCM/CCM*) modes.The ADuCM4050 has protected key storage with key wrap/ unwrap, and keyed hashed message authentication code (HMAC) with key unwrap.The ADuCM4050 supports serial port (SPORT), serial peripheral interface (SPI), I2C, and universal asynchronous receiver/ transmitter (UART) peripheral interfaces.The ADuCM4050 features a real-time clock (RTC), general-purpose and watchdog timers, and programmable general-purpose input/output (GPIO) pins. There is a hardware cyclic redundancy check (CRC) calculator with programmable generator polynomial. The device also features a power on reset (POR) and power supply monitor (PSM), a 12-bit successive approximation register (SAR) ADC, a red/green/blue (RGB) timer for driving RGB LED, and a true random number generator (TRNG).To support low dynamic and hibernate power management, the ADuCM4050 MCU provides a collection of power modes and features such as dynamic- and software-controlled clock gating and power gating.For full details on the ADuCM4050 MCU, refer to the ADuCM4050 Ultra Low Power ARM Cortex-M4F MCU with Integrated Power Management Hardware Reference.Product Highlights Ultra low power consumption. Robust operation. Full voltage monitoring in deep sleep modes. ECC support on flash. Parity error detection on SRAM memory. Leading edge security. Fast encryption provides read protection to user algorithms. Write protection prevents device reprogramming by unauthorized code. Failure detection of 32 kHz low frequency external crystal oscillator (LFXTAL) via interrupt. SensorStrobe? for precise time synchronized sampling of external sensors. Works in hibernate mode, resulting in drastic current reduction in system solutions. Current consumption reduces by 10 times when using, for example, the ADXL363 accelerometer. Software intervention is not required after setup. No pulse drift due to software execution.Applications Internet of Things (IoT) Smart agriculture, smart building, smart metering, smart city, smart machine, and sensor network Wearables Fitness and clinical Machine learning and neural networks

The ADF7030-1 is a fully integrated, radio transceiver achieving high performance at very low power. The ADF7030-1 is ideally suited for applications that require long range, network robustness, and long battery life. It is suitable for applications that operate in the ISM, SRD, and licensed frequency bands at 169.4 MHz to 169.6 MHz, 426 MHz to 470 MHz, and 863 MHz to 960 MHz. It provides extensive support for standards-based protocols like IEEE802.15.4g while also providing flexibility to support a wide range of proprietary protocols.The highly configurable low intermediate frequency (IF) receiver supports a large range of receiver channel bandwidths from 2.6 kHz to 406 kHz. This range of receiver channel bandwidths allows the ADF7030-1 to support ultranarrow-band, narrow-band, and wideband channel spacing.The ADF7030-1 features two independent PAs supporting output power ranges of ?20 dBm to +13 dBm and ?20 dBm to +17 dBm. The PAs support ultrafine adjustment of the power with a step resolution of 0.1 dB. The PA output power is exceptionally robust over temperature and voltage. The PAs have an automatic power ramp control to limit spectral splatter to meet regulatory standards.The ADF7030-1 features an on-chip ARM??Cortex?-M0 processor that performs radio control, radio calibration, and packet management. Cortex-M0 eases the processing burden of the host processor because the ADF7030-1 integrates the lower layers of a typical communication protocol stack. This internal processor also permits the download and execution of Analog Devices, Inc., provided firmware modules that can extend the functionality of the ADF7030-1.The ADF7030-1 has two packet modes: generic packet mode and IEEE802.15.4g mode. In generic packet mode, the packet format is highly flexible and fully programmable, thereby ensuring its compatibility with proprietary packet formats. In IEEE802.15.4g packet mode, the packet format conforms to the?IEEE802.15.4g standard. FEC, as per the IEEE802.15.4g standard, is also supported.The ADF7030-1 operates with a power supply range of 2.2 V to 3.6 V and has very low power consumption in both Tx and Rx modes, enabling long lifetimes in battery-operated systems. An ultralow power deep sleep mode achieves a typical current of 10 nA with the configuration memory retained.A complete wireless solution can be built using a small number of external discrete components and a host processor (typically a microcontroller). The host processor can configure the ADF7030-1 using a simple command-based protocol over a standard 4-wire SPI interface. A single-byte command transitions the radio between states or performs a radio function.The ADF7030-1 is available in two package types: a 6 mm ? 6 mm, 40-lead LFCSP and a 7 mm ? 7 mm, 48-lead LQFP. Both package types use NiPdAu plating to mitigate against silver migration in high humidity applications. The ADF7030-1 operating temperature range is ?40?C to +85?C.For Figure 13 to Figure 19, Figure 30, Figure 42, Figure 60, Figure 61, and Figure 75 in the Typical Performance Characteristics section, PA_COARSE is a programmable value that provides a coarse adjustment of the PA output power. This value can be programmed in the range of 1 to 6 for PA1, and from 1 to 10 for PA2. PA_FINE is a programmable value that provides a fine adjustment of the PA output power. This value can be programmed in the range of 3 to 127 for both PA1 and PA2. PA_MICRO is a programmable value that provides a microadjustment (typically <0.1 dB) of the PA output power. This value can be programmed in the range of 1 to 31 for both PA1 and PA2. PAOLDO_VOUT_CON is a programmable value that configures the internal LDO voltage that provides bias for the PA. For additional information on these bit settings, see the ADF7030-1 Software Reference Manual, which is the detailed programming guide for the device.Applications IEEE 802.15.4g (MR-FSK PHY)? Wireless M-Bus (EN 13757-4) Smart metering Security and building automation? Active tag asset tracking Industrial control Wireless sensor networks (WSNs)

The ADuCM3027/ADuCM3029 microcontroller units (MCUs) are ultra low power microcontroller systems with integrated power management for processing, control, and connectivity. The MCU system is based on the ARM? Cortex?-M3 processor, a collection of digital peripherals, embedded SRAM and flash memory, and an analog subsystem which provides clocking, reset, and power management capability in addition to an analog-to-digital converter (ADC) subsystem. For a feature comparison across the ADuCM3027/ADuCM3029 product offerings, see Table 1. Table 1. Product Flash Memory Options Device Embedded Flash Memory Size ADuCM3029 256 kB ADuCM3027 128 kB System features that are common across the ADuCM3027/ADuCM3029/ADuCM3029-1/ADuCM3029-2 MCUs include the following: Up to 26 MHz ARM Cortex-M3 processor Up to 256 kB of embedded flash memory with error correction code (ECC) Optional 4 kB cache for lower active power 64 kB system SRAM with parity Power management unit (PMU) Multilayer advanced microcontroller bus architecture (AMBA) bus matrix Central direct memory access (DMA) controller Beeper interface Serial port (SPORT), serial peripheral interface (SPI), inter-integrated circuit (I2C), and universal asynchronous receiver/transmitter (UART) peripheral interfaces Cryptographic hardware support with advanced encryption standard (AES) and secure hash algorithm (SHA)-256 Real-time clock (RTC) General-purpose and watchdog timers Programmable general-purpose input/output (GPIO) pins Hardware cyclic redundancy check (CRC) calculator with programmable generator polynomial Power-on reset (POR) and power supply monitor (PSM) 12-bit successive approximation register (SAR) ADC True random number generator (TRNG)To support low dynamic and hibernate power management, the ADuCM3027/ADuCM3029 MCUs provide a collection of power modes and features, such as dynamic and software controlled clock gating and power gating.The ADuCM3029-1 and ADuCM3029-2 MCU models share the same features and functionality as that of the ADuCM3029 MCU. All specifications pertaining to the ADuCM3027 and ADuCM3029 are also applicable to the ADuCM3029-1 and ADuCM3029-2.For full details on the ADuCM3027/ADuCM3029 MCUs, refer to the ADuCM302x Ultra Low Power ARM Cortex-M3 MCU with Integrated Power Management Hardware Reference Manual.Product Highlights Industry leading ultralow power consumption. Robust operation, including full voltage monitoring in deep sleep modes, ECC support on flash, and parity error detection on SRAM memory. Leading edge security. Fast encryption provides read protection to customer algorithms. Write protection prevents device reprogramming by unauthorized code. Failure detection of 32 kHz LFXTAL via interrupt. SensorStrobe? for precise time synchronized sampling of external sensors. Works in hibernate mode, resulting in drastic current reduction in system solutions. Current consumption reduces by 10 times when using, for example, the ADXL363 accelerometer. Software intervention is not required after setup. No pulse drift due to software execution.Applications Internet of Things (IoT) Electronic shelf label (ESL) and signage Smart infrastructure Smart lock Asset tracking Smart machine, smart metering, smart building, smart city, and smart agriculture Wearables Fitness and clinical Machine learning and neural network?

Reaching speeds of up to 1 GHz, the ADSP-SC598/SC596/SC595 processors are members of the ADSP-SC59x SHARC? family of products. Containing the same dual-SHARC+? DSP core architecture as the ADSP-SC594/SC592/SC591, these processors upgrade the integrated Arm core to a Cortex-A55 running at up to 1.2 GHz. The A55 processor, with FPU and Neon? DSP extensions, handles additional real-time processing tasks and manages peripherals used to interface to time-critical data in audio applications. These interfaces include Gigabit Ethernet, USB High-Speed, CAN FD, and a rich variety of other connectivity options for a flexible and simplified system design.The ADSP-SC59x SHARC processors are members of the SIMD SHARC family of digital signal processors (DSPs) that feature Analog Devices, Inc., Super Harvard Architecture. These 32-bit/40-bit/64-bit floating-point processors are optimized for high performance audio/floating-point applications with large on-chip static random-access memory (SRAM), multiple internal buses that eliminate input/output (I/O) bottlenecks, and innovative digital audio interfaces (DAI). New additions to the SHARC+ core include cache enhancements and branch prediction, while maintaining instruction set compatibility to previous SHARC products.By integrating a rich set of industry-leading system peripherals and memory (see Table 1 in the data sheet), the SHARC+ processor is the platform of choice for applications that require programmability similar to reduced instruction set computing (RISC), multimedia support, and leading edge signal processing in one integrated package. These applications span a wide array of markets, including automotive, professional audio, and industrial-based applications that require high floating-point performance.APPLICATIONS Automotive: audio amplifier, head unit, ANC/RNC, rear seat entertainment, digital cockpit, ADAS Consumer & Professional Audio: speakers, sound bars, AVRs, conferencing systems, mixing consoles, microphone arrays, headphones

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