Power Management IC Development Tools

Power Management IC Development Tools 2A 500/1500kHz Synchronous SIMPLE SWITCH

Power Management IC Development Tools 2.3-5.5Vin 05Vout 2 to 4A Eval

Power Management IC Development Tools 3-17Vin 5.0Vout 1A Eval

EMC Compatible Automotive LED Rear Lamp With Sequential Turn Animation Evaluation Module

The LMK05318EVM is an evaluation module for the LMK05318 Network Synchronizer Clock device. The EVM can be used as a flexible, synchronous clock source for rapid evaluation, compliance testing, and system prototyping. SMA ports provide access to the LMK05318 clock inputs and outputs for interfacing to 50-Ω test equipment. Onboard XO options are included, but can be reworked using the various XO/TCXO/OCXO footprint options or else bypassed to use the external SMA input.

The LMK05318EVM provides a USB-based interface to access the I2C/SPI bus and control pins of the LMK05318. The TICS PRO software GUI can be used to program the LMK05318's registers and EEPROM to store custom start-up clock settings.

Features:

• One Digital PLL (DPLL) with programmable bandwidths and Two Fractional Analog PLLs (APLLs) for Flexible Clock Generation
• Two reference inputs to the DPLL supporting hitless switching & holdover
• Eight output clocks with 50-fs RMS phase jitter (12 kHz to 20 MHz)
• On-chip EEPROM for custom start-up clock configurations
• Flexible oscillator sources: onboard XOs or external SMA input options
• USB interface supports I2C/SPI control register access and general-purpose input pin control

Whats included:

• 3-ft. Mini-USB Cable (MPN 3021003-03)

STM32F303 EVAL BRD

ISL76534EVAL1Z - EVAL BOARD 1, 28LD, X2QFN, ROHS COMPLIANT

The AD9575 provides a highly integrated, dual output clockgenerator function including an on-chip PLL core that isoptimized for network clocking. The integer-N PLL design isbased on the Analog Devices, Inc., proven portfolio of high performance, low jitter frequency synthesizers to maximize linecard performance. Other applications with demanding phasenoise and jitter requirements also benefit from this part.The PLL section consists of a low noise phase frequency detector (PFD), a precision charge pump, a low phase noise voltagecontrolled oscillator (VCO), and pin selectable feedback and output dividers.By connecting an external crystal, popular network output frequencies can be locked to the input reference. The output divider and feedback divider ratios are pin programmable for therequired output rates. No external loop filter components are required, thus conserving valuable design time and board space.The AD9575 is available in a 16-lead, 4.4 mm ? 5.0 mm TSSOP and can be operated from a single 3.3 V supply. The temperature range is ?40?C to +85?C. APPLICATIONS GbE/FC/SONET line cards, switches, and routers CPU/PCI-E applications Low jitter, low phase noise clock generation

Data Acquisition ADCs/DACs - Specialised IC Var Resolution R/ D Converter