HPA00771PWR
Texas Instruments
Category: Clock, Timing and Frequency Control
PLL Clock Driver for Synch. DRAM & Gen. Purp. Apps W/Spread Spectrum Compatibility, Power Down Mode 8-TSSOP -40 to 85
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Technical Specifications
| Lead Free Status | No |
| ROHS Compliance | Not Compliant |
| Absolute Jitter (Peak-to-Peak Cycle or Period Jitter)(ps) | 150 |
| Approx. Price (US$) | 1.02 | 1ku |
| Function | SDR |
| Number of Outputs | 4 |
| Operating Frequency Range(Max)(MHz) | 200 |
| Operating Frequency Range(Min)(MHz) | 24 |
| Operating Temperature Range(C) | -40 to 85 |
| Output Drive(mA) | 12 |
| Package Group | SOIC,TSSOP |
| Package Size | mm2 |
| Rating | Catalog |
| VCC(V) | 3.3 |
| t(phase error)(ps) | 150 |
| tsk(o)(ps) | 150 |