The OP191, OP291 and OP491 are single, dual and quad micropower, single-supply, 3 MHz bandwidth amplifiers featuring rail-to-rail inputs and outputs. All are guaranteed to operate from a 3 volt single supply as well as ±5 volt dual supplies.Fabricated on Analog Devices' CBCMOS process, the OP191 family has a unique input stage that allows the input voltage to safely extend 10 volts beyond either supply without any phase inversion or latch-up. The output voltage swings to within millivolts of the supplies and continues to sink or source current all the way to the supplies.Applications for these amplifiers include portable telecom equipment, power supply control and protection, and interface for transducers with wide output ranges. Sensors requiring a rail-to-rail input amplifier include Hall effect, piezo electric, and resistive transducers.The ability to swing rail-to-rail at both the input and output enables designers to build multistage filters in single-supply systems and maintain high signal-to-noise ratios.The OP191/OP291/OP491 are specified over the extended industrial (-40°C to +125°C) temperature range. The OP191 single and OP291 dual amplifiers are available in 8-pin plastic DIPs and SO surface mount packages. The OP491 quad is available in 14-pin DIPs and narrow 14-pin SO packages. Consult factory for OP491 TSSOP availability.

The OP497 is a quad op amp with precision performance in the space-saving, industry standard 16-lead SOlC package. Its combination of exceptional precision with low power and extremely low input bias current makes the quad OP497 useful in a wide variety of applications.Precision performance of the OP497 includes very low offset (120 dB. The OP497 has a power supply rejection of >120 dB which minimizes offset voltage changes experienced in battery-powered systems. The supply current of the OP497 is The OP497 uses a superbeta input stage with bias current cancellation to maintain picoamp bias currents at all temperatures. This is in contrast to FET input op amps whose bias currents start in the picoamp range at 25°C but double for every 10°C rise in temperature to reach the nanoamp range above 85°C. The input bias current of the OP497 is Combining precision, low power, and low bias current, the OP497 is ideal for a number of applications, including instrumentation amplifiers, log amplifiers, photodiode preamplifiers, and long-term integrators. For a single device, see the OP97 data sheet, and for a dual device, see the OP297 data sheet.

The AD585 is a complete monolithic sample-and-hold circuit consisting of a high performance operational amplifier in series with an ultralow leakage analog switch and a FET input integrating amplifier. An internal holding capacitor and matched applications resistors have been provided for high precision and applications flexibility.The performance of the AD585 makes it ideal for high speed 10- and 12-bit data acquisition systems, where fast acquisition time, low sample-to-hold offset, and low droop are critical. The AD585 can acquire a signal to ±0.01% in 3 µs maximum, and then hold that signal with a maximum sample-to-hold offset of 3 mV and less than 1 mV/ms droop, using the on-chip hold capacitor. If lower droop is required, it is possible to add a larger external hold capacitor.The high speed analog switch used in the AD585 exhibits aperture jitter of 0.5 ns, enabling the device to sample full scale (20 V peak-to-peak) signals at frequencies up to 78 kHz with 12-bit precision.The AD585 can be used with any user-defined feedback net-work to provide any desired gain in the sample mode. On-chip precision thin-film resistors can be used to provide gains of +1, -1, or +2. Output impedance in the hold mode is sufficiently low to maintain an accurate output signal even when driving the dynamic load presented by a successive-approximation A/D converter. However, the output is protected against damage from accidental short circuits.The control signal for the HOLD command can be either active high or active low. The differential HOLD signal is compatible with all logic families, if a suitable reference level is provided. An on-chip TTL reference level is provided for TTL compatibility.The AD585 is available in three performance grades. The JP grade is specified for the 0°C to +70°C commercial temperature range and packaged in a 20-pin PLCC. The AQ grade is specified for the -25°C to +85°C industrial temperature range and is packaged in a 14-pin cerdip. The SQ and SE grades are specified for the -55°C to +125°C military temperature range and are packaged in a 14-pin cerdip and 20-pin LCC.

The AD585 is a complete monolithic sample-and-hold circuit consisting of a high performance operational amplifier in series with an ultralow leakage analog switch and a FET input integrating amplifier. An internal holding capacitor and matched applications resistors have been provided for high precision and applications flexibility.The performance of the AD585 makes it ideal for high speed 10- and 12-bit data acquisition systems, where fast acquisition time, low sample-to-hold offset, and low droop are critical. The AD585 can acquire a signal to ±0.01% in 3 µs maximum, and then hold that signal with a maximum sample-to-hold offset of 3 mV and less than 1 mV/ms droop, using the on-chip hold capacitor. If lower droop is required, it is possible to add a larger external hold capacitor.The high speed analog switch used in the AD585 exhibits aperture jitter of 0.5 ns, enabling the device to sample full scale (20 V peak-to-peak) signals at frequencies up to 78 kHz with 12-bit precision.The AD585 can be used with any user-defined feedback net-work to provide any desired gain in the sample mode. On-chip precision thin-film resistors can be used to provide gains of +1, -1, or +2. Output impedance in the hold mode is sufficiently low to maintain an accurate output signal even when driving the dynamic load presented by a successive-approximation A/D converter. However, the output is protected against damage from accidental short circuits.The control signal for the HOLD command can be either active high or active low. The differential HOLD signal is compatible with all logic families, if a suitable reference level is provided. An on-chip TTL reference level is provided for TTL compatibility.The AD585 is available in three performance grades. The JP grade is specified for the 0°C to +70°C commercial temperature range and packaged in a 20-pin PLCC. The AQ grade is specified for the -25°C to +85°C industrial temperature range and is packaged in a 14-pin cerdip. The SQ and SE grades are specified for the -55°C to +125°C military temperature range and are packaged in a 14-pin cerdip and 20-pin LCC.

The AD585 is a complete monolithic sample-and-hold circuit consisting of a high performance operational amplifier in series with an ultralow leakage analog switch and a FET input integrating amplifier. An internal holding capacitor and matched applications resistors have been provided for high precision and applications flexibility.The performance of the AD585 makes it ideal for high speed 10- and 12-bit data acquisition systems, where fast acquisition time, low sample-to-hold offset, and low droop are critical. The AD585 can acquire a signal to ±0.01% in 3 µs maximum, and then hold that signal with a maximum sample-to-hold offset of 3 mV and less than 1 mV/ms droop, using the on-chip hold capacitor. If lower droop is required, it is possible to add a larger external hold capacitor.The high speed analog switch used in the AD585 exhibits aperture jitter of 0.5 ns, enabling the device to sample full scale (20 V peak-to-peak) signals at frequencies up to 78 kHz with 12-bit precision.The AD585 can be used with any user-defined feedback net-work to provide any desired gain in the sample mode. On-chip precision thin-film resistors can be used to provide gains of +1, -1, or +2. Output impedance in the hold mode is sufficiently low to maintain an accurate output signal even when driving the dynamic load presented by a successive-approximation A/D converter. However, the output is protected against damage from accidental short circuits.The control signal for the HOLD command can be either active high or active low. The differential HOLD signal is compatible with all logic families, if a suitable reference level is provided. An on-chip TTL reference level is provided for TTL compatibility.The AD585 is available in three performance grades. The JP grade is specified for the 0°C to +70°C commercial temperature range and packaged in a 20-pin PLCC. The AQ grade is specified for the -25°C to +85°C industrial temperature range and is packaged in a 14-pin cerdip. The SQ and SE grades are specified for the -55°C to +125°C military temperature range and are packaged in a 14-pin cerdip and 20-pin LCC.

The AD684 is a monolithic quad sample-and-hold amplifier (SHA). It features four complete sampling channels, each controlled by an independent hold command. Each SHA is complete with an internal hold capacitor. The high accuracy SHA channels are self-contained and require no external components or adjustments. The AD684 is manufactured on a BiMOS process which provides a merger of high performance bipolar circuitry and low power CMOS logic.The AD684 is ideal for high performance, multichannel data acquisition systems. Each SHA channel can acquire a signal in less than 1 µs and retain the held value with a droop rate of less than 0.01 µV/µs. Excellent linearity and ac performance make the AD684 an ideal front end for high speed 12- and 14-bit ADCs.The AD684 has a self-correcting architecture that minimizes hold mode errors and insures accuracy over temperature. Each channel of the AD684 is capable of sourcing 5 mA and incorporates output short circuit protection.The AD684 is specified for three temperature ranges. The J grade device is specified for operation from 0 to +70°C, the A grade from -40°C to +85°C and the S grade from -55°C to +125°C.

22 μA, RRIO, CMOS, 18 V Operational Amplifier

High Efficiency, Ground-Referenced Class-G Headphone Amplifier

OP AMP PRECISION 16.7MHZ 8SOIC; No. of Amplifiers:2 Amplifier; Bandwidth:16.7MHz; Slew Rate:25V/µs; Supply Voltage Range:± 4.5V to ± 18V; Amplifier Case Style:SOIC; No. of Pins:8Pins; Operating Temperature Min:-40°C; Operating Temperature Max:125°C; Packaging:Each; Product Range:-; Automotive Qualification Standard:-; MSL:MSL 1 - Unlimited; SVHC:No SVHC (20-Jun-2016); Amplifer Supply Voltage:± 4.5V to ± 18V; No. of Amplifiers:2Amplifiers; Op Amp Type:JFET; Operating Temperature Range:-40°C to +125°C

Low Power, Unity Gain Fully Differential Amplifier & ADC Driver Features: Very low power - 330 μA supply current Fully differential or single-ended inputs/outputs Differential output designed to drive precision ADCs - Drives switched capacitor and Σ-Δ ADCs - Rail-to-rail output VOCM pin adjusts output common mode Robust overvoltage up to 18 V beyond supplies High performance - Suitable for driving 16-bit converter up to 250 kSPS - 39 nV/√Hz output noise - 1 ppm/°C gain drift - 200 μV maximum output offset - 10 V/μs slew rate - 5 MHz bandwidth Single supply: 3 V to 18 V Dual supplies: ±1.5 V to ±9 V