The HMC513LP5(E) is a GaAs InGaP Heterojunction Bipolar Transistor (HBT) MMIC VCOs. The HMC513LP5(E) integrates resonators, negative resistance devices, varactor diodes and feature half frequency and divide-by- 4 outputs. The VCO’s phase noise performance is excellent over temperature, shock, and process due to the oscillator’s monolithic structure. Power output is +7 dBm typical from a +3V supply voltage. The prescaler function can be disabled to conserve current if not required. The voltage controlled oscillator is packaged in a leadless QFN 5×5 mm surface mount package, and requires no external matching components.APPLICATIONS VSAT Radio Point-to-Point/Multi-Point Radio  Test Equipment & Industrial Controls  Military End-Use

The HMC515LP5(E) is a GaAs InGaP Heterojunction Bipolar Transistor (HBT) MMIC VCO. The HMC515LP5(E) integrates resonators, negative resistance devices, varactor diodes and feature half frequency and divide-by-4 outputs. The VCO’s phase noise performance is excellent over temperature, shock, and process due to the oscillator’s monolithic structure. Power output is +10 dBm typical from a +5V supply voltage. The prescaler function can be disabled to conserve current if not required. The voltage controlled oscillator is packaged in a leadless QFN 5x5 mm surface mount package, and requires no external matching components.APPLICATIONS VSAT Radio  Point-to-Point/Multi-Point Radio  Test Equipment & Industrial Controls  Military End-Use

The ADF4368 is a high performance, ultralow jitter, integer-N and fractional-N phase-locked loop (PLL) with integrated VCO ideally suited for frequency conversion applications.The high performance PLL has a figure of merit of -239dBc/Hz, very low 1/f Noise of normalized -287dBc/Hz and high PFD frequency that can achieve ultralow in-band noise and integrated jitter. The ADF4368 can generate any frequency from 800 MHz to 12.8 GHz without an internal doubler, thereby eliminating the need for sub-harmonic filters. Σ-Δ modulator includes a 25-bit fixed modulus which allows hertz frequency resolution and an additional 24-bit variable modulus which allows even finer resolution and flexibility for frequency planning. 9 dBm output power at 12.8 GHz in single ended configuration with 16 step power adjust feature makes it very useful for any application.For multiple frequency conversion applications such as phase array radar or massive MIMO systems, the outputs of multiple ADF4368 can be aligned by using SYNC input or EZSync. EZSync method is used when it is difficult to distribute the SYNC signal to all parts precisely. For applications that require deterministic delay or delay adjustment capability, a programmable reference to output delay with The simplicity of the ADF4368 block diagram eases development time with a simplified SPI register map, external SYNC input and repeatable multi-chip phase alignment both in integer and fractional mode.APPLICATIONSWireless infrastructure (MC-GSM, 5G)Test and MeasurementAerospace and Defense

The HMC582LP5(E) is a GaAs InGaP Herterojunction Bipolar Transistor (HBT) MMIC VCOs. The HMC582LP5(E) integrates resonators, negative resistance devices, varactor diodes and feature half frequency and divide-by-4 outputs. The VCO's phase noise performance is excellent over temperature, shock and process due to the oscillator's monolithic structure.Power output is +9 dBm typical from a +5V supply voltage. The prescaler and RF/2 functions can be disabled to conserve current if not required. The voltage controlled oscillator is packaged in a leadless QFN 5×5 mm surface mount package, and requires no external matching components.APPLICATIONS Point-to-Point Radios Point-to-Multi-Point Radios Test Equipment & Industrial Controls SATCOM Military End-Use

Clock & Timer Development Tools LTC6995-2 Demo Board - 1sec Power-on Res

The ADF41020 frequency synthesizer can be used to implement local oscillators as high as 18 GHz in the up conversion and down conversion sections of wireless receivers and transmitters. It consists of a low noise, digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider, and high frequency programmable feedback dividers (A, B, and P). A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). The synthesizer can be used to drive external microwave VCOs via an active loop filter. Its very high bandwidth means a frequency doubler stage can be eliminated, simplifying system architecture and reducing cost. The ADF41020 is software-compatible with the existing ADF4106/ADF4107/ADF4108 family of devices from Analog Devices, Inc. Their pinouts match very closely with the exception of the ADF41020’s single-ended RF input pin, meaning only a minor layout change is required when updating current designs.Applications Microwave point-to-point/multipoint radios Wireless infrastructure VSAT radios Test equipment Instrumentation

The ADCLK854 is a 1.2 GHz/250 MHz LVDS/CMOS fanout buffer optimized for low jitter and low power operation. Possible configurations range from 12 LVDS to 24 CMOS outputs, including combinations of LVDS and CMOS outputs. Three control lines are used to determine whether fixed blocks of outputs (three banks of four) are LVDS or CMOS outputs.The ADCLK854 offers two selectable inputs and a sleep mode feature. The IN_SEL pin state determines which input is fanned out to all the outputs. The SLEEP pin enables a sleep mode to power down the device.The inputs accept various types of single-ended and differential logic levels including LVPECL, LVDS, HSTL, CML, and CMOS. Table 8 provides interface options for each type of connection.This device is available in a 48-pin LFCSP package. It is specified for operation over the standard industrial temperature range of −40°C to +85°C.APPLICATIONSLow jitter clock distributionClock and data signal restorationLevel translationWireless communicationsWired communicationsMedical and industrial imagingATE and high performance instrumentation

The ADCLK948 is an ultrafast clock fanout buffer fabricated on the Analog Devices, Inc., proprietary XFCB3 silicon germanium (SiGe) bipolar process. This device is designed for high speed applications requiring low jitter.The device has two selectable differential inputs via the IN_SEL control pin. Both inputs are equipped with center tapped, differential, 100 Ω on-chip termination resistors. The inputs accept dc-coupled LVPECL, CML, 3.3 V CMOS (single-ended), and ac-coupled 1.8 V CMOS, LVDS, and LVPECL inputs. A VREFx pin is available for biasing ac-coupled inputs. The ADCLK948 features eight full-swing emitter coupled logic(ECL) output drivers. For LVPECL (positive ECL) operation, bias VCC to the positive supply and VEE to ground. For ECL operation, bias VCC to ground and VEE to the negative supply.The output stages are designed to directly drive 800 mV eachside into 50 Ω terminated to VCC -2V for a total differential output swing of 1.6V. The ADCLK948 is available in a 32-lead LFCSP and specified for operation over the standard industrial temperature range of −40°C to +85°C.APPLICATIONS Low jitter clock distribution Clock and data signal restoration Level translation Wireless communications Wired communications Medical and industrial imaging ATE and high performance instrumentation

The AD9557 is a low loop bandwidth clock multiplier that provides jitter cleanup and synchronization for many systems, including synchronous optical networks (OTN/SONET/SDH). The AD9557 generates an output clock synchronized to up to four external input references. The digital PLL allows for reduction of input time jitter or phase noise associated with the external references. The digitally controlled loop and holdover circuitry of the AD9557 continuously generates a low jitter output clock even when all reference inputs have failed.The AD9557 operates over an industrial temperature range of −40°C to +85°C. If more inputs/outputs are needed, refer to the AD9558 for the four-input/six-output version of the samedevice.Applications Network synchronization, including synchronous Ethernet and SDH to OTN mapping/demapping Cleanup of reference clock jitter SONET/SDH/OTN clocks up to 100 Gbps, including FEC Stratum 3 holdover, jitter cleanup, and phase transient control Wireless base station controllers Cable infrastructure Data communications

The AD9837 is a low power, programmable waveform generatorcapable of producing sine, triangular, and square wave outputs.Waveform generation is required in various types of sensing,actuation, and time domain reflectometry (TDR) applications. The outputfrequency and phase are software programmable, allowing easytuning. The frequency registers are 28 bits: with a 16 MHz clock rate, resolution of 0.06 Hz can be achieved; with a 5 MHz clock rate, the AD9837can be tuned to 0.02 Hz resolution.The AD9837 is written to via a 3-wire serial interface. This serialinterface operates at clock rates up to 40 MHz and is compatiblewith DSP and microcontroller standards. The device operateswith a power supply from 2.3 V to 5.5 V.The AD9837 has a power-down (SLEEP) function. Sections of the device that are not being used can be powered down to minimize the current consumption of the part. For example, the DAC can be powered down when a clock output is being generated.The AD9837 is available in a 10-lead LFCSP_WD package.APPLICATIONS Frequency stimulus/waveform generation Liquid and gas flow measurement Sensory applications: proximity, motion, and defect detection Line loss/attenuation Test and medical equipment Sweep/clock generators Time domain reflectometry (TDR) applications