Digital to Analog Converters - DAC PARALLEL 12-B IOUT DAC IC

Digital to Analog Converters - DAC Single 3V 12bit SPI DAC with reference

Analog to Digital Converters - ADC CMOS CONVERTER IC

12-Bit High Speed Multiplying D/A Converter Features: Differential Nonlinearity: ±1/2 LSB Nonlinearity: 0.05% Fast Settling Time: 250 ns High Compliance: -5 V to +10 V Differential Outputs: 0 to 4 mA Guaranteed Monotonicity: 12 bits Low Full-Scale Tempco: 10 ppm/°C Circuit Interface to TTL, CMOS, ECL, PMOS/NMOS Low Power Consumption: 225 mW Industry Standard AM6012 Pinout Available in Die Form

Quad 8-Bit Multiplying CMOS D/A Converter with Memory Features: Four DACs in a 28 Pin, 0.6 Inch Wide DIP or 28-Pin JEDEC Plastic Chip Carrier ±1/4 LSB Endpoint Linearity Guaranteed Monotonic DACs Matched to Within 1% Microprocessor Compatible Read/Write Capability (with Memory) TTL/CMOS Compatible Four-Quadrant Multiplication Single-Supply Operation (+5 V) Low Power Consumption Latch-Up Resistant Available in Die Form

Robust, Triple Ch. Isolator W/ Output Enable & 0 Reverse Channels Features: High common-mode transient immunity: 100 kV/µs High robustness to radiated and conducted noise Low propagation delay 13 ns maximum for 5 V operation 15 ns maximum for 1.8 V operation 150 Mbps maximum guaranteed data rate Backward compatibility ADuM130E1/ADuM131E1 pin compatible with ADuM1300/ADUM1301 Low dynamic power consumption 1.8 V to 5 V level translation High temperature operation: 125°C Fail-safe high or low options 16-lead, RoHS compliant, SOIC package See data sheet for additional information

Touch Screen Controllers Touch Screen Digitizer with Dac I.C.

14-Bit, 80 MSPS/105 MSPS/125 MSPS, 1.8 V Analog-to-Digital Converter Features: 1.8 V analog supply operation 1.8 V to 3.3 V output supply SNR = 71.7 dBc (72.7 dBFS) to 70 MHz input SFDR = 85 dBc to 70 MHz input Low power: 395 mW @ 125 MSPS Differential input with 650 MHz bandwidth On-chip voltage reference and sample-and-hold amplifier DNL = ±0.4 LSB Flexible analog input: 1 V p-p to 2 V p-p range Offset binary, Gray code, or twos complement data format Data output clock and clock duty cycle stabilizer Serial port control Built-in selectable digital test pattern generation Programmable clock and data alignment

14-Bit, 80 MSPS/105 MSPS/125 MSPS, 1.8 V Analog-to-Digital Converter Features: 1.8 V analog supply operation 1.8 V to 3.3 V output supply SNR = 71.7 dBc (72.7 dBFS) to 70 MHz input SFDR = 85 dBc to 70 MHz input Low power: 395 mW @ 125 MSPS Differential input with 650 MHz bandwidth On-chip voltage reference and sample-and-hold amplifier DNL = ±0.4 LSB Flexible analog input: 1 V p-p to 2 V p-p range Offset binary, Gray code, or twos complement data format Data output clock and clock duty cycle stabilizer Serial port control Built-in selectable digital test pattern generation Programmable clock and data alignment

Octal LNA/VGA/AAF/ADC and Crosspoint Switch Features: 8 channels of LNA, VGA, AAF, and ADC Low noise preamplifier (LNA) - See data sheet for additional information Variable gain amplifier (VGA) - See data sheet for additional information Antialiasing filter (AAF) - See data sheet for additional information Analog-to-digital converter (ADC) - See data sheet for additional information Includes an 8 × 8 differential crosspoint switch to support continuous wave (CW) Doppler Low power, 195 mW per channel at 12 bits/40 MSPS (TGC) See data sheet for additional features