12-Bit, 500ksps Serial Sampling ADC in TSOT Features: 500ksps Throughput Rate No Cycle Latency Guaranteed 12-Bit No Missing Codes Single 3V or 5V Supply Low Noise: 73dB SNR Low Power: 8mW at 500ksps and 3V Supply Low Drift (20ppm/°C Maximum) 2.048V or 4.096V Internal Reference Sleep Mode with < 1μA Typical Supply Current Nap Mode with Quick Wake-Up < 1 Conversion Separate 1.8V to 5V Digital I/O Supply High Speed SPI-Compatible Serial I/O Guaranteed Operation from –40°C to 125°C 8-Lead TSOT-23 Package

14-Bit, 125Msps Low Power Dual ADCs Features: Two-Channel Simultaneously Sampling ADC 73.1dB SNR 90dB SFDR Low Power: 189mW/149mW/113mW Total 95mW/75mW/57mW per Channel Single 1.8V Supply CMOS, DDR CMOS, or DDR LVDS Outputs Selectable Input Ranges: 1VP-P to 2VP-P 750MHz Full Power Bandwidth S/H Optional Data Output Randomizer Optional Clock Duty Cycle Stabilizer Shutdown and Nap Modes Serial SPI Port for Configuration 64-Pin (9mm × 9mm) QFN Package

16-Bit, 1Msps, Low Power SAR ADC with 97dB SNR Features:1Msps Throughput Rate±0.5LSB INL (Max)Guaranteed 16-Bit No Missing CodesLow Power: 13.5mW at 1Msps, 13.5μW at 1ksps97dB SNR (Typ) at fIN = 2kHz–122dB THD (Typ) at fIN = 2kHzDigital Gain Compression (DGC)Guaranteed Operation to 125°C2.5V SupplyFully Differential Input Range ±VREFVREF Input Range from 2.5V to 5.1VNo Pipeline Delay, No Cycle Latency1.8V to 5V I/O VoltagesSPI-Compatible Serial I/O with Daisy-Chain ModeInternal Conversion Clock16-Lead MSOP and 4mm × 3mm DFN Packages

16-Bit, 250ksps, Pseudo-Differential Unipolar SAR ADC with 94.7dB SNR Features:250ksps Throughput Rate±0.75LSB INL (Max)Guaranteed 16-Bit No Missing CodesLow Power: 3.4mW at 250ksps, 3.4μW at 250sps94.7dB SNR (Typ) at fIN = 2kHz–120dB THD (Typ) at fIN = 2kHzGuaranteed Operation to 125°C2.5V SupplyPseudo-Differential Unipolar Input Range: 0V to VREFVREF Input Range from 2.5V to 5.1VNo Pipeline Delay, No Cycle Latency1.8V to 5V I/O VoltagesSPI-Compatible Serial I/O with Daisy-Chain ModeInternal Conversion Clock16-Lead MSOP and 4mm × 3mm DFN Packages

14-Bit, 65Msps Low Power Octal ADCs Features:8-Channel Simultaneous Sampling ADC73dB SNR90dB SFDRLow Power: 88mW/59mW/46mW per ChannelSingle 1.8V SupplySerial LVDS Outputs: 1 or 2 Bits per ChannelSelectable Input Ranges: 1VP-P to 2VP-P800MHz Full Power Bandwidth S/HShutdown and Nap ModesSerial SPI Port for ConfigurationInternal Bypass Capacitance, No External Components140-Pin (11.25mm × 9mm) BGA Package

18-Bit, 2 MSPS/1 MSPS/500 kSPS, Precision, Pseudo Differential, SAR ADCs Features: Easy Drive Greatly reduced input kickback Input current reduced to 0.5 μA/MSPS Enhanced acquisition phase, ≥79% of cycle time at 1 MSPS First conversion accurate, no latency or pipeline delay Input span compression for single-supply operation Fast conversion allows low SPI clock rates Input overvoltage clamp protection sinks up to 50 mA SPI-/QSPI-/MICROWIRE-/DSP-compatible serial interface High performance Pseudo differential analog input range 0 V to VREF with VREF from 2.4 V to 5.1 V Throughput: 2 MSPS/1 MSPS/500 kSPS options INL: ±3.2 LSB maximum Guaranteed 18-bit, no missing codes SNR: 95 dB at fIN = 1 kHz at VREF = 5 V THD: −125 dB at fIN = 1 kHz, −108 dB at fIN = 100 kHz SINAD: 84.5 dB at fIN = 1 MHz (see Figure 17 in data sheet) Oversampled dynamic range 98 dB for OSR = 2 125 dB for OSR = 1024 Low power Single 1.8 V supply operation with 1.71 V to 5.5 V logic interface 2.5 mW at 500 kSPS (VDD only) 70 μW at 10 kSPS, 14 mW at 2 MSPS (total power) 10-lead packages: 3 mm × 3 mm LFCSP, 3 mm × 4.90 mm MSOP Pin compatible with AD4003/AD4007/AD4011 family Guaranteed operation: −40°C to +125°C

Single-Supply, Multichannel, 125 kSPS, 24-Bit, Sigma-Delta ADC with 10 V Inputs Features:24-bit ADC with integrated AFEFast and flexible output rate: 2.5 SPS to 125 kSPSChannel scan data rate of 24,845 SPS per channel (40.25 s settling)85 dB common mode rejection of 50 Hz and 60 Hz at 20 SPS per channel10 V inputs, either 8 differential or 16 single-endedVIN pin absolute maximum rating 65 VAbsolute input pin voltage up to 20 VMinimum 1 M impedanceOn-chip 2.5 V reference0.12% initial accuracy at 25C, 5 ppm/C (typical) driftInternal or external clockPower suppliesAVDD = 4.5 V to 5.5 VIOVDD = 2 V to 5.5 VTotal current consumption AVDD + IOVDD (IDD) = 10.4 mATemperature range: 40C to +105C3-wire or 4-wire serial digital interface (Schmitt trigger on SCLK)SPI, QSPI, MICROWIRE, and DSP compatible

32 A, Ultra Low Power, 24-Bit Sigma-Delta ADC with Integrated PGA and FIFO Features: Ultralow current consumption (typical): 32 μA: continuous conversion mode (gain = 128) 5 μA: duty cycling mode (ratio = 1/16) 0.5 μA: standby mode 0.1 μA: power-down mode Built-in features for system level power savings: Current saving duty cycle ratio: 1/4 or 1/16 Smart sequencer and per channel configuration minimizes host processor load Deep embedded FIFO minimizes host processor load (depth of 256 samples) Autonomous FIFO interrupt functionality, threshold detection Single supply as low as 1.71 V increasing battery length RMS noise: 25 nV rms at 1.17 SPS (gain = 128) – 48 nV/√Hz Up to 22 noise free bits (gain = 1) Output data rate: 1.17 SPS to 2.4 kSPS Operates from 1.71 V to 3.6 V single supply or ±1.8 V split supplies Band gap reference with 15 ppm/°C maximum drift PGA with rail-to-rail analog input Adaptable sensor interfacing functionality: Matched programmable excitation currents for RTDs On-chip bias voltage generator for thermocouples Low-side power switch for bridge transducers Sensor open wire detection Internal temperature sensor and oscillator Self and system calibration Flexible filter options Simultaneous 50 Hz/60 Hz rejection (on selected filter options) General-purpose outputs Diagnostic functionality Crosspoint multiplexed inputs 8 differential/16 pseudo differential inputs 5 MHz SPI (3-wire or 4-wire) Available in 35-ball, 2.74 mm × 3.6 mm WLCSP Temperature range: −40°C to +105°C

16-Bit, 16-Channel, 500 kSPS/1 MSPS, Easy Drive Multiplexed SAR ADC Features: Easy Drive Reduced analog input and reference drive requirements On-chip reference buffer (WLCSP only) Overvoltage protection up to 5 mA on each analog input Long acquisition phase, ≥71.5% (715 ns/1000 ns) of cycle time at 1 MSPS High performance Sample rate: 500 kSPS (AD4695) or 1 MSPS (AD4696) INL: ±1.0 LSB maximum Guaranteed 16-bit, no missing codes SINAD: 93 dB typical, fIN = 1 kHz Oversampled dynamic range: 111.2 dB, OSR = 64 Small footprint, high channel density 32-lead 5 mm × 5 mm LFCSP 36-ball 2.96 mm × 2.96 mm WLCSP Easy Drive features support system level designs with fewer components Enhanced digital functionality First conversion accurate, no latency or pipeline delay Fast conversion time and dual-/quad-SDO modes allow low SPI clock rates Customizable channel sequencer On-chip oversampling and decimation Threshold detection alerts Offset and gain correction Autonomous conversion (autocycle) mode 1.14 V to 1.98 V logic SPI Low power 8 mW at fS = 1 MSPS and 4 mW at fS = 500 kSPS 4 μW standby power dissipation with the internal LDO disabled Internal LDO enables 3.15 V to 5.5 V, single analog supply operation Wide operating temperature range: −40°C to +125°C

16-Bit, 16-Channel, 500 kSPS/1 MSPS, Easy Drive Multiplexed SAR ADC Features: Easy Drive Reduced analog input and reference drive requirements On-chip reference buffer (WLCSP only) Overvoltage protection up to 5 mA on each analog input Long acquisition phase, ≥71.5% (715 ns/1000 ns) of cycle time at 1 MSPS High performance Sample rate: 500 kSPS (AD4695) or 1 MSPS (AD4696) INL: ±1.0 LSB maximum Guaranteed 16-bit, no missing codes SINAD: 93 dB typical, fIN = 1 kHz Oversampled dynamic range: 111.2 dB, OSR = 64 Small footprint, high channel density 32-lead 5 mm × 5 mm LFCSP 36-ball 2.96 mm × 2.96 mm WLCSP Easy Drive features support system level designs with fewer components Enhanced digital functionality First conversion accurate, no latency or pipeline delay Fast conversion time and dual-/quad-SDO modes allow low SPI clock rates Customizable channel sequencer On-chip oversampling and decimation Threshold detection alerts Offset and gain correction Autonomous conversion (autocycle) mode 1.14 V to 1.98 V logic SPI Low power 8 mW at fS = 1 MSPS and 4 mW at fS = 500 kSPS 4 μW standby power dissipation with the internal LDO disabled Internal LDO enables 3.15 V to 5.5 V, single analog supply operation Wide operating temperature range: −40°C to +125°C